CS196867B1 - Connection for evaluation of the deviation of the traced source of the d.c. electric voltage source from the defined tolerance extent - Google Patents

Description

The invention relates to a circuit for evaluating a deviation of the monitored voltage of a DC voltage source within a defined tolerance range.

In some sectors of electronics, especially in control and measurement technology, it is necessary to monitor DC voltage or other electrical quantities, whether they are within the required tolerance limits. If this is not the case, a remedy is issued.

Heretofore, conventional pointer meters equipped with optical or mechanical pointer position sensors have been used for this purpose. When the limit state is reached or exceeded, a signal is sent from the sensor, which is evaluated by auxiliary logic circuits. The disadvantages of these solutions are the demands on the working environment, on the accuracy of the adjustment and, moreover, they are relatively expensive and unsuitable for their mechanical inertia for monitoring of rapidly changing quantities. Therefore, circuits operating with two electronic comparators have been developed, one monitoring the achievement or exceeding of one limit of the other limit state.

The signals from the comparators are evaluated by auxiliary logic circuits. The disadvantage of these wiring is their relative complexity and adjustment effort.

These disadvantages are eliminated by the circuit for evaluating the deviation of the monitored DC voltage from the defined tolerance range according to the invention, which is based on the fact that the first input for the monitored voltage forms at the same time the first input of the circuit. to the input of the integration cell whose output is the output of the wiring.

The advantage of the invention is its simplicity and ease of adjustment.

An example of a circuit for evaluating a deviation of the monitored DC voltage from a defined tolerance range is shown in the accompanying drawing, in which Fig. 1 represents a block diagram, Fig. 2 a detailed diagram and Fig. 3 a timing diagram of the signals.

The first input 1 of the analog comparator AK (Fig. 1) for the SN signals is connectable to a voltage source not shown. On the second input 2 of the analog comparator

AK for the high voltage signal, output 01 of the swept normal voltage source GVN is connected. The output 03 of the analog comparator AK is connected to the input 3 of the integration cell I, whose output 04 for the HT signal is connectable to control circuits (not shown).

In the circuit according to FIG. 2, an OZ opamp is used as an analog comparator, whose inverting input 1 for the SN signal is connectable to a voltage source not shown. The non-inverting op amp input 2 of the op amp for the high voltage signal is connectable via a first resistor R1 to a normal voltage source Un (not shown). Between the non-inverting input 2 of the OP operational amplifier and the zero potential are connected in series resistors namely the second resistor R2, the third resistor R3 and the fourth resistor R4, of which resistors R3 and R4 are control resistors. Between the third resistor R3 and the fourth resistor R4 is connected the collector of the transistor T of the npn type, whose emitter is connected to zero potential and whose base is connectable to an auxiliary voltage source Up (not shown). The output of the operational amplifier OZ is connected via the first capacitor C1 to the input 3 of the integrating cell formed from the diode D connected by the anode to the zero potential and through which the second capacitor C2 and the fifth resistor R5 are connected in parallel. Output 04

SUBJECT

Claims (1)

SUBJECT The circuit for evaluating the voltage deviation of the DC voltage source from the defined tolerance range is characterized in that the first voltage monitoring input (1) simultaneously constitutes the first input (1j of the circuit), while its second integration cell for the HT signal is connectable to control circuits (not shown). If the signal SN is the monitored DC voltage in the tolerance field (FIG. 3A), then pulses are generated at the output 03 of the analog comparator AK, the waveform of which is shown in FIG. 3C, due to the identity of the signals SN and VN at the moment of the change of the SNA signal from one limit to the other. The VN signal is integrated in the integration cell I, and at its output 04 the HT signal appears, the course of which is shown in FIG. 3D. If the SN signal is not in the tolerance field (Fig. 3E), then no pulses are generated at the output 03 of the analog comparator AK due to the non-identity of the SN and VN signals. Therefore, no pulses are applied to the input 3 of the integration cell I and therefore the HT signal cannot appear at its output 04. This causes, for example, shutting down the entire device, alerting the operator of a malfunction, switching to an alternate source, and so on, which is done by the control circuits. The circuit according to the invention can be used to monitor and evaluate deviations from a defined tolerance range of any variable that can be converted to electrical voltage as an SN signal.