CN86101937A - Resistance-oxide-semiconductor (ROS) transistor - Google Patents

Resistance-oxide-semiconductor (ROS) transistor Download PDF

Info

Publication number
CN86101937A
CN86101937A CN 86101937 CN86101937A CN86101937A CN 86101937 A CN86101937 A CN 86101937A CN 86101937 CN86101937 CN 86101937 CN 86101937 A CN86101937 A CN 86101937A CN 86101937 A CN86101937 A CN 86101937A
Authority
CN
China
Prior art keywords
grid
effect transistor
field effect
resistance
cut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
CN 86101937
Other languages
Chinese (zh)
Other versions
CN86101937B (en
Inventor
叶安祚
杨长根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIANGXI UNIV
Original Assignee
JIANGXI UNIV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIANGXI UNIV filed Critical JIANGXI UNIV
Priority to CN86101937A priority Critical patent/CN86101937B/en
Publication of CN86101937A publication Critical patent/CN86101937A/en
Publication of CN86101937B publication Critical patent/CN86101937B/en
Expired legal-status Critical Current

Links

Images

Abstract

A kind of insulated-gate type field effect transistor, its grid is made of resistance material.The two ends of leaking the end line of on line direction perpendicular to the source at resistance grid have made two Ohm contact electrodes as the double grid end, are equivalent on its 26S Proteasome Structure and Function.This device does not have by, remote cut-off or sharp cut-off transfer characteristic, can obtain required cut-ff voltage value and transconductance value as required, and two grid ends can use as control gate and signal grid simultaneously.The application of this device has enlarged the range of application of field effect transistor, can make circuit obtain simplifying, and can solve problems such as large-signal is stopped up, automatic gain control narrow dynamic range effectively.

Description

Resistance-oxide-semiconductor (ROS) transistor
The present invention relates to a kind of insulated-gate type field effect transistor, its grid is to be made of resistance material.
A kind of resistance-oxide-insulated gate semiconductor type field effect transistor is disclosed on hillside plot swells the U.S. Pat of delivering on December 21st, 1 3999210, the grid of this device is made of resistance material, and at the grid two-end-point that leaks direction along the source two grids are set and introduce electrodes, add different current potentials at this two electrode during work, then the electric field of the modulation channel conduction of direction variation is leaked in the interior formation one of raceway groove along the source, to reach the purpose that has the linear impedance characteristic in wide frequency range.
Purpose of the present invention then provides a kind of insulated-gate type field effect transistor that does not have by, remote cut-off or sharp cut-off transfer characteristic.
The objective of the invention is to realize with the MOS planar technique of standard.With the grid that is not both it of metal-oxide-semiconductor be to constitute by resistance material, and be with the difference of aforementioned prior art, the two ends of leaking the end line of on line direction at this resistance grid perpendicular to the source make two Ohm contact electrode (see figure 1)s, two grids as field effect transistor of the present invention are introduced electrode, and the resistivity of resistance grid layer is uniform, add different current potentials at this two electrode during work, then the electric field of the modulation channel conduction that provides by grid voltage be one along the even changed electric field of linearity that leaks the on line direction perpendicular to the source.
Field effect transistor of the present invention had by, remote cut-off or sharp cut-off transfer characteristic, can be illustrated with following narration.
With the n channel enhancement is that the example investigation raceway groove dZ(of unit sees Fig. 2).Because the grid each point current potential on the raceway groove dZ is same numerical value V G(Z), the obvious little metal-oxide-semiconductor that is combined as of this raceway groove unit and source, drain electrode.According to the MOSFET theory, the leakage current when it is saturated is
i dsat= (μ nC ox)/(2L) 〔V G(Z)-V T2dZ……(1)
Here V TBe the identical threshold voltage that each little metal-oxide-semiconductor had.Set V G1>V G2The time, and have
V G(Z)=V G1- (V G1-V G2)/(W) Z……(2)
Transfer characteristic situation when noticing field effect transistor channel part conducting of the present invention, i.e. V G1>V T>V G2The time, the interval raceway groove conducting of O~Z ', the transfer characteristic situation of the interval channel cutoff of Z '~W.If choose V DSSSatisfy
V DSS≥V G(O)-V T=V G1-V T……(3)
So, the little raceway groove unit at Z=O place is in the saturation conduction state.Yet for all little raceway groove units, their source-drain voltage is V DSS, again because the V of each little metal-oxide-semiconductor in O~Z ' interval G(Z) all less than V G1And greater than V T, promptly satisfy
V DSS≥V G(Z)-V T,O<Z<Z′……(4)
So the interval raceway groove unit of O~Z ' all is in the saturation conduction state.But in Z '~W interval, because V G(Z)<V T, do not form the strong inversion raceway groove as yet, still be in cut-off state.So can get according to (1),
I Dsat ∫ 0 Z ′ i d s a t
= (μ nC ox)/(6L) · ((V G1-V T) 3)/(V G1-V G2) ……(5)
Obviously, work as V G1After selected, I Dsat~V G2Be hyp one, promptly device presents the transfer characteristic of not ending.
More than discussing is V G1, V G2As two specifications of variables independently.As by biasing circuit work shown in Figure 3, then have
V G1= (V G2N)/(1+N) + (E g)/(1+N) ……(6)
N=R/R in the formula Gg, R GgBe gate resistance, substitution formula (5) can get
I D s a t = μ n C o x 6 L V G 2 N 1 + N + E g 1 + 1 - V T 3 E g 1 + N - V G 2 1 + N
……(7)
Notice the alternative of N and Eg, suitably choose the value of N or Eg, just can regulate cut-ff voltage arbitrarily, also promptly can obtain the remote cut-off or the sharp cut-off transfer characteristic of field effect transistor of the present invention.
Field-effect transistor of the present invention can be the n raceway groove, also can be the p raceway groove, and its substrate is not limited to monocrystalline silicon piece, can be epitaxial loayer or ion implanted layer, can make individual devices, also can be made in the integrated circuit; Its source region and drain region can be made with diffusion method or ion implantation.And grid oxic horizon can be a single-layer medium, also can be multilayer dielectricity.Resistive layer forms with the polycrystalline silicon growth method, and its thickness and resistivity are determined as required.
According to the field effect transistor that the present invention makes, its advantage is that transfer characteristic can be selected according to the needs on using, and obtains the transfer characteristic by, remote cut-off or sharp cut-off, promptly obtains required cut-ff voltage value and transconductance value.In addition, because two lead ends of grid are structurally identical, equivalence on the function, so can use as control gate and signal grid simultaneously.Application of the present invention can solve problems such as large-signal is stopped up, automatic gain control narrow dynamic range effectively, has enlarged the range of application of field effect transistor, also can make circuit obtain simplifying simultaneously.
Fig. 1 is the field effect transistor schematic diagram that conforms with subject matter.(14) be the source region, (16) are the drain region, all are to belong to a kind of conduction type, (15) being substrate, is another kind of conduction type, and (13) are gate oxide, (12) be the resistance layer, (11) and (17) represent two the ohmic contact regions G1 and the G2 of grid end.
Fig. 2 is the raceway groove position view under the space coordinates.
Fig. 3 is an external circuit biasing schematic diagram.
The present invention utilizes existing standard MOS planar technique to implement.The different just grids of pipe are to be made of resistance material.One of embodiments of the invention are: form N type source, drain electrode by diffusion method on p type substrate, generate SiO with oxidizing process 2Gate oxide, grid are the even resistive layers that forms with the polycrystalline silicon growth method.

Claims (3)

1, a kind of resistance-oxide-semiconductor field effect transistor, form by the substrate (15) of a kind of source region (14) of conduction type and drain region (16), another kind of conduction type and grid oxic horizon (13) and resistance layer (12), it is characterized in that making two Ohm contact electrodes at the two ends of resistance layer, their on line direction is vertical with the on line direction between leak in the source.
2, field effect transistor according to claim 1, the resistivity that it is characterized in that the resistance layer is for uniformly.
3, field effect transistor according to claim 1 is characterized in that the resistance layer generates with the polycrystalline silicon growth method.
CN86101937A 1986-03-22 1986-03-22 Resistance-oxide-semiconductor (ros) transistor Expired CN86101937B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN86101937A CN86101937B (en) 1986-03-22 1986-03-22 Resistance-oxide-semiconductor (ros) transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN86101937A CN86101937B (en) 1986-03-22 1986-03-22 Resistance-oxide-semiconductor (ros) transistor

Publications (2)

Publication Number Publication Date
CN86101937A true CN86101937A (en) 1987-11-11
CN86101937B CN86101937B (en) 1988-05-18

Family

ID=4801555

Family Applications (1)

Application Number Title Priority Date Filing Date
CN86101937A Expired CN86101937B (en) 1986-03-22 1986-03-22 Resistance-oxide-semiconductor (ros) transistor

Country Status (1)

Country Link
CN (1) CN86101937B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101414564B (en) * 2008-11-24 2010-07-14 上海广电光电子有限公司 Method for manufacturing low-temperature polycrystalline silicon film transistor
CN109509446A (en) * 2018-12-19 2019-03-22 惠科股份有限公司 Display module and display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101414564B (en) * 2008-11-24 2010-07-14 上海广电光电子有限公司 Method for manufacturing low-temperature polycrystalline silicon film transistor
CN109509446A (en) * 2018-12-19 2019-03-22 惠科股份有限公司 Display module and display device
CN109509446B (en) * 2018-12-19 2021-06-04 惠科股份有限公司 Display module and display device

Also Published As

Publication number Publication date
CN86101937B (en) 1988-05-18

Similar Documents

Publication Publication Date Title
Suciu et al. Experimental derivation of the source and drain resistance of MOS transistors
CA1153479A (en) Semiconductor devices controlled by depletion regions
US4661833A (en) Electrically erasable and programmable read only memory
Pocha et al. A computer-aided design model for high-voltage double diffused MOS (DMOS) transistors
US6245607B1 (en) Buried channel quasi-unipolar transistor
KR930005248A (en) Semiconductor device and manufacturing method
DE60124048T2 (en) FIELD EFFECT TRANSISTOR
US5089871A (en) Increased voltage mos semiconductor device
US3430112A (en) Insulated gate field effect transistor with channel portions of different conductivity
CN86101937A (en) Resistance-oxide-semiconductor (ROS) transistor
JPH0513387B2 (en)
Neamen et al. Radiation induced charge trapping at the silicon sapphire substrate interface
Park et al. Electrode interdependence and hole capacitance in capacitance–voltage characteristics of hydrogenated amorphous silicon thin-film transistor
US4143387A (en) Signal mixer including resistive and normal gate field-effect transistor
CA2038960A1 (en) Circuit element with elimination of kink effect
US4484208A (en) Junction-type field-effect transistor and its manufacture
Nathanson A high field triode
DE102007041191B4 (en) Method for producing a MOSFET component of the trench gate type and MOS field effect transistor
Tewksbury et al. Static and nonequilibrium transient conductance at strong carrier freeze‐out in a buried channel, metal‐oxide‐semiconductor transistor
KR100580384B1 (en) Thin Film Transistor with Gate Insulation
Hovel The HgFET: A new characterization tool for SOI silicon film properties
Lubberts et al. Capacitance and doping profiles of ion-implanted, buried-channel MOSFETs
Miller et al. Nonlinearity and cross modulation in field-effect transistors
JPS6141153B2 (en)
Lin et al. Electrical characterisation of ion-implanted silicon-on-sapphire

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C13 Decision
GR02 Examined patent application
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee