CN86101937A - Resistance-oxide-semiconductor (ROS) transistor - Google Patents

Abstract

A kind of insulated-gate type field effect transistor, its grid is made of resistance material.The two ends of leaking the end line of on line direction perpendicular to the source at resistance grid have made two Ohm contact electrodes as the double grid end, are equivalent on its 26S Proteasome Structure and Function.This device does not have by, remote cut-off or sharp cut-off transfer characteristic, can obtain required cut-ff voltage value and transconductance value as required, and two grid ends can use as control gate and signal grid simultaneously.The application of this device has enlarged the range of application of field effect transistor, can make circuit obtain simplifying, and can solve problems such as large-signal is stopped up, automatic gain control narrow dynamic range effectively.

Description

Resistance-oxide-semiconductor (ROS) transistor

The present invention relates to a kind of insulated-gate type field effect transistor, its grid is to be made of resistance material.

A kind of resistance-oxide-insulated gate semiconductor type field effect transistor is disclosed on hillside plot swells the U.S. Pat of delivering on December 21st, 1 3999210, the grid of this device is made of resistance material, and at the grid two-end-point that leaks direction along the source two grids are set and introduce electrodes, add different current potentials at this two electrode during work, then the electric field of the modulation channel conduction of direction variation is leaked in the interior formation one of raceway groove along the source, to reach the purpose that has the linear impedance characteristic in wide frequency range.

Purpose of the present invention then provides a kind of insulated-gate type field effect transistor that does not have by, remote cut-off or sharp cut-off transfer characteristic.

The objective of the invention is to realize with the MOS planar technique of standard.With the grid that is not both it of metal-oxide-semiconductor be to constitute by resistance material, and be with the difference of aforementioned prior art, the two ends of leaking the end line of on line direction at this resistance grid perpendicular to the source make two Ohm contact electrode (see figure 1)s, two grids as field effect transistor of the present invention are introduced electrode, and the resistivity of resistance grid layer is uniform, add different current potentials at this two electrode during work, then the electric field of the modulation channel conduction that provides by grid voltage be one along the even changed electric field of linearity that leaks the on line direction perpendicular to the source.

Field effect transistor of the present invention had by, remote cut-off or sharp cut-off transfer characteristic, can be illustrated with following narration.

With the n channel enhancement is that the example investigation raceway groove dZ(of unit sees Fig. 2).Because the grid each point current potential on the raceway groove dZ is same numerical value V _G(Z), the obvious little metal-oxide-semiconductor that is combined as of this raceway groove unit and source, drain electrode.According to the MOSFET theory, the leakage current when it is saturated is

i _dsat＝ (μ _nC _ox)/(2L) 〔V _G（Z）-V _T〕 ²dZ……（1）

Here V _TBe the identical threshold voltage that each little metal-oxide-semiconductor had.Set V _G1＞V _G2The time, and have

V _G（Z）＝V _G1- (V _G1-V _G2)/(W) Z……（2）

Transfer characteristic situation when noticing field effect transistor channel part conducting of the present invention, i.e. V _G1＞V _T＞V _G2The time, the interval raceway groove conducting of O～Z ', the transfer characteristic situation of the interval channel cutoff of Z '～W.If choose V _DSSSatisfy

V _DSS≥V _G（O）-V _T＝V _G1-V _T……（3）

So, the little raceway groove unit at Z=O place is in the saturation conduction state.Yet for all little raceway groove units, their source-drain voltage is V _DSS, again because the V of each little metal-oxide-semiconductor in O～Z ' interval _G(Z) all less than V _G1And greater than V _T, promptly satisfy

V _DSS≥V _G（Z）-V _T，O＜Z＜Z′……（4）

So the interval raceway groove unit of O～Z ' all is in the saturation conduction state.But in Z '～W interval, because V _G(Z)＜V _T, do not form the strong inversion raceway groove as yet, still be in cut-off state.So can get according to (1),

I _Dsat＝ ${\∫}_0^{\mathrm{Z\; \prime }}{i}_{\mathrm{d\; s\; a\; t}}$

= (μ _nC _ox)/(6L) · ((V _G1-V _T) ³)/(V _G1-V _G2) ……（5）

Obviously, work as V _G1After selected, I _Dsat～V _G2Be hyp one, promptly device presents the transfer characteristic of not ending.

More than discussing is V _G1, V _G2As two specifications of variables independently.As by biasing circuit work shown in Figure 3, then have

V _G1＝ (V _G2N)/(1+N) + (E _g)/(1+N) ……（6）

N=R/R in the formula _Gg, R _GgBe gate resistance, substitution formula (5) can get

$I_{\mathrm{D\; s\; a\; t}}=\frac{{\mu }_n{C}_{\mathrm{o\; x}}}{\mathrm{6\; L}}\frac{［\frac{V_{\mathrm{G\; 2}}N}{\mathrm{1\; +\; N}}+\frac{E_g}{\mathrm{1\; +\; 1}}{\mathrm{-\; V}}_T{］}^3}{\frac{E_g}{\mathrm{1\; +\; N}}-\frac{{\mathrm{<figure-callout\; id="2"\; label="V\; G"\; filenames="86101937\_DRIMG1.png"\; state="\{\{state\}\}">V\; </figure-callout>}}_G}{\mathrm{1\; +\; N}}}$

……（7）

Notice the alternative of N and Eg, suitably choose the value of N or Eg, just can regulate cut-ff voltage arbitrarily, also promptly can obtain the remote cut-off or the sharp cut-off transfer characteristic of field effect transistor of the present invention.

Field-effect transistor of the present invention can be the n raceway groove, also can be the p raceway groove, and its substrate is not limited to monocrystalline silicon piece, can be epitaxial loayer or ion implanted layer, can make individual devices, also can be made in the integrated circuit; Its source region and drain region can be made with diffusion method or ion implantation.And grid oxic horizon can be a single-layer medium, also can be multilayer dielectricity.Resistive layer forms with the polycrystalline silicon growth method, and its thickness and resistivity are determined as required.

According to the field effect transistor that the present invention makes, its advantage is that transfer characteristic can be selected according to the needs on using, and obtains the transfer characteristic by, remote cut-off or sharp cut-off, promptly obtains required cut-ff voltage value and transconductance value.In addition, because two lead ends of grid are structurally identical, equivalence on the function, so can use as control gate and signal grid simultaneously.Application of the present invention can solve problems such as large-signal is stopped up, automatic gain control narrow dynamic range effectively, has enlarged the range of application of field effect transistor, also can make circuit obtain simplifying simultaneously.

Fig. 1 is the field effect transistor schematic diagram that conforms with subject matter.(14) be the source region, (16) are the drain region, all are to belong to a kind of conduction type, (15) being substrate, is another kind of conduction type, and (13) are gate oxide, (12) be the resistance layer, (11) and (17) represent two the ohmic contact regions G1 and the G2 of grid end.

Fig. 2 is the raceway groove position view under the space coordinates.

Fig. 3 is an external circuit biasing schematic diagram.

The present invention utilizes existing standard MOS planar technique to implement.The different just grids of pipe are to be made of resistance material.One of embodiments of the invention are: form N type source, drain electrode by diffusion method on p type substrate, generate SiO with oxidizing process ₂Gate oxide, grid are the even resistive layers that forms with the polycrystalline silicon growth method.

Claims (3)

1, a kind of resistance-oxide-semiconductor field effect transistor, form by the substrate (15) of a kind of source region (14) of conduction type and drain region (16), another kind of conduction type and grid oxic horizon (13) and resistance layer (12), it is characterized in that making two Ohm contact electrodes at the two ends of resistance layer, their on line direction is vertical with the on line direction between leak in the source.

2, field effect transistor according to claim 1, the resistivity that it is characterized in that the resistance layer is for uniformly.

3, field effect transistor according to claim 1 is characterized in that the resistance layer generates with the polycrystalline silicon growth method.

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