CN85104163A - The separation of line-by-line inversion color system luminance signal and chrominance signal - Google Patents
The separation of line-by-line inversion color system luminance signal and chrominance signal Download PDFInfo
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- CN85104163A CN85104163A CN 85104163 CN85104163A CN85104163A CN 85104163 A CN85104163 A CN 85104163A CN 85104163 CN85104163 CN 85104163 CN 85104163 A CN85104163 A CN 85104163A CN 85104163 A CN85104163 A CN 85104163A
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Abstract
The filter that separates luminance signal and chrominance signal from the Phase Alternation Line system videoblankingsync comprises: a sampling signal generator, sampled signal frequency are 4 times of color sub-carrier frequency, and phase place is consistent with the U and the V axle of chrominance signal; One A/D converter, a vertical filter and a horizontal filter, utilize each sampled point by gained after the A/D conversion sample value and the sample value on several the 1st class neighbouring sample points adjacent with each specified point, the chrominance signal that separates each particular sample point place, the device of the direction that change in detection signal is little; A device that utilizes detected direction to select the output of horizontal or vertical filter; An output briliancy luminance signal generator.
Description
The invention relates to a kind of filter of separating in Phase Alternation Line system (line-by-line inversion color system) videoblankingsync (composite video signal) and extracting luminance signal (below be designated as Y-signal) and chrominance signal (below be designated as the C signal) (below be designated as the YC separation filter).Say that distinguishingly the present invention becomes digital signal to the signal transformation of Phase Alternation Line system analog compound television, thereby can isolate a kind of system of Y-signal and C signal.
In existing standard vitascan, Y-signal and C signal are to be transformed into the multiple composite signal of frequency to launch.Therefore, in receiver, need Y-signal and C signal are clearly separated from composite signal.
Phase Alternation Line system videoblankingsync P comprises Y-signal and C signal, and the C signal is then by two color difference signal U and V(or I and Q) by a color sub-carrier frequency f
SCAfter modulating mutually, process quadrature 2 generates.The P signal can be expressed as:
P＝Y+C
＝Y+U·sin（2πf
SCt）±V·cos（2πf
SCt）
Wherein ± number meaning be: get "+" number for odd-numbered scan lines, the even-line interlace line is got "-" number.This that is to say that the V component wants once anti-phase on the line of lining by line scan.If frame rate is f
F(25HZ), field frequencies range f
V(50HZ), horizontal frequency is f
H(15.625KHZ), then above-mentioned each frequency and f
SCBetween following relation arranged:
f
SC＝（284-1/4+1/625）f
H
＝（284-1/4+1/625）625f
V/2
＝（284-1/4+1/625）625f
F
From with the co-relation as can be known, f
SCWith f
HBetween the bias relation of 1/4 line is arranged.Therefore, the Phase Alternation Line system videoblankingsync can be with 4 times of sample frequency f to the color carrier frequency
SCome synchronized sampling, but and its sample signal series telogenesis on screen two-dimensional arrangements shown in Figure 1.As shown in Figure 1, the phase place of chrominance signal repeats once every 4 lines.In Fig. 1, rectangle garden circle and triangle are all represented sampled point Ps, and Y represents luminance signal, C1, C2, C1 ' and C2 ' expression chrominance signal, and U1, U2, V1 and V2 represent color difference signal.
In order to guarantee and the monochrome television signal compatibility, require receiver correctly to come out Y-signal and C Signal Separation from the video burst and sync signal that contains the C signal, wherein the C signal is to carry out multipleization of frequency in the mode of inserting frequency spectrum on the frequency band of Y-signal.
Fig. 2 is an example of the YC separation filter known: the input 1 that Phase Alternation Line system analog compound television signal is provided among the figure, A/D converter 2, sampling pulse generator (SP) 3, the the 1st and the 2nd delay circuit 41 and the storage of 42(2 line, the back sample signal that both come out the A/D converter postpones two horizontal scanning periods.Figure 5,61,62 and 7 is respectively represented 1/2 doubling circuit, the 11/4th doubling circuit, the 21/4th doubling circuit and subtraction circuit.Subtraction circuit 7 is the output that the output of circuit 5 is deducted the 1st and the 21/4th doubling circuit 61 and 62.Figure 8 and 9 is respectively represented horizontal band pass filter and the 2nd subtraction circuit, and the latter designs to such an extent that can deduct the output of the 1st delay circuit 41 output of filter 8.The output of the horizontal band pass filter 8 of figure 10 representatives, 11 represent the output of the 2nd subtraction circuit 9.The circuit operation of Fig. 2 is as follows: sampling pulse generator 3 is oscillators of a synchronized oscillation, its frequency f
SBe the color sub-carrier frequency f that is added on the videoblankingsync of input 1
SC4 times.The output of generator 3 is added on the A/D converter 2, and the A/D converter is the analog signal digital on the input 1.Use sample frequency f
S=4f
SCTo the sample sample signal series of back gained of Phase Alternation Line system video burst and sync signal, the figure on screen as shown in Figure 1, what note here is the phase place of C signal.As can be seen from Figure 1, the phase place of C signal is the cycle to do cyclic variation with 4 lines, and the phase place of the color sub-carrier of chrominance signal component has 180 ° anti-phase variation at capable two lines (1-2) up and down of l and (1+2) simultaneously.The output of 5 pairs the 1st delay circuits 41 of 1/2 doubling circuit multiply by 1/2, then subtraction circuit 7 is delivered in its output.The output of 61 pairs of A/D converters 2 of the 11/4th doubling circuit multiply by 1/4, and subtraction circuit 7 is delivered in its output.The output of 62 pairs the 2nd delay circuits 42 of the 21/4th doubling circuit multiply by 1/4, and subtraction circuit 7 is also delivered in its output.Subtraction circuit 7 makes the output of 1/2 doubling circuit 5 deduct the output of the 11/4th doubling circuit 61 and the 21/4th doubling circuit 62.So, the output Hc(l of subtraction circuit 7, but m) telogenesis:
Hc（l，m）＝1/4｛-P（l-2，m）+2P（l，m）-P（1+2，m）｝
Wherein P(l m) is the sample value of (m) sample point on (l) line, and P(l+2 is the sample signal of A/D converter 2 outputs m), and P(l m) is the output of the 1st delay circuit 41, and it is with separated signal.P(l-2 m) is the sample signal of the 2nd delay circuit 42 outputs.The output signal Hc(l of subtraction circuit 7 m) is sent to horizontal band pass filter 8, and the latter is one can allow output signal Hc(l, and m) the chrominance signal component in is by filtering the filter of Y-signal component.This filter can constitute by following formula:
Hh（Z）＝-1/32·（1-Z
-2）
2（1+Z
-4）
2（1+Z
-8）
By following formula as can be known, the C signal promptly draws from the output of horizontal band pass filter 8.
Hence one can see that, separates the filter of Y-signal and C signal usually and be made up of fixing horizontal filter and vertical filter.In addition, common system will suppose that the pixel as TV signal sample value series adjacent one another are on the screen is similar each other.So swash that part of area of drastic changeization for the briliancy of image and colourity, Y-signal and C signal can leak in the other side's the channel each other, thereby cause the distortion that intersects colourity and intersect briliancy, this has just damaged the quality of reproduced picture.
The present invention is intended to solve problem set forth above, and as the purpose of inventing, provide a kind of YC separation filter of Phase Alternation Line system, wherein earlier the video burst and sync signal of input by 4 times to the color sub-carrier frequency sampling and be transformed into digital signal, separate luminance signal and chrominance signal then, here it is separately correct only to adopt the single file storage just can guarantee, does not need to adopt the storage of two lines.
From following narration, also can know and see other purposes of the present invention and advantage; But should be appreciated that description that these are detailed and specific enforcement are novel all to be for convenience of explanation,, can also make some changes and modification within the spirit and scope of the present invention because for person skilled in the art from the detailed description here.
The invention provides a kind of filter that can from the Phase Alternation Line system videoblankingsync, separate luminance signal and chrominance signal, it comprises: a sampling signal generator, be used for producing sampled signal, the frequency of sampled signal is 4 times of color sub-carrier frequency, and its phase place is consistent with the U and the V axle of chrominance signal; An A/D converter, it utilizes this sampled signal that analog compound television signal transformation is become digital signal; A vertical filter and a horizontal filter, be used for separating the chrominance signal at each particular sample point place, it is to utilize the sample value of each sampled point by gained after the A/D conversion and the sample value at several 1st class neighbouring sample point places adjacent with each specified point, these several the 1st class consecutive points have opposite color sub-carrier phase place concerning each specified point, and these several the 1st class consecutive points are on the lastrow or next line scan line of each specified point, perhaps utilize the 2nd class consecutive points of each specified point with delegation, these several the 2nd class consecutive points also have opposite color sub-carrier phase place concerning each specified point; A checkout gear, it utilizes the sample value at the 1st class and the 2nd class neighbouring sample point place, can detect a direction, and signal has less variation on this direction; A choice device, it utilizes the detected direction of checkout gear to select the output of vertical filter or horizontal filter; A luminance signal generator, the chrominance signal that its utilization is separated from the digitlization videoblankingsync is exported luminance signal.
Fig. 1 is the sample signal series of to the sample frequency of color sub-carrier frequency the Phase Alternation Line system videoblankingsync being sampled and drawing with 4 times;
Fig. 2 is the filter block diagram that is commonly used to separate luminance signal and chrominance signal;
To be that the present invention is a kind of implement novel filter block diagram to Fig. 3;
Fig. 4 is the sample signal series that draws when according to the present invention Phase Alternation Line system composite tv video signal being sampled;
Fig. 5 and Fig. 6 be the action of key diagram 3 filters;
Fig. 7 is the novel a kind of modified form circuit of this enforcement;
Fig. 8 is the sample signal series that is drawn by Fig. 7 modified form; And
The action of Fig. 9 and Figure 10 key diagram 7 filters.
Referring to Fig. 3, figure 1 is represented input, is used for accepting containing the video burst and sync signal of the analog form of Y and C signal.Figure 3 representatives produce the sampling signal generator that circuit (SP) is formed by a sampling pulse.Figure 2 is represented the A/D converter, and it utilizes the sampled signal of sampling signal generator 3, and the video burst and sync signal of analog form is transformed into digital signal.Figure 43 and 44 is represented the 1st and the 2nd delay circuit (single file storage), they make process signal delay than time in a horizontal scanning period weak point-sampling period.21a, 21b, 21c and 21d represent the 3rd, the 4th, the 5th and the 6th delay circuit, and they all make two sampling periods of signal delay of process.Sampling signal generator just is made up of these the 1st to the 6th delay circuits, and it is on the basis of the digital signal of A/D converter 2, and output is with separated signal and the 1st to the 6th sample signal.With separated signal P(l, m) be the signal of the 5th delay circuit 21c output, the 1st sample signal p(l-1 m-1) is the output of the 4th delay circuit 21b, it with separated signal is compared, postponed ratio-horizontal scanning period time in length-sampling period also; The 2nd sample signal p(l-1 m+1) is the output of the 2nd delay circuit 44, it with separated signal is compared, postponed the time in a ratio-horizontal scanning period weak point-sampling period; The 3rd sample signal p(l m-2) is the output of the 6th delay circuit 21d, it with separated signal is compared, postponed two sampling periods; The 4th sample signal P(l m+2) is the output of the 1st delay circuit 43, it with separated signal is compared leading two sampling periods; The 5th sample signal P(l+1 m-1) is the output of the 3rd delay circuit 21a, it with separated signal is compared the leading time in ratio-horizontal scanning period weak point-sampling period; The 6th sample signal P(l+1 m+1) is the output of A/D converter 2, it with separated signal is compared, leading ratio-horizontal scanning period is the time in length-sampling period also.Figure 26 is represented conversion pulse generator, the 1st status signal of its output " height " level and the 2nd status signal of " low " level.24a represents the 2nd change-over circuit, it accepts the 5th and the 6th sample signal of the 3rd delay circuit 21a and A/D converter 2 respectively, and the 1st status signal of response switching signal generator 26 is exported the 5th sample signal selectively, or responds the 2nd status signal and export the 6th sample signal.24b represents the 1st change-over circuit, it accepts the 2nd sample signal of the 2nd delay circuit 44 and the 1st sample signal that the 4th delay circuit 21b comes, and the 1st status signal of response switching signal generator 26, export the 2nd sample signal selectively, or respond the 2nd status signal and export the 1st sample signal.Figure 92 is represented the 2nd subtraction circuit, and its output is the difference signal of the output selected of the output selected of the 1st change-over circuit 24b and the 2nd change-over circuit 24a.23a represents the 1st absolute value circuit, its output, and promptly the Tv signal is the absolute value of the difference signal of the 2nd subtraction circuit 92.Circuit 23a forms a Tv signal generator together with the 2nd subtraction circuit 92.
Figure 94 is represented the 4th subtraction circuit, and its output is the 4th sample signal of the 1st delay circuit 43 and the difference signal of the 3rd sample signal that the 6th delay circuit 21d comes, and figure 23b represents the 2nd absolute value circuit, its output, i.e. T
HSignal is the absolute value of the difference signal of the 4th subtraction circuit 94, and this circuit is formed a T together with the 4th subtraction circuit 94
HSignal generator.Figure 25 is represented a comparator, Tv signal and the next T of the 2nd absolute value circuit 23b that it comes the 1st absolute value circuit 23a
HSignal compares, and works as T
VLess than T
HThe time export the 1st status signal, and work as T
HDuring less than Tv, export the 2nd status signal.Tv signal generator, T
HSignal generator and comparator 25 have been formed a testing circuit 80, and it can detect the direction of the less variation of videoblankingsync.22a represents the 1st add circuit, and its output is the output sum that the output selected of the 1st change-over circuit 24b and the 2nd change-over circuit 24a select.63 represent the 1st mlultiplying circuit, and it multiply by 1/4 to the output of the 1st add circuit 22a.Figure 51 is represented the 3rd mlultiplying circuit, it to the 5th delay circuit 21c come with separated signal times with 1/2.Figure 93 is represented the 3rd subtraction circuit, its output, i.e. and Hc signal is the difference signal of the output signal of the output signal of the 3rd mlultiplying circuit 51 and the 1st mlultiplying circuit 63, this Hc signal is exactly the chrominance signal of horizontal direction.Circuit 93 and the 1st add circuit 22a, the 1st mlultiplying circuit 63 and the 3rd mlultiplying circuit 51 have been formed a Hc signal generator together.Figure 22b represents the 2nd add circuit, and its output is the 4th sample signal and the 3rd sample signal sum of being come by the 6th delay circuit 21d of the 1st delay circuit 43.64 represent the 2nd mlultiplying circuit, and it multiply by 1/4 to the output of the 2nd add circuit 22b.Figure 95 expression the 5th subtraction circuit, its output are the difference signals of the output signal of the output signal of the 3rd mlultiplying circuit 51 and the 2nd mlultiplying circuit 64, and this difference signal also is exactly the chrominance signal Vc of vertical direction.This circuit 95 has constituted the Vc signal generator with the 2nd add circuit 22b and the 2nd mlultiplying circuit 64.Sample signal generator, Hc signal generator and Vc signal generator have constituted a vertical direction filter and a horizontal direction filter 70.Figure 24c represents a choice device, it accepts the Hc signal of the 3rd subtraction circuit 93 and the Vc signal of the 5th subtraction circuit 95, also accept the 1st and the 2nd status signal of comparator 25, and the signal output part 10 output Hc signals of checking colors under the 1st status signal selectively are as chrominance signal, and under the 2nd status signal, output 10 is exported the Vc signals as chrominance signal.91 represent the 1st subtraction circuit, its output be the 5th delay circuit 21c come will separated signal poor with output chrominance signal from choice device 24c, this difference signal is output to output 11, also is exactly luminance signal.
The circuit operation of Fig. 3 is as follows:
Referring to Fig. 5 and Fig. 6, here that this enforcement of more detailed description is novel:
Fig. 5 and Fig. 6 are except adding some reference symbols and numeral, and be similar to Fig. 4 basically.The situation of Fig. 5 can be described as follows referring to the circuit of Fig. 3:
Suppose A/D converter 2 at moment T in a P7 place output signal (the 6th sample signal).Then the 3rd delay circuit 21a is in a P6 place output signal (the 5th sample signal); The 4th delay circuit 21b is in a P1 place output signal (the 1st sample signal); The 1st delay circuit 43 is in a P5 place output signal (the 4th sample signal); The 2nd delay circuit 44 is in a P2 place output signal (the 2nd sample signal); The 5th delay circuit 21c is in a P4 place output signal (with separated signal); And the 6th delay circuit 21d in a P3 place output signal (the 3rd sample signal).In the case, separate the point of Y and C, promptly signal is separated at this place, puts P4 exactly.
Referring to Fig. 5, switching signal generator 26 is sent one and is controlled signal to the 2nd change-over circuit 24a, make it allow the output signal of the 3rd delay circuit 21a to pass through, also send simultaneously and control signal to the 1st change-over circuit 24b, make it allow the output signal of the 2nd delay circuit 44 pass through.
In the case, the output signal of the 2nd change-over circuit 24a will be the sample value of a P6, and same, the output signal of the 1st change-over circuit 24b will be the sample value of a P2.
The 1st add circuit 22a makes the output of the 2nd change-over circuit 24a and the output addition of the 1st change-over circuit 24b, and the output of 63 couples of add circuit 22a of the 1st mlultiplying circuit multiply by 1/4.The output of 51 couples the 5th delay circuit 21c of the 3rd mlultiplying circuit multiply by 1/2.The 3rd subtraction circuit 93 deducts the output of the 1st mlultiplying circuit 63 from the output of the 3rd mlultiplying circuit 51, and exports a Hc signal, but this Hc signal telogenesis:
-1/4(point P6 place sample value)
+ 1/2(point P4 place sample value)
-1/4(point P2 place sample value).
The 2nd add circuit 22b makes the output of the 1st delay circuit 43 and the output addition of the 6th delay circuit 21d, and the output of 64 couples of add circuit 22b of the 2nd mlultiplying circuit multiply by 1/4.The 5th subtraction circuit 95 deducts the output of the 2nd mlultiplying circuit 64 from the output of the 3rd mlultiplying circuit 51, like this, the output signal of circuit 95, i.e. Vc signal can be expressed as:
-1/4(point P3 place sample value)
+ 1/2(point P4 place sample value)
-1/4(point P5 place sample value).
The 2nd subtraction circuit 92 is all delivered in the output of the output of the 2nd change-over circuit 24a and the 1st change-over circuit 24b, and the latter's output takes absolute value through the 1st absolute value circuit 23a again.So the output signal Tv of the 1st absolute value circuit 23a is:
Tv=|(point P6 place sample value)-(some P2 place sample value) |.
The 4th subtraction circuit 94 is all delivered in the output of the output of the 1st delay circuit 43 and the 6th delay circuit 21d, and the latter's output is taken absolute value by absolute value circuit 23b.Output signal (the T of this 2nd absolute value circuit 23b
HBut) telogenesis:
T
H=| (some P5 place sample value)-(some P3 place sample value) |.
The output signal T of the output signal Tv of the 1st absolute value circuit 23a and the 2nd absolute value circuit 23b
HAll be sent to comparator 25, they relatively after, send a control signal, so that choose the output of the 3rd subtraction circuit 93 or the output of the 5th subtraction circuit 95.When Tv less than T
HThe time, select circuit 24c according to the 1st status signal, make its output choose the output of the 3rd subtraction circuit 93, and be equal to or greater than T as Tv
HThe time, select circuit 24c according to the 2nd status signal, make its output become the output of the 5th subtraction circuit 95.
In said system, its color sub-carrier phase place of the adjacent image point signal of choosing is all with opposite with the phase place of separated signal, utilize these adjacent image point signals (value of anti-phase sampled point) can detect the direction that signal has less variation, utilize the pixel signal on the direction with low uncertainty that the C signal is separated from videoblankingsync again.This system guarantees to have correctly and clearly separates.
Secondly, utilize the circuit of Fig. 3 that the situation of Fig. 6 is described.
Suppose A/D converter 2 at moment T in a P7 place output signal (the 6th sample signal).The 3rd delay circuit 21a is at a P6 place output signal (the 5th sample signal); The 4th delay circuit 21b is at a P1 place output signal (the 1st sample signal); The 1st delay circuit 43 is at a P5 place output signal (the 4th sample signal); The 2nd delay circuit 44 is at a P2 place output signal (the 2nd sample signal); The 5th delay circuit 21c is at a P4 output signal (with separated signal); And the 6th delay circuit 21d at a P3 place output signal (the 3rd sample signal).
In the enforcement of Fig. 6 is novel, switching signal generator 26 is sent one and is controlled signal to the 2nd change-over circuit 24a, make it allow the output signal of A/D converter 2 to pass through, also send simultaneously and control signal to the 1st change-over circuit 24b, make it allow the output signal of the 4th delay circuit 21b to pass through.
In the case, the output of the 2nd change-over circuit 24a will be the sample value of a P7, and the output of the 1st change-over circuit 24b will be the sample value of a P1.
The 1st add circuit 22a is the output addition of the output of the 2nd change-over circuit 24a and the 1st change-over circuit 24b, and the output that 51 couples the 5th delay circuit 21c of 1/4, the 3 mlultiplying circuit are multiply by in the output of 63 couples of add circuit 22a of the 1st mlultiplying circuit multiply by 1/2.The 3rd subtraction circuit 93 deducts the output of the 1st mlultiplying circuit 63 from the output of the 3rd mlultiplying circuit 51, like this, the output signal of subtraction circuit 93 (Hc) can be expressed as:
-1/4(point P7 place sample value)
+ 1/2(point P4 place sample value)
-1/4(point P1 place sample value).
The 2nd add circuit 22b makes the output of the 1st delay circuit 43 and the output addition of the 6th delay circuit 21d, and the 2nd mlultiplying circuit 64 multiply by 1/4 to the output of add circuit 22b.The 5th subtraction circuit 95 deducts the output of the 2nd mlultiplying circuit 64 from the output of the 3rd mlultiplying circuit 51.Like this, the output signal of circuit 95 (Vc) can be expressed as:
-1/4(point P3 place sample value)
+ 1/2(point P4 place sample value)
-1/4(point P5 place sample value).
The 2nd subtraction circuit 92 is all delivered in the output of the output of the 1st change-over circuit 24b and the 2nd change-over circuit 24a, and the latter's output takes absolute value through the 1st absolute value circuit 23a again.So the output signal Tv of the 1st absolute value circuit 23a is:
Tv=|(point p7 place sample value)-(some P1 place sample value) |.
The 4th subtraction circuit 94 is all delivered in the output of the output of the 1st delay circuit 43 and the 6th delay circuit 21d, and the latter's output is taken absolute value by absolute value circuit 23b.So, the output of the 2nd absolute value circuit 23b, i.e. T
HSignal, but telogenesis:
T
H=| (some P5 place sample value)-(some P3 place sample value) |.
The output T of the output Tv of the 1st absolute value circuit 23a and the 2nd absolute value circuit 23b
HAll be sent to comparator 25, the latter is this two output Tv and T relatively
H, send controlling signal to of the 1st or the 2nd status signal then and select circuit 24c.Select circuit 24c to accept the output of the 3rd subtraction circuit 93 and the output of the 5th subtraction circuit 95.When Tv less than T
HThe time, comparator 25 outputs the 1st status signal, making and selecting the output of circuit 24c promptly is the output of the 3rd subtraction circuit 93.When Tv is equal to or greater than T
HThe time, comparator 25 outputs the 2nd status signal is to selecting circuit 24c, and making and selecting the output of circuit 24c promptly is the output of the 5th subtraction circuit 95.
In said system, its color sub-carrier phase place of the adjacent image point signal of choosing is all with opposite with the phase place of separated signal, utilize these adjacent image point signals (value of anti-phase sampled point) can detect the direction that signal has less variation, utilize the pixel signal that changes on the little direction that the C signal is separated from videoblankingsync again.This system guarantees to have correctly and clearly separates.
The action of explanation switching signal generator 26 now:
In Fig. 3, let us is noted certain particular point, for example puts P4.Some sample points separated signal phase is opposite with some P4 place of its color sub-carrier phase place can before or after delegation 2 locate to find, on lastrow and next line, two kinds of situations are arranged then, that is:
(1) sampled point of sampled point front in sampled point of sampled point back and next line in the lastrow line; And
(2) sampled point of sampled point back in sampled point of sampled point front and next line in the lastrow line.
Situation (1) and (2) illustrated in Fig. 5 and Fig. 6 respectively.For specific implementation Y-signal and C signal separation filter, must understand that the arrangement of neighbouring sample point belongs to any situation of Fig. 5 and Fig. 6 actually, and need send one to control signal to the 2nd change-over circuit 24a or the 1st change-over circuit 24b.For example, in Fig. 5 and Fig. 6, put the absolute value and the absolute value of some P4 place sample value of sample value (with separated signal) with the difference of some P1 place sample value at P4 place more once with the difference of some P2 place sample value, if following relationship is set up:
| (some P4 place sample value)-(some P1 place sample value) |
＜| (some P4 place sample value)-(some P2 place sample value) |
When with co-relation when opposite, switching signal generator 26 is also exported a control signal, makes the 2nd change-over circuit 24a allow the output signal of A/D converter 2 to pass through, and makes the 1st change-over circuit 24b allow the output signal of the 4th delay circuit 21b to pass through.
When the phase place of sampled signal fixedly the time, two-dimensional arrangements for example shown in Figure 4 is also fixed.Thereby, might constitute this generator 26, according to the understanding of opposite end 1 place's input signal horizontal scanning line, the 2nd and the 1st change- over circuit 24a and 24b are switched on each sampled point of each line.
The 1st subtraction circuit 91 subtracts each other the output of the 5th delay circuit 21c and the output of change-over circuit 24c, and the output of the 5th delay circuit 21c is compound TV signal, the output signal of change-over circuit 24c is the C signal of separating from this videoblankingsync, as a result, the output of the 1st subtraction circuit 91 is exactly Y-signal certainly.
In said system, for certain specific sampled point, preceding 2 and back 2 sample values of locating all are utilized to separate Y-signal and C signal in the sample value of the sampled point of lastrow line and next line sample point or the same line.Because used sample value has less variation, therefore to compare with common piece-rate system, native system can guarantee correctly and clearly separate.In addition, native system utilizes the value of neighbouring sample point to come detection signal to have the direction of less variation, and utilizes the filter that detects on the direction to export and separate Y-signal.As a result, though video image still can guarantee when sharp drastic change is arranged correctly and clearly separate.This also makes born image not intersect colourity or the distortion of briliancy of intersecting again.
In addition, the sampling pulse frequency equals 4 times of color sub-carrier frequency, and carry out the A/D conversion with such speed, phase place is then consistent with the axle of aberration phase place, therefore, can guarantee to draw anti-phase sampled point on lastrow line and next line, their color sub-carrier phase place is anti-phase for the phase place of particular sample point all.Do not need to store two lines in other words in native system, the single line storage is enough, therefore can reduce production cost.
Referring to Fig. 7, the modified form that this enforcement is novel will be described here.
Input 1 is provided among the figure, be used for accepting analog compound television signal (composite video signal), a sampling signal generator 3, it comprises a sampling pulse generation circuit (SP) that can produce pulse, the frequency of pulse generation is 4 times of color sub-carrier frequency, and its phase place is leading for chrominance signal or lags behind 45 °; An A/D converter 2, it accepts compound TV signal P, and is used to from the sampling pulse of sampling signal generator 3 videoblankingsync is transformed into digital signal; One the 1st delay circuit 43, it makes input signal postpone a horizontal scanning period; One the 2nd delay circuit 44, it makes input signal retardation ratio-horizontal scanning period time in short two sampling periods; Also have the 3rd, the 4th, the 5th, the 6th, the 7th and the 8th delay circuit 21a, 21b, 21c, 21d, 21e and 21f, they each all make input signal postpone two sampling periods.The the 1st to the 8th delay circuit has been formed the sample signal generator, and it produces the 1st to the 8th sample signal and with separated signal on the basis of the digital signal of A/D converter 2.With separated signal P(l, m) export by the 7th delay circuit 21e.The 1st sample signal P(l-1, m-2) by the 6th delay circuit 21d output, it with separated signal is compared, postponed the time that ratio-horizontal scanning period is also grown two sampling periods.The 2nd sample signal P(l-1 is from the 5th delay circuit 21c output m), it with separated signal is compared, postponed a horizontal scanning period.The 3rd sample signal P(l-1, m+2) by the output of the 2nd delay circuit 44, it with separated signal is compared, postponed the time that ratio-horizontal scanning period is lacked two sampling periods.The 4th sample signal P(l m-2) is the output of the 8th delay circuit 21f, it with separated signal is compared, postponed two sampling periods.The 5th sample signal P(l m+2) is the output of the 1st delay circuit 43, it with separated signal is compared leading two sampling periods.The 6th sample signal P(l+1 is from the 4th delay circuit 21b output m-2), it with separated signal is compared, leading ratio-horizontal scanning period is lacked the time in two sampling periods.The 7th sample signal P(l+1 m) is the output of the 3rd delay circuit 21a, it with separated signal is compared leading horizontal scanning period.The 8th sample signal P(l+1 m+2) is the output of A/D converter 2, it with separated signal is compared, leading ratio-horizontal scanning period is the time in long two sampling periods also.Also has one the 1st add circuit 22a, the 7th sample signal addition that it comes out the 8th sample signal that A/D converter 2 comes out and the 4th delay circuit 21b; One the 4th mlultiplying circuit 51, the signal times that it comes out to the 1st add circuit 22a is with 1/2; One the 2nd add circuit 22b, its output is from the 1st sample signal of the 6th delay circuit 21d and the 3rd sample signal sum from the 2nd delay circuit 44; One the 5th mlultiplying circuit 52, the signal times that it comes out to the 2nd add circuit 22b is with 1/2; One the 2nd change-over circuit 24a, its is accepted from 1/2 and signal of the 4th mlultiplying circuit 51 and from the 7th sample signal of the 3rd delay circuit 21a, and the 1st and the 2nd status signal according to switching signal generator 26 is exported above arbitrary signal selectively, output is exported the 7th sample signal by 1/2 and signal of the 4th mlultiplying circuit 51 when promptly receiving the 1st status signal when receiving the 2nd status signal.Figure 24b represents the 1st change-over circuit, it accepts the 2nd sample signal that come by the 5th delay circuit 21c and by 1/2 and signal of the 5th mlultiplying circuit 52, and according to exporting above arbitrary signal selectively by the 1st and the 2nd status signal of switching signal generator 26, export the 2nd sample signal when promptly receiving the 1st status signal, output 1/2 and signal when receiving the 2nd status signal.One the 2nd subtraction circuit 92 also is provided, and its output is the difference signal of selection output with the selection output of the 2nd change-over circuit 24a of the 1st change-over circuit 24b.The 1st absolute value circuit of 23a representative output Tv signal, the Tv signal promptly is the absolute value from the difference signal of the 2nd subtraction circuit 92.This absolute value circuit 23a and the 2nd subtraction circuit 92 have been formed a Tv signal generator together.94 represent the 4th subtraction circuit, and its output is the 5th sample signal of the 1st delay circuit 43 and the difference signal of the 4th sample signal that the 8th delay circuit 21f comes.23b represents to export T
HThe 2nd absolute value circuit of signal, T
HSignal promptly is the absolute value from the difference signal of the 4th subtraction circuit 94.This circuit 23b and the 4th subtraction circuit 94 have constituted T together
HSignal generator.Figure 25 is represented a comparator, and it is to from the Tv signal of the 1st absolute value circuit 23a with from the T of the 2nd absolute value circuit 23b
HSignal compares, when Tv less than T
HThe time, export the 1st status signal, and work as T
HExport the 2nd status signal during less than Tv.Tv signal generator, T
HSignal generator and comparator 25 have constituted testing circuit 80, are used for detecting the direction that videoblankingsync has less variation.22c represents the 3rd add circuit, and its output is the selection output of the 1st change-over circuit 24b and the selection output sum of the 2nd change-over circuit 24a.63 expressions the 1st mlultiplying circuit, it multiply by 1/4 to the output of the 3rd add circuit 22c.Figure 53 expression the 3rd mlultiplying circuit, it to the 7th delay circuit 21e come with separated signal times with 1/2.Figure 93 expression the 3rd subtraction circuit, its output are the difference signals of the output of the output of the 3rd mlultiplying circuit 53 and the 1st mlultiplying circuit 63, i.e. Hc signal, and the Hc signal is exactly the chrominance signal on the horizontal direction.The combination of the 3rd add circuit 22c, the 1st mlultiplying circuit 63 and the 3rd mlultiplying circuit 53 has constituted the Hc signal generating circuit.22d represents the 4th add circuit, and its output is the 5th sample signal of the 1st delay circuit 43 and the 4th sample signal sum that the 8th delay circuit 21f comes.64 represent the 2nd mlultiplying circuit, and it multiply by 1/4 to the output of the 4th add circuit 22d.Figure 95 expression the 5th subtraction circuit, its output be by the difference signal of the output signal of the output signal of the 3rd mlultiplying circuit 53 and the 2nd mlultiplying circuit 64, i.e. Vc signal, and the Vc signal is exactly the chrominance signal on the vertical direction.The 4th add circuit 22d and the 2nd mlultiplying circuit 64 have constituted the Vc signal generating circuit together.Sample signal generation circuit, Hc signal generating circuit and Vc signal generating circuit have constituted vertical filter and horizontal filter 70.Figure 24c represents that is selected a circuit, and its is accepted from the Hc signal of the 3rd subtraction circuit 93 with from the V of the 5th subtraction circuit 95
CSignal, accept the 1st and the 2nd status signal simultaneously from comparator 25, and selectively when receiving the 1st status signal to chrominance signal output 10 output Hc signals as chrominance signal, and when receiving the 2nd status signal to same end 10 output Vc signals as chrominance signal.91 represent the 1st subtraction circuit, and its output will separated signal and difference signal from the chrominance signal of selecting circuit 24c to export from the 7th delay circuit 21e's, and this difference signal is outputed to luminance signal end 1 as luminance signal.
The circuit operation of Fig. 7 is as follows:
Referring to Fig. 9 and Figure 10, it is novel to explain enforcement shown in Figure 7 below, in Fig. 9, Fig. 8 has been added some reference numbers and letter.The situation of Fig. 9 will illustrate with the circuit of Fig. 7:
Suppose A/D converter 2 at moment T in some P9 place sample value of output as the 8th sample signal.Then the 3rd delay circuit 21a exports a sample value as the 7th sample signal at a P8 place; The 4th delay circuit 21b exports a sample value as the 6th sample signal at a P7 place; The 1st delay circuit 43 is exported a sample value as the 5th sample signal at a P6 place; The 7th delay circuit 21e in sample value of some P5 place output as with separated signal; The 8th delay circuit 21f exports a sample value as the 4th sample signal at a P4 place; The 2nd delay circuit 44 is exported a sample value as the 3rd sample signal at a P3 place; The 5th delay circuit 21c exports a sample value as the 2nd sample signal at a P2 place; The 6th delay circuit 21d exports a sample value as the 1st sample signal at a P1 place.In the case, P5 is a point, and signal will be separated into Y-signal and C signal at that point.
Under the situation of Fig. 9, switching signal generation circuit 26 is exported the 2nd change-over circuit 24a that controls signal to of the 1st status signal, make it allow the output signal of the 1 1/2 doubling circuit 51 to pass through, export the 1st change-over circuit 24b that controls signal to of the 1st status signal simultaneously, make it allow the output signal of the 5th delay circuit 21c pass through.
The 1st add circuit 22a is the output addition of the output of A/D converter 2 and the 4th delay circuit 21b, and the output of 51 couples the 1st add circuit 22a of the 4th mlultiplying circuit multiply by 1/2.As a result, the output of the 4th mlultiplying circuit 51, but the i.e. output telogenesis of the 2nd change-over circuit 24a:
1/2 ((some P9 place sample value)+(some P7 place sample value))
The output of the 1st change-over circuit 24b provides a sample value at P2 place.
The 3rd add circuit 22c makes the output of the 2nd change-over circuit 24a and the output addition of the 1st change- over circuit 24b, and 63 outputs to add circuit 22c of the 1st mlultiplying circuit multiply by 1/4.The output of 53 couples the 7th delay circuit 21e of the 3rd mlultiplying circuit multiply by 1/2.The 3rd subtraction circuit 93 makes the output from the 3rd mlultiplying circuit 53 deduct output from the 1st mlultiplying circuit 63.As a result, but the output signal Hc telogenesis of the 3rd subtraction circuit 93:
-1/4(1/2 ((some P9 place sample value)+(some P7 place sample value)))
+ 1/2(point P5 place sample value)
-1/4(point P2 place sample value).
The 4th add circuit 22d makes the output of the 1st delay circuit 43 and the output addition of the 8th delay circuit 21f, and the 2nd mlultiplying circuit 64 then multiply by 1/4 to the output of add circuit 22d.The 5th subtraction circuit 95 makes the output of the 3rd mlultiplying circuit 53 and the output of the 2nd mlultiplying circuit 64 subtract each other.So output signal Vc telogenesis of subtraction circuit 95:
-1/4(point P4 place sample value)
+ 1/2(point P5 place sample value)
-1/4(point P6 place sample value).
The output signal of the output signal of the 2nd change-over circuit 24a and the 1st change-over circuit 24b all is admitted to the 2nd subtraction circuit 92, and the latter's output is taken absolute value by the 1st absolute value circuit 23a.But the output signal Tv telogenesis of the first absolute value circuit 23a:
Tv=|1/2 ((some P9 place sample value)+(some P7 place sample value))-(some P2 place sample value) |.
The 4th subtraction circuit 94 is all delivered in the output of the output of the 1st delay circuit 43 and the 8th delay circuit 21f, and the latter's output is taken absolute value by the 2nd absolute value circuit 23b.The output signal T of the 2nd absolute value circuit 23b
HCan be expressed as:
T
H=| (some P4 place sample value)-(some P6 place sample value) |
The output signal T of the output signal Tv of the 1st absolute value circuit 23a and the 2nd absolute value circuit 23b
HAll be admitted to comparator 25, the latter is to T
VAnd T
HCompare, send the 1st or the 2nd status signal then to selecting circuit 24c as control signal.In this step, select circuit 24c to accept from the output signal of the 3rd subtraction circuit 93 with from the output signal of the 5th subtraction circuit 95.When Tv less than T
HThe time, 25 couples of change-over circuit 24c of comparator export the 1st status signal, make it be output as the output of the 3rd subtraction circuit 93.When Tv is equal to or greater than T
HThe time, 25 couples of change-over circuit 24c of comparator export the 2nd status signal, make change-over circuit 24c be output as the output of the 5th subtraction circuit 95.
In illustrated system, utilized the color sub-carrier phase place that all anti-phase adjacent image point signal of particular pixels is come the little direction of change in detection signal, and utilized the pixel on this direction that the C signal is separated from videoblankingsync.Therefore, this system guarantees to have correctly and clearly separates.
The example of Figure 10 can contrast Fig. 7 and illustrate:
Supposition A/D converter 2 is exported a sample value (the 8th sample signal) at moment T in a P9 place now.Then the 3rd delay circuit 21a exports a sample value as the 7th sample signal in a P8 place; The 4th delay circuit 21b exports a sample value as the 6th sample signal in a P7 place; The 1st delay circuit 43 is exported a sample value as the 5th sample signal at a P6 place; The 7th delay circuit 21e in sample value of some P5 place output as with separated signal; The 8th delay circuit 21f exports a sample value as the 4th sample signal at a P4 place; The 2nd delay circuit 44 is exported a sample value as the 3rd sample signal at a P3 place; The 5th delay circuit 21c exports a sample value as the 2nd sample signal at a P2 place; The 6th delay circuit 21d exports a sample value as the 1st sample signal at a P1 place.
Under the situation of Figure 10, switching signal produces circuit 26 one of output and controls signal to the 2nd change-over circuit 24a, make it allow the output signal of the 3rd delay circuit 21a to pass through, export one simultaneously and control signal to the 1st change-over circuit 24b, make it allow the output signal of the 5th mlultiplying circuit 52 to pass through.
The 2nd add circuit 22b makes the output of the 2nd delay circuit 44 and the output addition of the 6th delay circuit 21d, and the 5th mlultiplying circuit 52 then multiply by 1/2 to the output of the 2nd add circuit 22b.Therefore, the output of the 5th mlultiplying circuit 52, but the i.e. output signal telogenesis of the 1st change-over circuit 24b:
1/2 ((some P3 place sample value)+(some P1 place sample value))
The output signal of the 2nd change-over circuit 24a just becomes a sample value at P8 place.
The 3rd add circuit 22c makes the output of the 2nd change-over circuit 24a and the output addition of the 1st change- over circuit 24b, and 63 outputs to add circuit 22c of the 1st mlultiplying circuit multiply by 1/4.The 3rd mlultiplying circuit 53 multiply by 1/2 to the output of the 7th delay circuit 21e.The 3rd subtraction circuit 93 makes the output from the 3rd mlultiplying circuit 53 deduct output from the 1st mlultiplying circuit 63.So, but the output signal Hc telogenesis of this subtraction circuit 93:
-1/4(1/2 ((some P3 place sample value)+(some P1 place sample value)))
+ 1/2(point P5 place sample value)
-1/4(point P8 place sample value).
The 4th add circuit 22d makes the output of the 1st delay circuit 43 and the output addition of the 8th delay circuit 21f, and 64 outputs to add circuit 22d of the 2nd mlultiplying circuit multiply by 1/4.The 5th subtraction circuit 95 makes the output of the 3rd mlultiplying circuit 53 and the 2nd mlultiplying circuit 64 subtract each other.But the output signal Vc telogenesis of subtraction circuit 95:
-1/4(point P4 place sample value)
+ 1/2(point P5 place sample value)
-1/4(point P6 place sample value).
The output that the output of the output of the 2nd change-over circuit 24a and the 1st change-over circuit 24b all is sent to the 2nd subtraction circuit 92, the 2 subtraction circuits 92 is taken absolute value by the 1st absolute value circuit 23a.But the output signal Tv telogenesis of the 1st absolute value circuit 23a as a result:
Tv=|1/2 ((some P3 place sample value)+(some P1 place sample value))-(some P8 place sample value) |
The output of the output of the 1st delay circuit 43 and the 8th delay circuit 21f all is sent to the 4th subtraction circuit 94, and the latter's output is taken absolute value by the 2nd absolute value circuit 23b.The output signal T of the 2nd absolute value circuit 23b
HBut telogenesis:
T
H=| (some P4 place sample value)-(some P6 place sample value) |.
The output signal T of the output signal Tv of the 1st absolute value circuit 23a and the 2nd absolute value circuit 23b
HAll be admitted to comparator 25, the latter is to Tv and T
HCompare, send the 1st or the 2nd status signal then to selecting circuit 24c as control signal.Change-over circuit 24c has accepted from the output signal of the 3rd subtraction circuit 93 with from the output signal of the 5th subtraction circuit 95.When Tv less than T
HThe time, 25 couples of change-over circuit 24c of comparator export the 1st status signal, make it be output as the output of the 3rd subtraction circuit 93.Work as T
VBe equal to or greater than T
HThe time, comparator 25 output the 2nd status signal makes the output of change-over circuit 24c become the output of the 5th subtraction circuit 95.
In illustrated system, utilized the color sub-carrier phase place that all anti-phase adjacent image point signal of particular pixels is come the little direction of change in detection signal, and utilized the pixel on this direction that the C signal is separated from videoblankingsync.Therefore, this system guarantees to have correctly and separating of C and Y-signal clearly.
Illustrate that now switching signal produces the action of circuit 26:
As shown in Figure 7, when noticing a specific sampled point, can find several sampled points on lastrow and next line scan line, their color sub-carrier phase place is anti-phase to the phase place of this particular sample point all, and this has two kinds of situations.Fig. 9 has illustrated a kind of situation of finding out sampled point in the lastrow line, and their color sub-carrier phase place is opposite with the phase place of the some P5 that is noted.Figure 10 then illustrates another kind of situation, and promptly these sampled points find in next line.For specific implementation Y-signal and C signal separation filter, in each sample point of being noted, just need commutation pulse to produce circuit 26 and go to produce control impuls, and remove to control the 2nd change-over circuit 24a and the 1st change-over circuit 24b according to the situation of Fig. 9 and Figure 10 by them.Now, assumed position P5 promptly is a point that will separate thereon.Compare in the sample value at this P5 place and lastrow line the quite sample value at some P2 place, and got the absolute value of result's difference.In addition, also compared in the sample value at some P5 place and next line and quite put the sample value at P8 place, and got the absolute value of result's difference.Compare these two absolute values again, if the following relationship formula is set up:
| (some P5 place sample value)-(some P2 place sample value) |
＞| (some P5 place sample value)-(some P8 place sample value) |,
Switching signal produces circuit 26 and just exports a control signal, makes the 2nd change-over circuit 24a allow the output signal of the 4th mlultiplying circuit 51 to pass through, and makes the 1st change-over circuit 24b allow the output signal of the 5th delay circuit 21c to pass through.
For opposite situation (Figure 10), switching signal produces circuit 26 can export a control signal, make the 2nd change-over circuit 24a allow the output signal of the 3rd delay circuit 21a to pass through, and make the 1st change-over circuit 24b allow the output signal of the 5th mlultiplying circuit 52 to pass through.
When the phase place of sampled signal fixedly the time, the figure of Fig. 8 is equally also fixed.Therefore, might constitute this switching signal and produce circuit 26, the understanding according to the horizontal scanning line of input signal can be switched the 2nd and the 1st change- over circuit 24a and 24b on each sampled point of each line.
The 1st subtraction circuit 91(luminance signal output circuit) output of the 7th delay circuit 21e and the output of selecting circuit 24c are subtracted each other.The output of the 7th delay circuit 21e is videoblankingsync, is the C signal of separating from this videoblankingsync and select the output of circuit 24c.As a result, the output of the 1st subtraction circuit 91 is exactly Y-signal certainly.
From the above as can be known, preceding 2 and back 2 sampled points of locating of lastrow line sampled point and next line sampled point or same line all are utilized to separate Y-signal and C signal.The advantage of native system just is that each sampled point has very little variation, and the result makes Y-signal can correctly separate with the C signal.In addition, utilize adjacent sampled point to come the little direction of change in detection signal here, and utilize this to detect filter on the direction and export and separate Y-signal.Even this method still can guarantee correct when video image has sharp drastic change and clearly separate, and make the image of generation again not intersect the distortion of colourity or intersection briliancy.
In enforcement shown in Figure 7 was novel, the A/D conversion was to have utilized sampling pulse, and the sampling pulse frequency is 4 times of color sub-carrier frequency, and its phase place is leading concerning color difference signal or lags behind 45 °.This just might draw some anti-phase sampled points at lastrow line and next line, and their color sub-carrier phase place is anti-phase for required sampled point, thereby can exempt the needs that adopt the storage of two lines.The utilization of one-way road storage also causes the reduction of production cost.
Claims (20)
1, a kind of filter that from the Phase Alternation Line system videoblankingsync, separates luminance signal and chrominance signal, it comprises:
A sampling signal generator is used for producing sampled signal, and the frequency of sampled signal is 4 times of color sub-carrier frequency, and its phase place is consistent with the U and the V axle of chrominance signal; An A/D converter, it utilizes this sampled signal that the signal transformation of input analog compound television is become digital signal;
A vertical filter and a horizontal filter, be used for separating the chrominance signal at each particular sample point place, this be utilize each sampled point by gained after the A/D conversion sample value and the sample value on several the 1st class neighbouring sample points adjacent with each specified point, these several the 1st class consecutive points have opposite color sub-carrier phase place concerning each specified point, and these several the 1st class consecutive points are on the lastrow or next line scan line of each specified point, perhaps utilize the 2nd class consecutive points of each specified point with delegation, these several the 2nd class consecutive points also have opposite color sub-carrier phase place for each specified point;
A checkout gear, it utilizes the sample value at the 1st class and the 2nd class neighbouring sample point place, can detect signal and change little direction;
A choice device, it utilizes the detected direction of checkout gear to select the output of vertical filter or horizontal filter;
A luminance signal generator, it utilizes the chrominance signal of separating from the digitlization videoblankingsync to export luminance signal.
2, the described separation filter of claim 1, wherein as the 1st class neighbouring sample point be those points of on the basis of the value of this specified point, selecting, and to utilize the value of the sampled point of lastrow line or next line.
3, the described separation filter of claim 1, wherein those points as the 2nd class neighbouring sample point are to have the way of the sampled point that gives the allocation relation to select with switching to this specified point according to the order that is determined by input PAL signal scanning line on each specified point.
4, filter that is used for separating luminance signal and chrominance signal, it comprises:
A sampling signal generator is used for producing sampled signal, and the frequency of sampled signal is 4 times of color sub-carrier frequency, and its phase place is consistent with the U and the V axle of chrominance signal;
An A/D converter, it utilizes this sampled signal that the input analog compound television signal transformation that contains luminance signal and chrominance signal is become digital signal;
A sample signal generator, its output: one with separated signal, one the 1st sample signal, it with separated signal is compared, postponed the time that ratio-horizontal scanning period is also grown a sampling period; One the 2nd sample signal, it with separated signal is compared, postponed the ratio-horizontal scanning period time in a short sampling period; One the 3rd sample signal, it with separated signal is compared, postponed two sampling periods; One the 4th sample signal, it with separated signal is compared leading two sampling periods; One the 5th sample signal, it with separated signal is compared the time in a short sampling period of leading ratio-horizontal scanning period; One the 6th sample signal, it with separated signal is compared the leading time in ratio-horizontal scanning period length-sampling period;
A switching signal generator is used for exporting the 1st status signal and the 2nd status signal;
One the 1st conversion equipment is used for accepting the 1st sample signal and the 2nd sample signal from the sample signal generator, and one of exports in this two samples signal a sample signal selectively according to the 1st status signal or the 2nd status signal;
One the 2nd conversion equipment is used for accepting the 5th sample signal and the 6th sample signal from the sample signal generator, and the 1st status signal or the 2nd status signal are produced response, one of exports in this two samples signal a sample signal selectively;
A T
VSignal output apparatus, its accepts the sample signal that the sample signal selected by the 1st conversion equipment and the 2nd conversion equipment are selected, and output T
VSignal, T
VSignal promptly is the high fdrequency component of luminance signal on the vertical direction;
A T
HSignal output apparatus, it accepts the 3rd and the 4th sample signal from the sample signal generator, and output T
HSignal, T
HSignal promptly is the high fdrequency component of luminance signal on the horizontal direction;
A comparator is used for comparison T
VAnd T
HSignal, and work as T
VSignal is less than T
HDuring signal, export the 1st status signal, and work as T
HSignal is less than T
VDuring signal, export the 2nd status signal;
A H
CSignal generator, its can export a chrominance signal H on the horizontal direction according to from sample signal selecting with separated signal, by the 1st conversion equipment of sample signal generator and by the sample signal that the 2nd conversion equipment is selected
C;
A V
CSignal generator, its according to from the sample signal generator with separated signal and from the 3rd and the 4th sample signal of sample signal generator, export the chrominance signal V on the vertical direction
C;
A choice device, it accepts chrominance signal H
CAnd V
CAnd from the 1st and the 2nd status signal of comparator, and when input the 1st status signal output chrominance signal H
CAs chrominance signal, and when input the 2nd status signal, export chrominance signal V
CAs chrominance signal;
A luminance signal generator, it exports luminance signal on from the chrominance signal of choice device and the basis with separated signal from the sample signal generator.
5, the described separation filter of claim 4, the 1st conversion equipment wherein can be exported the 2nd sample signal under the 1st status signal effect from the switching signal generator, and under the 2nd status signal effect, can export the 1st sample signal, and the 2nd conversion equipment wherein can export the 5th sample signal under the 1st status signal effect from the switching signal generator, and can export the 6th sample signal under the 2nd status signal effect.
6, the described separation filter of claim 5, switching signal generator wherein when from the sample signal generator the absolute value of the difference of the sample value of the sample value of separated signal and the 1st sample signal can be exported the 1st status signal less than with the absolute value of the difference of the sample value of the sample value of separated signal and the 2nd sample signal the time, and when the absolute value of the difference of the sample value of the sample value of separated signal and the 2nd sample signal can be exported the 2nd status signal less than with the absolute value of the difference of the sample value of the sample value of separated signal and the 1st sample signal the time.
7, the described separation filter of claim 5, wherein the frequency of switching signal generator is 4 times of color sub-carrier frequency, and alternately exports the 1st status signal and the 2nd status signal.
8, the described separation filter of claim 6, sample signal generator wherein comprises:
The 1st deferred mount that is used for exporting the 4th sample signal, it is used to the digital signal from conduct the 6th sample signal of A/D converter, and the 6th sample signal has been postponed the time in a short sampling period of ratio-horizontal scanning period and exported the 4th sample signal; The 5th deferred mount that is used for exporting with separated signal, it postpones two sampling periods to the 4th sample signal from the 1st deferred mount; The 2nd deferred mount that is used for exporting the 2nd sample signal, its from the 5th deferred mount with separated signal delay the time in ratio-horizontal scanning period weak point-sampling period; The 4th deferred mount that is used for exporting the 1st sample signal, it postpones two sampling periods to the 2nd sample signal from the 2nd deferred mount; The 6th deferred mount that is used for exporting the 3rd sample signal, its from the 5th deferred mount with two sampling periods of separated signal delay; And the 3rd deferred mount that is used for exporting the 5th sample signal, it has postponed two sampling periods to the 6th sample signal.
9, the described separation filter of claim 4, H wherein
CSignal generator comprises:
One the 1st adder, its output are by the 1st conversion equipment the 1st or the 2nd sample signal of selecting and the 5th or the 6th sample signal sum of being selected by the 2nd conversion equipment; The 1st multiplier, it to from the signal times of the 1st adder with 1/4; The 3rd multiplier, it to from the sample signal generator with separated signal times with 1/2; The 3rd substracting unit, its output from the signal of the 3rd multiplier with from the difference signal of the signal of the 1st multiplier as H
CSignal.V wherein
CSignal generator comprises: one the 2nd adder, its output are the 3rd and the 4th sample signal sums from the sample signal generator; The 2nd multiplier, it to from the signal times of the 2nd adder with 1/4; And the 2nd substracting unit, its output from the signal of the 3rd multiplier with from the difference signal of the signal of the 2nd multiplier as V
CSignal.
10, the described separation filter of claim 4, T wherein
VSignal generator comprises: one the 2nd substracting unit, be used for exporting the difference signal of the 1st or the 2nd sample signal of selecting by the 1st conversion equipment and the 5th or the 6th sample signal of selecting by the 2nd conversion equipment, and one the 1st absolute-value device, be used for exporting absolute value from the signal of the 2nd substracting unit as T
VSignal.T wherein
HSignal generator comprises: one the 4th substracting unit, be used for exporting from the 3rd sample signal of sample signal generator and the difference signal of the 4th sample signal, and one the 2nd absolute-value device, and be used for exporting absolute value from the signal of the 4th substracting unit as T
HSignal.
11, a kind of filter that from the Phase Alternation Line system videoblankingsync, separates luminance signal and chrominance signal, it comprises:
A sampling signal generator is used for producing sampled signal, and the frequency of sampled signal is 4 times of color sub-carrier frequency, and its phase place is leading for color difference signal or lags behind 45 °;
An A/D converter, it utilizes this sampled signal that the signal transformation of input analog compound television is become digital signal;
A vertical filter and a horizontal filter, be used for separating the chrominance signal at each particular sample point place, this be utilize each sampled point by gained after the A/D conversion sample value and the sample value on several the 1st class neighbouring sample points adjacent with each specified point, these several the 1st class consecutive points have opposite color sub-carrier phase place concerning each specified point, and these several the 1st class consecutive points are on the lastrow or next line scan line of each specified point, perhaps utilize the 2nd class consecutive points of each specified point with delegation, these several the 2nd class consecutive points also have opposite color sub-carrier phase place for each specified point;
A checkout gear, it utilizes the sample value at the 1st class and the 2nd class neighbouring sample point place, can detect signal and change little direction;
A choice device, it utilizes the detected direction of checkout gear to select the output of vertical filter or horizontal filter;
A luminance signal generator, its utilization remove from videoblankingsync from the way of the chrominance signal of choice device exports luminance signal.
12, the described separation filter of claim 11, wherein as the 1st class neighbouring sample point be those points of on the basis of the value of this specified point, selecting, and to utilize the value of the sampled point of lastrow line or next line.
13, the described separation filter of claim 11, wherein those points as the 2nd class neighbouring sample point are to have the way of the sampled point that gives the allocation relation to select with switching to this specified point according to the order that is determined by input PAL signal scanning line on each specified point.
14, a kind of filter that from the Phase Alternation Line system videoblankingsync, separates luminance signal and chrominance signal it comprise:
A sampling signal generator is used for producing sampled signal, and the frequency of sampled signal is 4 times of color sub-carrier frequency, and its phase place is leading for chrominance signal or lags behind 45 °;
An A/D converter, it is used to from the sampled signal of sampling signal generator the input videoblankingsync that contains luminance signal and chrominance signal is transformed into digital signal;
A sample signal generator, it accepts the digital signal from the A/D converter, and output: one with separated signal; One the 1st sample signal, it with separated signal is compared, postponed ratio-horizontal scanning period time in long two sampling periods also; One the 2nd sample signal, it with separated signal is compared, postponed a horizontal scanning period; One the 3rd sample signal, it with separated signal is compared, postponed the ratio-horizontal scanning period time in short two sampling periods; One the 4th sample signal, it with separated signal is compared, postponed two sampling periods; One the 5th sample signal, it with separated signal is compared leading two sampling periods; One the 6th sample signal, it with separated signal is compared the time in short two sampling periods of leading ratio-horizontal scanning period; One the 7th sample signal, it with separated signal is compared leading horizontal scanning period; One the 8th sample signal, it with separated signal is compared, leading ratio-horizontal scanning period is the time in long two sampling periods also;
A switching signal generator is used for exporting the 1st and the 2nd status signal;
One the 1st conversion equipment, its accepts the 2nd sample signal that be multiply by 1/2 the 1 1/2 and the sample signal that draws and come by the sample signal generator by the 1st and the 3rd sample signal sum, and export selectively this 1 1/2 and sample signal or this 2nd sample signal;
One the 2nd conversion equipment, its accepts the 7th sample signal that be multiply by 1/2 the 2 1/2 and the sample signal that draws and come by the sample signal generator by the 6th and the 8th sample signal sum, and export selectively this 2 1/2 and sample signal or this 7th sample signal;
A T
VSignal generator, its accepts to be selected the sample signal of output and to be selected the sample signal of output by the 2nd conversion equipment by the 1st conversion equipment, and on the output vertical direction high fdrequency component of luminance signal as T
VSignal;
A T
HSignal generator, it accepts to export from the 4th and the 5th sample signal of sample signal generator the high fdrequency component of luminance signal on the horizontal direction as T
HSignal;
A comparator, it is to from T
VAnd T
HThe T of signal generator
VSignal and T
HSignal compares, and works as T
VSignal is less than T
HExport the 1st status signal during signal, and work as T
HSignal is less than T
VExport the 2nd status signal during signal;
One is used for exporting horizontal direction chrominance signal H
CH
CSignal generator, it be based on from the sample signal generator with separated signal, select the sample signal of output and the sample signal of selecting output by the 2nd conversion equipment by the 1st conversion equipment;
One is used for exporting vertical direction chrominance signal V
CV
CSignal generator, it is based on separated signal and from the 4th and the 5th sample signal of sample signal generator;
A choice device, it is accepted from H
CSignal generator and V
CThe chrominance signal H of signal generator
CAnd V
C, also accept the 1st and the 2nd status signal, and when receiving the 1st status signal, export chrominance signal H from comparator
CAs chrominance signal, output chrominance signal V when receiving the 2nd status signal
CAs chrominance signal; And
A luminance signal generator that is used for exporting luminance signal, it be based on from the chrominance signal of choice device and from the sample signal generator with separated signal.
15, the described separation filter of claim 14, the 1st conversion equipment has wherein responded from the 1st status signal of switching signal generator and has exported the 3rd sample signal selectively, and has responded the 2nd status signal selection output the 1 1/2 and sample signal; The 2nd conversion equipment has wherein responded the 1st status signal and has selected output the 2 1/2 and sample signal, and responds the 2nd status signal selection output the 7th sample signal.
16, the described separation filter of claim 15, switching signal generator wherein with the sample value of separated signal with export the 1st status signal less than with the absolute value of the difference of the sample value of the sample value of separated signal and the 7th sample signal the time from the absolute value of the difference of the sample value of the 2nd sample signal of sample signal generator, and when the absolute value of the difference of the sample value of the sample value of separated signal and the 7th sample signal is exported the 2nd status signal less than with the absolute value of the difference of the sample value of the sample value of separated signal and the 2nd sample signal the time.
17, the described separation filter of claim 15, wherein the switching signal generator is alternately exported the 1st and the 2nd status signal with 4 times of frequencies to color sub-carrier frequency.
18, the described separation filter of claim 14, sample signal generator wherein comprises: one the 1st deferred mount, it is used to digital signal from the A/D converter as the 8th sample signal, and the 8th sample signal is postponed a horizontal scanning period, exports the 5th sample signal then; The 7th deferred mount that is used for exporting with separated signal, it postpones two sampling periods to the 5th sample signal from the 1st deferred mount; The 2nd deferred mount that is used for exporting the 3rd sample signal, its from the 7th deferred mount with separated signal delay ratio-horizontal scanning period lack time in two sampling periods; The 5th deferred mount that is used for exporting the 2nd sample signal, it postpones two sampling periods to the 3rd sample signal from the 2nd deferred mount; The 6th deferred mount that is used for exporting the 1st sample signal, it postpones two sampling periods to the 2nd sample signal from the 5th deferred mount; The 8th deferred mount that is used for exporting the 4th sample signal, its from the 7th deferred mount with two sampling periods of separated signal delay; The 3rd deferred mount that is used for exporting the 7th sample signal, it postpones two sampling periods to the 8th sample signal, and the 4th deferred mount that is used for exporting the 6th sample signal, it postpones two sampling periods to the 7th sample signal from the 3rd deferred mount.
19, the described separation filter of claim 14, H wherein
CSignal generator comprises: one the 3rd adder is used for exporting the 2nd sample signal or the 1 1/2 and sample signal and the 2 1/2 and sample signal or the 7th sample signal sum selecting from the 2nd conversion equipment to export of selecting output from the 1st conversion equipment; One the 1st multiplier, it to from the 3rd adder with signal times with 1/4; One the 3rd multiplier, it to from the sample signal generator with separated signal times with 1/2; One the 3rd substracting unit, its output be from the 3rd multiplier product signal poor with from the 1st multiplier product signal, and as H
CSignal output; And V wherein
CSignal generator comprises: one the 4th adder is used for exporting the 4th and the 5th sample signal sum from the sample signal generator; One the 2nd multiplier, it to from the 4th adder with signal times with 1/4; And one the 2nd substracting unit, be used for output from the 3rd multiplier product signal poor with from the 2nd multiplier product signal, and as V
CSignal output.
20, the described separation filter of claim 14, T wherein
VSignal generator comprises: one the 2nd substracting unit, be used for exporting the 2nd sample signal or the 1 1/2 and sample signal and the 2 1/2 and the sample signal selecting from the 2nd conversion equipment to export or the 7th sample signal poor of selecting output from the 1st conversion equipment, and one the 1st absolute-value device, be used for exporting absolute value from the difference signal of the 2nd substracting unit, and as T
VSignal output; And T wherein
HSignal generator comprises: one the 4th substracting unit, be used for exporting poor from the 4th sample signal of sample signal generator and the 5th sample signal, and one the 2nd absolute-value device, be used for exporting absolute value from the difference signal of the 4th substracting unit, and as T
HSignal output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN85104163A CN85104163B (en) | 1985-05-31 | 1985-05-31 | Separating filter of luminance and chrominance signals of pat system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN85104163A CN85104163B (en) | 1985-05-31 | 1985-05-31 | Separating filter of luminance and chrominance signals of pat system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN85104163A true CN85104163A (en) | 1986-12-24 |
| CN85104163B CN85104163B (en) | 1988-12-21 |
Family
ID=4793671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN85104163A Expired CN85104163B (en) | 1985-05-31 | 1985-05-31 | Separating filter of luminance and chrominance signals of pat system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN85104163B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1805554B (en) * | 2005-01-13 | 2011-01-19 | 三星电子株式会社 | Multi-direction space-time luminance/chroma detached digital video signal processing apparatus and method |
| CN101867834B (en) * | 2005-07-06 | 2012-01-11 | 奇景光电股份有限公司 | 2D (2-Dimensional) luminance-chrominance separating device and luminance-chrominance separating system |
-
1985
- 1985-05-31 CN CN85104163A patent/CN85104163B/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1805554B (en) * | 2005-01-13 | 2011-01-19 | 三星电子株式会社 | Multi-direction space-time luminance/chroma detached digital video signal processing apparatus and method |
| CN101867834B (en) * | 2005-07-06 | 2012-01-11 | 奇景光电股份有限公司 | 2D (2-Dimensional) luminance-chrominance separating device and luminance-chrominance separating system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN85104163B (en) | 1988-12-21 |
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