CN2916599Y - Digital true effective value rectifying module - Google Patents

Digital true effective value rectifying module Download PDF

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Publication number
CN2916599Y
CN2916599Y CN 200620103140 CN200620103140U CN2916599Y CN 2916599 Y CN2916599 Y CN 2916599Y CN 200620103140 CN200620103140 CN 200620103140 CN 200620103140 U CN200620103140 U CN 200620103140U CN 2916599 Y CN2916599 Y CN 2916599Y
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analog
digital
chip microcomputer
conversion circuit
digital conversion
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CN 200620103140
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熊文波
张绍栋
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HANGZHOU AIHUA INSTRUMENTS CO Ltd
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HANGZHOU AIHUA INSTRUMENTS CO Ltd
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Abstract

The utility model belongs to a special appliance of acoustic vibration measuring instrument, in particular to a digital virtual value demodulation circuit module with ROM and embedded software applicable to sound level meter. The utility model overcomes flaws of the current technologies and discloses a digital virtual value demodulation module composed of a big dynamic scope modulus converter and virtual value demodulation as well as time weighting processor. The dynamic scope of an intelligent 20-bit A virgule D converter reaches 90dB, and the external size is small, so the product is applicable to universal and standard sound level meter and meets acoustic measuring and proofreading sensitivity requirements. The digital virtual value demodulation module can be applied to sound level meter of acoustic vibration measuring instrument, and meet F, S, and I time weightings' requirement on Class I instrument in International Electrotechnical Commission IEC 61672-2002 Sound Level Meter when used to the measurement of time sound weighting level.

Description

Numeral real effective detection module
Affiliated field
The utility model belongs to acoustic vibration surveying instrument dedicated devices, is particularly useful for the digital real effective detecting circuit module of the band ROM and the embedded software of sound meter.
Background technology
Sound meter is a kind of exact instrument that is used to measure the sound pressure level of sound, and it is a widely used instrument in the acoustic measurement, is used widely in architectural acoustics and electroacoustics are measured.Raising along with the progress and the living standard of civilization of human society; work such as noise generaI investigation, Noise Prevention and Treatment and protection of acoustic environment; the acoustic environment that relates to machine manufacturing, communications and transportation and all conglomeraties such as household electrical appliance and body-building recreation is measured; thereby, in the national economy growing field, all be used widely.
Sound meter is made up of microphone, prime amplifier, frequency weighted module, detection and time weighted module, output interface and display indicator, and wave detector (detection and time weighted module) is the critical function parts of sound meter.
The wave detector of prior art adopts the logarithm rms detector and the integrated rms detector spare of AD536/AD637 one class of resolution element, the logarithm rms detector of prior art or the performance of dedicated devices are subjected to the restriction of electron device, its effective value calculates to adopt and approaches calculating, computational accuracy is not high, the time constant of its decision time weighted precision is determined by the CSET value, capacitor value is subject to changes in environmental conditions, the time constant of time weighted is become with environment, causes the rms detector of prior art to have following defective:
(1) be subjected to the device Effect on Performance, dynamic range is little, and the range of linearity is little.
(2) temperature stability of analog detector circuit and device is easily influenced by ambient temperature, causes the poor stability of circuit, and the precision that effective value calculates is low.
(3) operating frequency range of measuring-signal is narrower, adopts the simulation logarithmic detector of logarithmic amplifier, requires amplification quantity big during acquired signal, and the amplification quantity of amplifier when high frequency can not meet the demands, and causes the frequency range upper limit narrow, at 12.5 kHz～16kHz.
(4) used components and parts are many, and the consistance of analog device is poor, and reliability is low, and the precision of time weighted is low.
Summary of the invention
The utility model is in order to overcome the above-mentioned defective of prior art, a kind of digital real effective detection module is disclosed, constitute by great dynamic range analog to digital converter and real effective detection and time weighted processor, the dynamic range of 20 A/D converters of intelligence reaches 90dB, physical dimension is little, can be used for general and the standard sound meter, satisfy its acoustic measurement and acoustic calibration's sensitivity requirement.
Numeral real effective detection module is: by digital real effective detection module board 1 and be installed in great dynamic range analog to digital converter 11 on this module board 1 and real effective detection and time weighted processor 12 constitute, wherein:
Great dynamic range analog to digital converter 11 comprises the A/D of three road synchronous sampling signals 0Analog to digital conversion circuit 111, A/D 1Analog to digital conversion circuit 112 and A/D 2Analog to digital conversion circuit 113 and three road A/D converters and sampled data buffer zone;
Real effective detection and time weighted processor 12 are single-chip microcomputer; The modulus switching device of three road signal sampling analog to digital conversion circuits is respectively three A/D converters on the single-chip microcomputer, and the sampled data buffer zone is arranged among the RAM of single-chip microcomputer;
The A/D of three road synchronous sampling signals 0Analog to digital conversion circuit 111, A/D 1Analog to digital conversion circuit 112 and A/D 2The input end of analog to digital conversion circuit 113 connects the output terminal of external analog sampled signal 2;
Store real effective detection and time weighted handling procedure among the Flash ROM of single-chip microcomputer 12;
The LED display interface of single-chip microcomputer 12 connects outside light-emitting diode display 4;
The RS232 serial line interface of single-chip microcomputer 12 connects the system's back-end computer 5 under the digital real effective detection module;
Two road D/A output terminals of single-chip microcomputer 211 connect the direct current table 6 of decibel indication;
The power supply of numeral real effective detection module board 1 connects external power source 3.
Described digital real effective detection module is: great dynamic range analog to digital converter 11 is one 20 A/D sampled data compositors, and it is by 12 sampled signal analog to digital conversion circuit A/ D 0212,12 sampled signal analog to digital conversion circuit A/ D 1213 and 12 sampled signal analog to digital conversion circuit A/D 2214 and single-chip microcomputer 211 on 20 A/D sampled data buffer zones form, wherein:
12 sampled signal analog to digital conversion circuit A/D 0212 comprise 12 A/D converters that an absolute value amplifier 215 and single-chip microcomputer 211 carry, and the output terminal of absolute value amplifier 215 connects the input end of an A/D converter of single-chip microcomputer 211;
12 sampled signal analog to digital conversion circuit A/D 1213 comprise one 2 412 A/D converters that times signal amplifier 216, absolute value amplifier 217 and single-chip microcomputer 211 carry, the output terminal of absolute value amplifier 217 connects the input end of an A/D converter of single-chip microcomputer 211;
12 sampled signal analog to digital conversion circuit A/D 2214 comprise one 2 812 A/D converters that times signal amplifier 218, absolute value amplifier 219 and single-chip microcomputer 211 carry, the output terminal of absolute value amplifier 219 connects the input end of an A/D converter of single-chip microcomputer 211;
Absolute value amplifier 215,217 and 219 is made of two-stage calculation amplifier respectively;
12 sampled signal analog to digital conversion circuit A/ D 0212,12 sampled signal analog to digital conversion circuit A/ D 1213 and 12 sampled signal analog to digital conversion circuit A/D 2214 three tunnel outputs select one the tunnel to deposit 20 A/D sampled data buffer zones in.
Under real effective detection on the single-chip microcomputer 211 and time weighted handling procedure control, regularly interrupt, three tunnel 12 A/D sample circuit synchronized samplings, amplitude according to the A/D signal of sampling, three the tunnel select one the tunnel to send 20 A/D sampled data buffer zones, when sampling is input as small-signal, i.e. 12 sampled signal analog-digital conversion a/ds 0212 when not overflowing, and closes A/D 1213 and A/D 2A/D is selected in 214 output 020 A/D sampled data buffer zones are sent in 212 output; Work as A/D 0212 overflow time and sampled signal amplification 2 4Doubly, when the A/D conversion is not still overflowed, close A/D 0212 and A/D 2214 output selects sampled signal to amplify 2 8A/D doubly 120 A/D sampled data buffer zones are sent in 213 output; As A/D through the A/D conversion 0And A/D 1Output signal when all overflowing, close A/D 0212 and A/D 1A/D is selected in 213 output 220 A/D sampled data buffer zones are sent in 214 output; The maximum dynamic range of 20 sampled signal A/D conversions is 90dB.
Three tunnel 12 A/D converters and 20 A/D sampled data buffer zones all on single-chip microcomputer 211, adopt signal amplifier and absolute value amplifier and 20 A/D sampled data generated datas of operational amplifier, have great dynamic range and high-temperature stability.
Described digital real effective detection module is: three tunnel 12 A/D converters are analog/digital converter spare at a high speed, select single-chip microcomputer at a high speed, low-power consumption for use, and single-chip microcomputer carries the A/D converter more than three.
Preferred MSP430 series MSP430F149 carries 8 A/D converters, and sampling rate reaches 150kSPS～200kSPS, and the survey frequency upper limit of module is more than 20k.
Described digital real effective detection module, be: the area of digital real effective detection module board is 2000mm 2～2500mm 2, its thickness 6～10mm; Numeral real effective detection module adopts digital device and less resolution element, and the circuit board volume is little.
Described digital real effective detection module is: the output interface of digital real effective detection module comprises RS232 serial line interface, the output of two-way direct current and LED display interface, wherein:
The RS232 serial line interface connects the acoustic measurement system computing machine;
The output of two-way direct current connects DC meter or data acquisition unit;
The LED display interface connects 3 half seven segment digital tubes light-emitting diode displays.
The output interface of real effective detection module comprises RS232 serial line interface, the output of two-way direct current and LED display interface, and they are carried by single-chip microcomputer 211, and the output interface of module is multiple functional.
Advantage of the present utility model is:
(1) the utility model module adopts three 12 A/D converters that single-chip microcomputer at a high speed carries, three tunnel 12 A/D sampled data by synchronized sampling selects one, and synthetic one tunnel 20 A/D sampled data output has improved dynamic range, obtain high-precision detection result, and cost is low.
(2) the utility model module adopts real effective detection and time weighted processor, effective value calculates in strict accordance with the effective value defined formula, the time weighted is that numerical index is average, and time constant is the parameter that single-chip microcomputer 211 presets, and has improved processing accuracy and data stability and reliability.
(3) adopt AD to change the process software of sampling and embedding single-chip microcomputer, directly calculating root-mean-square value is real effective, and operating frequency range is wide, frequency of operation upper limit f OnCan reach 20kHz, satisfy f among the international sound meter standard IEC 61672-2002 OnThe requirement of 〉=16kHz.
(4) module is made up of same single-chip microcomputer and a plurality of homotype operational amplifier, and used components and parts are less, high conformity, reliability height.
Description of drawings
Fig. 1 is the formation synoptic diagram of the utility model numeral real effective detection module;
Fig. 2 is the electric theory diagram of the utility model numeral real effective detection module embodiment;
Fig. 3 is the utility model numeral real effective detection module DSP program block diagram;
Fig. 4 is that sampling subroutine block diagram is interrupted in the timing of the utility model numeral real effective detection module digital signal processing;
Fig. 5 is the electric theory diagram of the utility model numeral real effective detection module embodiment;
Fig. 6 is the synthetic synoptic diagram of 20 A/D sampled datas of this practical digital real effective detection module.
Among Fig. 1: 1-digital real effective detection module board; 11-great dynamic range analog to digital converter, the detection of 12-real effective and time weighted processor, 111-A/D 0Analog to digital conversion circuit; 112-A/D 1Analog to digital conversion circuit; 113-A/D 2Analog to digital conversion circuit; 2-analog sampling signal source; 3-external power source; 4-outside display; 5-outside computing machine; 6-outside direct current table.
Among Fig. 2: 21-digital real effective detection module board; 211-single-chip microcomputer, 212-12 sampled signal analog to digital conversion circuit A/D 0, 213-12 sampled signal analog to digital conversion circuit A/D 1, 214-12 sampled signal analog to digital conversion circuit A/D 2215-absolute value amplifier; 216-2 4Signal amplifier; 217-absolute value amplifier; 218-2 8Signal amplifier; 219-absolute value amplifier.
Among Fig. 5: 51-digital real effective detection module board; 511-single-chip microcomputer; 512-double operational absolute value amplifier; 513-2 4Times operational amplifier; 514-double operational absolute value amplifier; 515-2 4Times operational amplifier; 516-double operational absolute value amplifier.
Embodiment
Provide embodiment of the present utility model below in conjunction with accompanying drawing:
Fig. 2 is the electric theory diagram of the utility model numeral real effective detection module embodiment;
Fig. 3 is the utility model numeral real effective detection module DSP program block diagram;
Fig. 4 is that sampling subroutine block diagram is interrupted in the timing of the utility model numeral real effective detection module digital signal processing;
Fig. 5 is the electric theory diagram of the utility model numeral real effective detection module embodiment;
Fig. 6 is the synthetic synoptic diagram of 20 A/D sampled datas of the utility model numeral real effective detection module.
What Fig. 1 provided is the formation synoptic diagram of the utility model numeral real effective detection module.Numeral real effective detection module is by digital real effective detection module board 1 and be installed in the great dynamic range digital to analog converter 11 of module board 1 and real effective detection and time weighted processor 12 constitute.Great dynamic range digital to analog converter 11 is by comprising A/D 0Analog to digital conversion circuit 111, A/D 1Analog to digital conversion circuit 112 and A/D 2Analog to digital conversion circuit 113, three road analog to digital conversion circuits are from the output terminal synchronized sampling of the analog sampling signal source of front end, the output of three road analog to digital conversion circuits send real effective detection and time weighted processor 12 to handle, and result is added to display 4, computing machine 5 and direct current table 6 through conversion.
Fig. 2 has provided the electric theory diagram of the utility model numeral real effective detection module embodiment.The great dynamic range analog to digital converter is by 12 sampled signal analog to digital conversion circuit A/ D 0212,12 sampled signal analog to digital conversion circuit A/ D 1213 and 12 sampled signal analog to digital conversion circuit A/D 2214 and single-chip microcomputer 211 on one 20 A/D sampled data compositors constituting of 20 A/D sampled data buffer zones.Three tunnel 12 sampled signal analog to digital conversion circuit A/D 0212, A/D 1213 and A/D 2214 sampling input end parallel connection, three road synchronized samplings.
12 sampled signal analog to digital conversion circuit A/D 0212 comprise 12 A/D converter A/D0 that an absolute value amplifier 215 and single-chip microcomputer 211 carry, the output terminal of absolute value amplifier 215 connects the input end of the A/D0 converter of single-chip microcomputer 211, during sampling, positive and negative alternation sampled signal is amplified through absolute value amplifier 215, become the alternating signal of positive direct-current clamper, the A/D0 converter on single-chip microcomputer 211 converts 12 position digital signals to again.
12 sampled signal analog to digital conversion circuit A/D 1213 comprise one 2 412 A/D converter A/D1 that times signal amplifier 216, absolute value amplifier 217 and single-chip microcomputer 211 carry, the output terminal of absolute value amplifier 217 connects the input end of the A/D1 converter of single-chip microcomputer 211, and during sampling, positive and negative alternation sampled signal is through 2 4Times signal amplifier 216 amplifies and absolute value amplifier 217 amplifications, becomes the alternating signal of positive direct-current clamper, and the A/D1 converter on single-chip microcomputer 211 converts 12 position digital signals to again.
12 sampled signal analog to digital conversion circuit A/D 2214 comprise one 2 812 A/D converter A/D2 that times signal amplifier 218, absolute value amplifier 219 and single-chip microcomputer 211 carry, the input end of the A/D2 converter that the output terminal of absolute value amplifier 219 connects, during sampling, positive and negative alternation sampled signal is through 2 8Times signal amplifier 218 amplifies and absolute value amplifier 219 amplifications, becomes the alternating signal of positive direct-current clamper, and the A/D2 converter on single-chip microcomputer 211 converts 12 position digital signals to again.
Dual power supply+Vcc on the numeral real effective detection module board 21 ,-Vcc and GND be connected the output terminal of external power source 3, and sampling input termination is from outside analog sampling signal source 2, and the sampling input end connects absolute value amplifier 215,2 4 Signal amplifier 216 and 2 8The input end of signal amplifier 218; Three road absolute value amplifiers 215,217 and 219 output terminal are connected three A/D converter A/D0, A/D1 of single-chip microcomputer 211 and the input end of A/D2 respectively.
12 sampled signal analog to digital conversion circuit A/ D 0212,12 sampled signal analog to digital conversion circuit A/ D 1213 and 12 sampled signal analog to digital conversion circuit A/D 2214 under the timing interruption of single-chip microcomputer 211 and sampling routine control to simulating signal source synchronized sampling and analog to digital conversion, and in the output of A/D0, A/D1 and A/D2 three road A/D converters, select one the tunnel to deposit 20 A/D sampled data buffer zones in.What Fig. 3 and Fig. 4 provided is that the utility model numeral real effective detection module DSP program block diagram interrupts and the sampling routine block diagram with timing.
After numeral real effective detection module powers up, start single-chip microcomputer 211 DSP program, call timed interrupt cycle and sampling time, effective value calculating and time weighted parameter that initialization is provided with, the timed interrupt cycle of the utility model embodiment is set to 20 μ s～50 μ s, and embodiment is set to 22 μ s; Activate and regularly interrupt and sampling routine, per 22 μ s regularly interrupt once, three tunnel 12 sampled signal analog to digital conversion circuit A/D 0, A/D 1And A/D 2Synchronized sampling and analog to digital conversion, and to three tunnel 12 sampled signal analog-digital conversion a/ds 0, A/D 1And A/D 2Output is done three and is selected a processing, at first judges A/D 0Whether be complete 1, as be " N " that promptly sampled signal is a small-signal, 12 A/D transformation results are not overflowed, and get 12 A/D 0The result deposits 20 A/D sampling buffers in; As be " Y ", then continue to judge A/D 1Whether be complete 1, as be " N " that promptly sampled signal is middle signal, 12 A/D transformation results are not beneficial to be gone out, and just gets 12 A/D 1The result also moves to left and deposits 20 A/D sampling buffers in after 4; As be " Y ", then get 12 A/D 2The result also moves to left and deposits 20 A/D sampling buffers in after 4; Work as A/D 0, A/D 1And A/D 2After output three selects one to deposit 20 A/D sampling buffers in, withdraw from regularly and interrupt; Then, wait for next time and regularly interrupting that each interrupts sampling, analog to digital conversion and three selects one to deposit 20 A/D sampling buffers in.
Once regularly interrupt sampling, analog to digital conversion and the output of three road A/D translation data and select data that deposit 20 A/D sampling buffers in, carry out real effective according to alternating signal effective value computing formula (1) and calculate:
The effective value that last time calculates is delivered to the effective value shift register, when this effective value is delivered to the effective value shift register, last effective value is shifted out, and this effective value and last effective value carry out the time weighted and calculate, and form each time weighted recursion result successively; When needs are exported as a result, after the D/A converter that single-chip microcomputer carries is done the digital-to-analogue conversion, send outside DC meter indication with the result, show translation interface through LED simultaneously, send outside 3 half seven segment digital tubes light-emitting diode displays to show, also can send the external system computing machine simultaneously through the RS232 serial line interface.
Fig. 5 provides the electric theory diagram of an embodiment of the utility model numeral real effective detection module.It is high speed, the low-power scm of MSP430F149 that single-chip microcomputer 511 adopts models, has 8 high-speed a/d converter A/D0～A/D7,2 high-speed d/a converter D/A1 and D/A2, RS232 serial line interface and LED and shows translation interface.Absolute value amplifier 512,514 and 516 adopts two-stage TLE2022 operational amplifier, 2 4 Times signal amplifier 513 and 515 adopts one-level TLE2022 operational amplifiers.
12 sampled signal analog to digital conversion circuit A/D 0Comprise 12 A/D converter A/D0 that absolute value amplifier 512 and single-chip microcomputer 511 carry, the output terminal of absolute value amplifier 512 connects the input end of A/D0 converter.
12 sampled signal analog to digital conversion circuit A/D 1Comprise 2 412 A/D converter A/D1 that times signal amplifier 513, absolute value amplifier 514 and single-chip microcomputer 511 carry, 2 4The output terminal of times signal amplifier 513 connects the input end of absolute value amplifier 514, and the output terminal of absolute value amplifier 514 connects the input end of A/D1 converter.
12 sampled signal analog to digital conversion circuit A/D 2Comprise two 2 412 A/D converter A/D2 that times signal amplifier 513 and 515, absolute value amplifiers 516 and single-chip microcomputer 511 carry, 2 4The output terminal of times signal amplifier 513 connects 2 4The input end of times signal amplifier 515,2 4The output terminal of times signal amplifier 515 connects the input end of absolute value amplifier 516, and the output terminal of absolute value amplifier 516 connects the input end of the A/D converter A/D2 of single-chip microcomputer 511.
The synthetic synoptic diagram of 20 A/D sampled datas of the digital real effective detection of the novel usefulness of this reality module as shown in Figure 6.The per 22 μ s of MSP430F149 are to three tunnel 12 sampled signal analog to digital conversion circuit A/D 0, A/D 1And A/D 2Synchronized sampling and analog to digital conversion are at first judged A/D 0Whether be complete 1, as be " N " that promptly sampled signal is a small-signal, 12 A/D transformation results are not overflowed, and get 12 A/D 0The result deposits 20 A/D sampling buffers in; As be " Y ", then continue to judge A/D 1Whether be complete 1, as be " N " that promptly sampled signal is middle signal, 12 A/D transformation results are not beneficial to be gone out, and just gets 12 A/D 1The result also moves to left and deposits 20 A/D sampling buffers in after 4; As be " Y ", then get 12 A/D 2The result also moves to left and deposits 20 A/D sampling buffers in after 4; So just with A/D 0, A/D 1And A/D 2Output three selects one to deposit in 20 A/D sampling buffers.
Numeral real effective detection module can be applicable in the sound meter of acoustic vibration surveying instrument, is being used for the time during weighted sound level measurement, satisfies F, S among the IEC61672-2002 of International Electrotechnical Commission " sound meter ", three kinds of time weighteds of the I requirement to 1 grade of instrument.

Claims (6)

1. digital real effective detection module, it is characterized in that: by digital real effective detection module board (1) and be installed in great dynamic range analog to digital converter (11) on this module board (1) and real effective detection and time weighted processor (12) constitute, wherein:
Great dynamic range analog to digital converter (11) comprises the A/D of three road synchronous sampling signals 0Analog to digital conversion circuit (111), A/D 1Analog to digital conversion circuit (112) and A/D 2Analog to digital conversion circuit (113) and three road A/D converters and sampled data buffer zone;
Real effective detection and time weighted processor (12) are single-chip microcomputer; The modulus switching device of three road signal sampling analog to digital conversion circuits is respectively three A/D converters on the single-chip microcomputer, and the sampled data buffer zone is arranged among the RAM of single-chip microcomputer;
The A/D of three road synchronous sampling signals 0Analog to digital conversion circuit (111), A/D 1Analog to digital conversion circuit (112) and A/D 2The input end of analog to digital conversion circuit (113) connects the output terminal of external analog sampled signal (2);
Store real effective detection and time weighted handling procedure among the Flash RAM of single-chip microcomputer (12);
The LED display interface of single-chip microcomputer (12) connects outside light-emitting diode display (4);
The RS232 serial line interface of single-chip microcomputer (12) connects the system's back-end computer (5) under the digital real effective detection module;
Two road D/A output terminals of single-chip microcomputer 211 connect the direct current table (6) of decibel indication;
The power supply of numeral real effective detection module board (1) connects external power source (3).
2. according to the described digital real effective detection module of claim 1, it is characterized in that: great dynamic range analog to digital converter (11) is one 20 A/D sampled data compositors, and it is by 12 sampled signal analog to digital conversion circuit A/D 0(212), 12 sampled signal analog to digital conversion circuit A/D 1(213) and 12 sampled signal analog to digital conversion circuit A/D 2(214) 20 A/D sampled data buffer zones and on the single-chip microcomputer (211) are formed, wherein:
12 sampled signal analog to digital conversion circuit A/D 0(212) comprise 12 A/D converters that an absolute value amplifier (215) and single-chip microcomputer (211) carry, the output terminal of absolute value amplifier (215) connects the input end of an A/D converter of single-chip microcomputer (211);
12 sampled signal analog to digital conversion circuit A/D 1(213) comprise one 2 412 A/D converters that times signal amplifier (216), an absolute value amplifier (217) and single-chip microcomputer (211) carry, the output terminal of absolute value amplifier (217) connects the input end of an A/D converter of single-chip microcomputer (211);
12 sampled signal analog to digital conversion circuit A/D 2(214) comprise one 2 812 A/D converters that times signal amplifier (218), an absolute value amplifier (219) and single-chip microcomputer (211) carry, the output terminal of absolute value amplifier (219) connects the input end of an A/D converter of single-chip microcomputer (211);
Absolute value amplifier (215), (217) and (219) are made of two-stage single supply operational amplifier respectively;
12 sampled signal analog to digital conversion circuit A/D 0(212), 12 sampled signal analog to digital conversion circuit A/D 1(213) and 12 sampled signal analog to digital conversion circuit A/D 2(214) three tunnel outputs select one the tunnel to deposit 20 A/D sampled data buffer zones in.
3. digital real effective detection module according to claim 1 and 2 is characterized in that: three tunnel 12 A/D converters are analog/digital converter spare at a high speed, select single-chip microcomputer at a high speed, low-power consumption for use, and single-chip microcomputer carries the A/D converter more than three.
4. digital real effective detection module according to claim 1, it is characterized in that: the area of digital real effective detection module board is 2000mm 2～2500mm 2, its thickness 6～10mm.
5. according to claim 1 or 4 described digital real effective detection modules, it is characterized in that: the output interface of digital real effective detection module comprises RS232 serial line interface, the output of two-way direct current and LED display interface, wherein:
The RS232 serial line interface connects the acoustic measurement system computing machine;
The output of two-way direct current connects DC meter or data acquisition unit;
The LED display interface connects 3 half seven segment digital tubes light-emitting diode displays.
6. digital real effective detection module according to claim 3 is characterized in that: the output interface of digital real effective detection mould comprises RS232 serial line interface, the output of two-way direct current and LED display interface, wherein:
The RS232 serial line interface connects the acoustic measurement system computing machine;
The output of two-way direct current connects DC meter or data acquisition unit;
The LED display interface connects 3 half seven segment digital tubes light-emitting diode displays.
CN 200620103140 2006-04-28 2006-04-28 Digital true effective value rectifying module Expired - Lifetime CN2916599Y (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105115590A (en) * 2015-08-28 2015-12-02 苏州市博得立电源科技有限公司 Environmental noise measuring instrument based on sine wave inverter power supply
CN106352974A (en) * 2016-08-12 2017-01-25 湖南大学 Digital sound level meter pulse weighted method and device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105115590A (en) * 2015-08-28 2015-12-02 苏州市博得立电源科技有限公司 Environmental noise measuring instrument based on sine wave inverter power supply
CN106352974A (en) * 2016-08-12 2017-01-25 湖南大学 Digital sound level meter pulse weighted method and device
CN106352974B (en) * 2016-08-12 2019-03-12 湖南大学 A kind of digital sound level meter pulse weighted method and device

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Granted publication date: 20070627

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