CN2909724Y - TV. set with digital dimodulator circuit - Google Patents

TV. set with digital dimodulator circuit Download PDF

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Publication number
CN2909724Y
CN2909724Y CNU2006200823739U CN200620082373U CN2909724Y CN 2909724 Y CN2909724 Y CN 2909724Y CN U2006200823739 U CNU2006200823739 U CN U2006200823739U CN 200620082373 U CN200620082373 U CN 200620082373U CN 2909724 Y CN2909724 Y CN 2909724Y
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CN
China
Prior art keywords
demodulation chip
chip
tuner
demodulation
television set
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU2006200823739U
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Chinese (zh)
Inventor
佘智勇
石新利
钟鸣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hisense Group Co Ltd
Qingdao Hisense Electronics Co Ltd
Original Assignee
Hisense Group Co Ltd
Qingdao Hisense Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Priority to CNU2006200823739U priority Critical patent/CN2909724Y/en
Application granted granted Critical
Publication of CN2909724Y publication Critical patent/CN2909724Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Circuits Of Receivers In General (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Noise Elimination (AREA)

Abstract

The utility model discloses a TV set with a new-type digital demodulation circuit, including a tuner and a main control chip which is connected with a bus end of a demodulation chip via a I <2> C bus. The other bus end of the demodulation chip is connected correspondingly with the bus end of the turner whose intermediate frequency signal output end is linked with an orthogonal signal input end of the demodulation chip. The demodulation chip is connected with a corresponding pin of a dynamic memorizer via an address line, a data line and a control signal line. The demodulation chip outputs a TS data stream which has been disposed to a follow-up decoding circuit via a data output end of the demodulation chip. By adopting a new-type OFDM demodulation technology and matching with a SDRAM dynamic memorizer to carry through long-time data storage, the utility model adopts a crystal oscillator with high precision, which can advance the signal locking speed and ameliorate the delicacy degree of incepting, improving the anti-multipath interference function and mobile incepting performance of the TV set. The utility model is applicable to the mobile incepting system.

Description

Television set with new digital demodulator circuit
Technical field
The utility model belongs to the TV set circuit technical field, specifically, relates to a kind of OFDM demodulator circuit that is used for digital television receiver.
Background technology
At present, the DVB-T demodulation scheme of international popular is for developing the nineties in last century, it can well support the terrestrial DTV of fixing or low speed to receive, general terrestrial DTV receiving system all adopts the DVB-T demodulation mode, be that the COFDM mode realizes, its common circuit theory diagrams are referring to shown in Figure 1.This digital television receiver is easy to generate bigger error code under situation about moving, can't realize the purpose of high speed received television signal, antijamming capability a little less than.But, in some system, in for example vehicle-mounted mobile TV-system, have relatively high expectations for the promptly anti-dynamic multi-path interference/frequency selective fading channels of Doppler effect aspect, in this type systematic, there is certain deficiency in the DVB-T demodulation mode, and the performance that mobile reception aspect has is difficult to satisfy fully the requirement of system.
Summary of the invention
The utility model is easy to generate bigger error code for the digital television receiver that solves available technology adopting DVB-T demodulation mode under situation about moving, thereby can't realize the problem of high speed received television signal, a kind of television set with new digital demodulator circuit is provided, by adopting new OFDM demodulation chip, increase a slice SDRAM again and improve data-handling capacity, thereby improve threshold level greatly, relatively be adapted at using in the reception of Mobile Digital TV system.
For solving the problems of the technologies described above, the utility model is achieved by the following technical solutions:
A kind of television set with new digital demodulator circuit comprises tuner and main control chip, and described main control chip passes through I 2The C bus links to each other with one road bus end of a demodulation chip, the corresponding connection of bus end of another road bus end of described demodulation chip and tuner; The intermediate-freuqncy signal output of described tuner connects the orthogonal signalling input of demodulation chip, and described demodulation chip is connected the corresponding pin of a memory by address wire, data wire and control signal wire; Data after demodulation chip will be handled are exported to follow-up decoding circuit by its data output end.
As the further qualification to technique scheme, it is the OFDM demodulation chip realization of LGS_8222_A1 that described demodulation chip adopts a model, and connected memory is a dynamic memory SDRAM.Described demodulation chip provides 1 AGC regulation voltage through the capacitance-resistance filter network to the IFAGC_EXT of tuner end by its AGC end, the output amplitude of control tuner intermediate-freuqncy signal.The intermediate-freuqncy signal output output two paths of differential signals of described tuner is respectively through the two-way orthogonal signalling input corresponding connection of a capacitance with demodulation chip.
Compared with prior art, advantage of the present utility model and good effect are: the utility model is handled the radiofrequency signal that tuner receives by adopting the novel process chip with OFDM OFDM demodulation techniques, and cooperate the SDRAM dynamic memory to carry out long storage, adopt high-precision crystal oscillator can improve the lock speed of signal, improve the sensitivity that receives, the anti-multipath interference function and the mobile receptivity of television receiver have effectively been improved, simultaneously, can also be applicable in the portable receiving system to have higher practical application meaning.
Description of drawings
Fig. 1 is a demodulator circuit schematic diagram common in the prior art;
Fig. 2 is the control circuit schematic diagram that has OFDM digital demodulation function in the utility model.
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is done explanation in further detail.
The English full name of OFDM is Orthogonal Frequency Division Multiplexing, and Chinese implication is an orthogonal frequency division multiplexi.This technology is the basis of the HomePlug Powerline Alliance of HPA alliance industrial specification, and it adopts a kind of discontinuous multitone regulation technology, and a large amount of signals in the different frequency in the carrier wave are merged into single signal, thereby finishes the transmission of signal.Because this technology has under noise jamming the ability that transmits signal, therefore, often be used in and be subjected to easily in the relatively poor transmission medium of external interference or opposing external interference ability.
The release of OFDM technology is in order to improve the spectrum of carrier utilance in fact, or in order to improve modulation to multicarrier, its feature is that each subcarrier is mutually orthogonal, so the frequency spectrum after the band spectrum modulation can be overlapped, thereby has reduced phase mutual interference between subcarrier.After each carrier wave is finished modulation, in order to increase the throughput of data, improve the speed of transfer of data, the carrier wave that it has adopted the treatment technology of a kind of HomePlug of being called to be sent out data signal bits to all again merges processing, numerous individual signals be merged into one independently transmission signals send.
It is that the OFDM demodulation chip D502 of LGS_8222_A1 realizes the OFDM demodulation scheme that the utility model adopts a model, and its physical circuit schematic diagram is referring to shown in Figure 2.Main control chip passes through I 2The C bus connects 70 pin and 71 pin of demodulation chip D502, to demodulation chip D502 output control command.The channel information that demodulation chip D502 selects the user according to the command signal that receives outputs to clock bus end SCL and the data bus terminal SDA of tuner U502 by its another road bus end 66,67 pin, tuner U502 latchs the command signal that receives, and then the radiofrequency signal RF of reception corresponding channel, and convert thereof into the medium-frequency IF orthogonal signalling connect demodulation chip D502 through capacitance C553, C552 by its IF1-, IF1+ end orthogonal signalling input 47,46 pin.Demodulation chip D502 carries out the A/D conversion to the intermediate-freuqncy signal that receives, then through shaping, correction, equilibrium, deinterleave, output TS stream behind the channel-decoding such as forward error correction, MPEG0~MPEG7 exports to follow-up mpeg decode circuit by its mpeg data signal output part, realizes the reduction output of vision signal.Wherein, 3~5 pin of demodulation chip D502 are respectively to follow-up mpeg decode circuit output frame synchronizing signal MPEG_SYNC, data useful signal MPEG_VALID and clock signal MPEG_CLK, and control mpeg decode circuit is correctly worked.
In order to improve the data-handling capacity of demodulation chip D502, in described demodulator circuit, have additional a SDRAM dynamic memory D501, be used for the data of functions such as deinterleaving are stored, its address end A0~A11, data terminal D0~D12 and control end LDQM, UDQM, WE, CAS, RAS, CS, BA0, BA1, CLK respectively with address end TI_A0~TI_A11, the data terminal TI_D0~TI_D12 of demodulation chip D502 with control signal end TI_DQM, nTI_WE, nTI_CAS, nTI_RAS, nTI_CS, TI_BA0, TI_BA1, TI_CLK is corresponding is connected.After demodulation chip D502 receives intermediate-freuqncy signal, the address of gating dynamic memory D501 at first, and then transmit data among the dynamic memory D501 and store, described dynamic memory D501 can store long data message, adopt high-precision crystal oscillator Y501 can improve the lock speed of signal, improve the sensitivity that receives.By external described dynamic memory D501 on demodulation chip D502, can effectively improve performances such as the error correcting capability of demodulator circuit and anti-burst interference.
Voltage amplitude for the intermediate-freuqncy signal IF that stablizes tuner U502 output, demodulation chip D502 provides an AGC voltage via the filter network that resistance R 514, R513 and capacitor C 508, C506 form to the IF of tuner U502 AGC_EXT end by its 62 pin, and then the multiplication factor of regulating tuner U502 internal amplifier, the voltage amplitude of the intermediate-freuqncy signal IF of its output is stabilized in about 1V, thereby has improved the transmission performance of intermediate-freuqncy signal IF.
The utility model has effectively improved the mobile receiving ability of digital television receiver by adopting above-mentioned simple circuit configuration, has improved the performance that receiving sensitivity and anti-multipath disturb, and has significant effect.Certainly; above-mentioned explanation is not to be to restriction of the present utility model; the utility model also is not limited in above-mentioned giving an example, and variation, remodeling, interpolation or replacement that those skilled in the art are made in essential scope of the present utility model also should belong to protection range of the present utility model.

Claims (6)

1. the television set with new digital demodulator circuit comprises tuner and main control chip, it is characterized in that: described main control chip passes through I 2The C bus links to each other with one road bus end of a demodulation chip, the corresponding connection of bus end of another road bus end of described demodulation chip and tuner; The intermediate-freuqncy signal output of described tuner connects the orthogonal signalling input of demodulation chip, and described demodulation chip is connected the corresponding pin of a memory by address wire, data wire and control signal wire; Data after demodulation chip will be handled are exported to follow-up decoding circuit by its data output end.
2. the television set with new digital demodulator circuit according to claim 1 is characterized in that: described demodulation chip is an OFDM demodulation chip, and connected memory is a dynamic memory.
3. the television set with new digital demodulator circuit according to claim 1 and 2 is characterized in that: described demodulation chip provides 1 AGC regulation voltage to tuner, the output amplitude of control tuner intermediate-freuqncy signal.
4. the television set with new digital demodulator circuit according to claim 3, it is characterized in that: the AGC end of described demodulation chip is held by the IF AGC_EXT that the capacitance-resistance filter network connects tuner, and then the voltage amplitude of tuner intermediate-freuqncy signal output is controlled.
5. the television set with new digital demodulator circuit according to claim 4, it is characterized in that: the intermediate-freuqncy signal output output two paths of differential signals of described tuner, respectively through the two-way orthogonal signalling input corresponding connection of a capacitance with demodulation chip.
6. the television set with new digital demodulator circuit according to claim 5 is characterized in that: the model of described demodulation chip is LGS_8222_A1.
CNU2006200823739U 2006-03-22 2006-03-22 TV. set with digital dimodulator circuit Expired - Fee Related CN2909724Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2006200823739U CN2909724Y (en) 2006-03-22 2006-03-22 TV. set with digital dimodulator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU2006200823739U CN2909724Y (en) 2006-03-22 2006-03-22 TV. set with digital dimodulator circuit

Publications (1)

Publication Number Publication Date
CN2909724Y true CN2909724Y (en) 2007-06-06

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Family Applications (1)

Application Number Title Priority Date Filing Date
CNU2006200823739U Expired - Fee Related CN2909724Y (en) 2006-03-22 2006-03-22 TV. set with digital dimodulator circuit

Country Status (1)

Country Link
CN (1) CN2909724Y (en)

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20070606

Termination date: 20100322