CN2904068Y - Linear voltage regulator - Google Patents
Linear voltage regulator Download PDFInfo
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- CN2904068Y CN2904068Y CN 200520002751 CN200520002751U CN2904068Y CN 2904068 Y CN2904068 Y CN 2904068Y CN 200520002751 CN200520002751 CN 200520002751 CN 200520002751 U CN200520002751 U CN 200520002751U CN 2904068 Y CN2904068 Y CN 2904068Y
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- voltage regulator
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Abstract
The utility model provides a linear voltage adjuster, comprising a light load transistor and a heavy load transistor which are coupled to the input voltage and the output voltage; The error amplifier would respond to the reference voltage signal and the feedback voltage signal which would produce the error signal to control the grid of the light load transistor, the feedback voltage signal is on behalf of the output voltage; The grid control circuit is coupled to the grid of the heavy load transistor; The mode selection circuit is coupled to the error amplifier and the gird control circuit which is used to produce detection current signal on behalf of the current flowing through the light load transistor, when the detection current signal is higher than the critical current signal, the mode selection circuit would allow the error signal control the grid of the heavy load transistor through the grid control circuit.
Description
[technical field]
The utility model relates to a kind of linear voltage regulator, relates in particular to a kind of linear voltage regulator that can raise the efficiency under the operation of light load mode.
[background technology]
Voltage regulator is used for supplying the needed load that outputs current under the output voltage that overregulates.Linear voltage regulator uses a power transistor, operates in the variable resistor district as passive component.The variable resistance of output voltage FEEDBACK CONTROL power transistor, what make that input voltage (for example cell voltage) deducts power transistor becomes desired output voltage through overregulating after the potential difference (PD) between the variable resistor two ends.Under the operation of light load mode, because the required output current that provides reduces, yet that error amplifier institute consumed current is still almost kept is fixing, so cause the low excessively shortcoming of light load mode efficient of the linear voltage regulator of prior art comparatively speaking.
Fig. 1 shows the detailed circuit diagram of the linear voltage regulator 10 of prior art.As shown in the figure, the linear voltage regulator 10 of prior art has a power transistor 11, is series at input voltage V
InAnd between output terminals A.The error signal V that the grid of power transistor 11 is exported by the output terminal of an error amplifier 12
Err Control.Error amplifier 12 has an inverting input, is used to receive a reference voltage signal V
Ref,, be used to receive a feedback voltage signal V with a non-inverting input
FbTherefore, the error signal V that is exported from error amplifier 12
ErrPromptly represent feedback voltage signal V
FbWith reference voltage signal V
RefBetween difference.Reference voltage signal V
RefDetermined to have a predetermined magnitude of voltage by generating circuit from reference voltage 13.Feedback voltage signal V
FbThen produced, in order to represent output voltage V by the feedback circuit 14 that is connected in output terminals A
OutFor example, feedback circuit 14 can be implemented by a divider resistance, and wherein resistance R 1 and R2 are series between output terminals A and earth potential, makes the branch pressure voltage that Coupling point provided [R2/ (R1+R2)] the * V of resistance R 1 and R2
OutAs feedback voltage signal V
FbTherefore, linear voltage regulator 10 output voltage V of regulating via the output terminals A supply
OutAnd needed output current I
OutTo load 15.In order to improve output voltage V
OutRipple, capacitor C can be connected between output terminals A and earth potential.
Along with load 15 needed electric current differences, the output current I that linear voltage regulator 10 is provided
OutChange either large or smallly, but output voltage V
OutAll be maintained at [(R1+R2)/and R2] * V
RefFor the big output current I of enough ability supplies is arranged
Out, power transistor 11 must have enough big size.Yet large-sized power transistor 11 also causes the result that grid capacitance increases simultaneously.In the case, for the grid of power controlling transistor 11 effectively, error amplifier 12 must be designed to have less output impedance, and this will cause bigger current drain.Therefore, when linear voltage regulator 10 operates in light load mode, that is output current I
OutThe big current drain variation less or be similar to zero, that the efficient of linear voltage regulator 10 will be caused because of error amplifier 12.
Therefore, expect to have a kind of linear voltage regulator that can under light load mode, raise the efficiency.
[utility model content]
Because foregoing problems, a purpose of the present utility model is to provide a kind of linear voltage regulator, can be issued to best efficient in light load mode.
Another purpose of the present utility model is to provide a kind of linear voltage regulator, and enough big output current can be provided under the heavy duty pattern.
According to the utility model, a kind of linear voltage regulator is provided, comprising: a underload transistor, its have a grid and be coupled in an input voltage and an output voltage between; One error amplifier is used in response to a reference voltage signal and a feedback voltage signal and produces an error signal, is used to control transistorized this grid of this underload, and this feedback voltage signal is represented this output voltage; One heavy duty transistor, its have a grid and be coupled in this input voltage and this output voltage between; One grid control circuit, it is coupled in transistorized this grid of this heavy duty; An and mode selection circuit, it is coupled between this error amplifier and this grid control circuit, be used to produce a sensed current signal, its representative transistorized electric current of this underload of flowing through, and when this sensed current signal during greater than a threshold current signal, this mode selection circuit allows this error signal to control transistorized this grid of this heavy duty via this grid control circuit.
Use two power transistors according to linear voltage regulator of the present utility model, be connected in parallel to each other between input voltage and output voltage, one of them power transistor has bigger current driving ability (that is bigger transistor size), and another power transistor then has less current driving force (that is less transistor size).Under light load mode, according to linear voltage regulator of the present utility model only conducting have the power transistor of less current driving ability, make error amplifier institute consumed current reduce, thereby raise the efficiency.
In addition, use a current detecting unit, detect the electric current of the power transistor of the less current driving ability of flowing through according to linear voltage regulator of the present utility model.When the detected electric current of current detecting unit surpasses a predetermined critical electric current value, represent the operation of linear voltage regulator to enter the heavy duty pattern.Under the heavy duty pattern, mode selection circuit has power transistor than high current drive capability via the extra conducting of grid control circuit, thereby the enough big load that outputs current to is provided.
[description of drawings]
Fig. 1 shows the detailed circuit diagram of the linear voltage regulator of prior art.
Fig. 2 shows the circuit module figure according to linear voltage regulator of the present utility model.
Fig. 3 shows the detailed circuit diagram according to grid control circuit of the present utility model and mode selection circuit.
The primary clustering symbol description:
The linear voltage regulator of 10 prior aries
11 heavy duty power transistors
12 error amplifiers
13 generating circuit from reference voltage
14 feedback circuits
15 loads
20 linear voltage regulators
21 underload power transistors
22 grid control circuits
23 mode selection circuits
24 current detecting units
25 electric current comparing units
The A output terminal
C
oElectric capacity
I
OutOutput current
I
GenSensed current signal
I
ThThreshold current signal
INV1, the INV2 phase inverter
Q1 PMOS transistor
Q2 ~ Q5 nmos pass transistor
R1, R2 resistance
The SS mode select signal
TG1, the TG2 transmission gate
V
InInput voltage
V
OutOutput voltage
V
ErrError signal
V
FbFeedback voltage signal
V
RefReference voltage signal
[embodiment]
Explanation hereinafter and accompanying drawing will make aforementioned and other purpose of the present utility model, feature, more obvious with advantage.Describe in detail with reference to the accompanying drawings according to preferred embodiment of the present utility model at this.
Fig. 2 shows the circuit module figure according to linear voltage regulator 20 of the present utility model.Similar in appearance to being indicated of circuit unit shown in Figure 1, and, hereinafter omit its explanation in the circuit unit shown in Figure 2 for for the purpose of the simplified illustration with identical Ref. No..As shown in the figure, have a heavy duty power transistor 11 and a underload power transistor 21, be connected in parallel to each other in input voltage V according to linear voltage regulator 20 of the present utility model
InAnd between output terminals A.Underload power transistor 21 be dimensioned to size less than heavy duty power transistor 11, make the current driving ability of underload power transistor 21 less than the current driving ability of heavy duty power transistor 11.According among the embodiment of the present utility model, the current driving ability of heavy duty power transistor 11 is designed to five times of current driving ability of underload power transistor 21.The grid of underload power transistor 21 is directly connected in the output terminal of error amplifier 12, thereby is subjected to error signal V
ErrControl.Yet the grid of heavy duty power transistor 11 is connected in the output terminal of error amplifier 12 indirectly via grid control circuit 22, thereby is subjected to error signal V
ErrControl, perhaps be connected in input voltage V
InThereby, enter not on-state.
The mode select signal SS that grid control circuit 22 is exported by mode selection circuit 23 is controlled, and is connected in the output terminal of error amplifier 12 actually or is connected in input voltage V with the grid that determines heavy duty power transistor 11
InParticularly, mode selection circuit 23 is regarded as the external circuit of linear voltage regulator 20, it detects the electric current of the underload power transistor 21 of flowing through at any time and adjustment modes is selected signal SS, whether activate heavy duty power transistor 11 with decision, and then be issued to best efficient and enough big output current I is provided under the heavy duty pattern in light load mode effectively via grid control circuit 22
Out
Therefore, under light load mode, obtain best efficient effectively and enough big output current I is provided under the heavy duty pattern according to linear voltage regulator 20 of the present utility model
Out
Fig. 3 shows according to the detailed circuit diagram of grid control circuit 22 of the present utility model with mode selection circuit 23.Similar in appearance to being indicated of circuit unit shown in Figure 2, and, hereinafter omit its explanation in the circuit unit shown in Figure 3 for for the purpose of the simplified illustration with identical Ref. No..As shown in the figure, grid control circuit 22 has two transmission gate TG1 and TG2.The grid of power transistor 11 is coupled to input voltage V via transmission gate TG1
In, and the output terminal that is coupled to error amplifier 12 via transmission gate TG2 is in order to receive error signal V
ErrThe conducting of transmission gate TG1 and TG2 is whether by from mode selection circuit 23 and the mode select signal SS that comes is controlled.Mode select signal SS has first state (for example low voltage level) and second state (for example high-voltage level).When mode select signal SS is in first state, transmission gate TG1 conducting but not conducting of transmission gate TG2.In the case, the grid of heavy duty power transistor 11 is coupled in input voltage V via transmission gate TG1
InSo 11 not conductings of heavy duty power transistor and linear voltage regulator 20 operate in light load mode.When mode select signal SS is in second state, transmission gate not conducting of TG1 but transmission gate TG2 conducting.In the case, the grid of heavy duty power transistor 11 is subjected to error signal V via transmission gate TG2
ErrControl, so linear voltage regulator 20 operates in the heavy duty pattern.Therefore, in response to mode select signal SS, grid control circuit 22 can allow input voltage V effectively
InControl the grid or the permissible error signal V of heavy duty power transistor 11 via transmission gate TG1
ErrControl the grid of heavy duty power transistor 11 via transmission gate TG2.
In preferred embodiment shown in Figure 3, the current detecting unit 24 of mode selection circuit 23 is implemented by a PMOS transistor Q1.The grid of transistor Q1 is connected in the grid of underload power transistor 21, and its source electrode is connected in the source electrode of underload power transistor 21.Therefore, the drain electrode of transistor Q1 can be supplied a sensed current signal I
Sen, it is proportional to the electric current of the underload power transistor 21 of flowing through.
In preferred embodiment shown in Figure 3, electric current comparing unit 25 is designed to have the current comparator of hysteresis effect, thereby prevents to take place in the transition period that light load mode and heavy duty pattern are switched mutually the noise do not expected.Particularly, electric current comparing unit 25 utilizes the formed current mirror of nmos pass transistor Q2 to Q3 to carry out sensed current signal I
SenWith threshold current signal I
ThComparison.The grid of transistor Q2 and Q3 intercouples, and its source electrode all is connected to earth potential.The drain electrode of transistor Q2 is used to receive sensed current signal I
Sen, the drain electrode of transistor Q3 then is used to receive threshold current signal I
ThIn light load mode, because sensed current signal I
SenLess than threshold current signal I
ThSo the drain potential of transistor Q3 will be pulled near input voltage V
InIn the case, be in low voltage level, make transmission gate TG1 conducting but not conducting of transmission gate TG2 from the mode select signal SS of phase inverter INV2 output.As a result, the grid of heavy duty power transistor 11 is coupled in input voltage V via transmission gate TG1
InSo, the 11 not conductings of heavy duty power transistor.As sensed current signal I
SenGreater than threshold current signal I
ThThe time, the drain potential of the transistor Q3 that flows through will be pulled down to closely current potential.In the case, be in high-voltage level, make transmission gate not conducting of TG1 but transmission gate TG2 conducting from the mode select signal SS of phase inverter INV2 output.As a result, the grid of heavy duty power transistor 11 is subjected to error signal V via transmission gate TG2
ErrControl, so linear voltage regulator 20 operates in the heavy duty pattern.
In order to prevent sensed current signal I
SenBe greater than or less than threshold current signal I
ThTransition period in the switching noise do not expected of generation, electric current comparing unit 25 more is provided with nmos pass transistor Q4 and Q5, thereby current ratio hysteresis effect is provided.Particularly, the grid of transistor Q4 and drain electrode are connected to grid and the drain electrode of transistor Q3.Transistor Q5 is then as switch, and the mode select signal SS that is exported by phase inverter INV2 is controlled.When mode select signal SS was in low voltage level, not conducting of transistor Q5 made transistor Q4 can't form current channel.In the case, sensed current signal I
SenInevitable less than threshold current signal I
Th, so just can keep the drain potential of transistor Q3 in high-voltage level.In case sensed current signal I
SenIncrease and surpass threshold current signal I
ThThe time, the drain potential of transistor Q3 descends and makes mode select signal SS transition become high-voltage level.In the case, transistor Q5 makes transistor Q4 form current channel because of the mode select signal SS conducting of high-voltage level, and the result has further dragged down the drain potential of transistor Q3.If sensed current signal I between this transfer period
SenBecause of being reduced to, disturbance is slightly less than threshold current signal I
Th, because the current channel that transistor Q4 is provided still can allow the threshold current signal I of a part
ThFlow through, cause the state transformation of mode select signal SS so prevent the drain potential of transistor Q3 from being drawn high effectively.
Though the utility model is illustrated as illustration by preferred embodiment, be interpreted as: the utility model is not limited thereto the embodiment that is disclosed.On the contrary, to be intended to contain be tangible various modification and similar configuration to the utility model for a person skilled in the art.Therefore, the scope of claims should be according to the widest annotation, and this type of is revised and similar configuration to contain all.
Claims (8)
1. linear voltage regulator comprises:
One error amplifier is used in response to a reference voltage signal and a feedback voltage signal and produces an error signal, and this feedback voltage signal is represented this output voltage; With a heavy duty transistor, its have a grid and be coupled in an input voltage and an output voltage between; It is characterized in that: also include
One underload transistor, its have a grid and be coupled in this input voltage and this output voltage between, this grid is subjected to the control of the error signal that this error amplifier produces;
One grid control circuit, it is coupled in transistorized this grid of this heavy duty; And
One mode selection circuit, it is coupled between this error amplifier and this grid control circuit, be used to produce a sensed current signal, its representative transistorized electric current of this underload of flowing through, and when this sensed current signal during greater than a threshold current signal, this mode selection circuit allows this error signal to control transistorized this grid of this heavy duty via this grid control circuit.
2. linear voltage regulator as claimed in claim 1 is characterized in that:
The transistorized current driving ability of this heavy duty is greater than the transistorized current driving ability of this underload.
3. linear voltage regulator as claimed in claim 1 is characterized in that:
The transistorized size of this heavy duty is greater than the transistorized size of this underload.
4. linear voltage regulator as claimed in claim 1 is characterized in that:
This grid control circuit comprises one first transmission gate and one second transmission gate, and controlled by this mode selection circuit, make when this first transmission gate conducting, this input voltage is controlled transistorized this grid of this heavy duty via this first transmission gate, and when this second transmission gate conducting, this error signal is controlled transistorized this grid of this heavy duty via this second transmission gate.
5. linear voltage regulator as claimed in claim 4 is characterized in that:
This mode selection circuit comprises:
One current detecting unit is used to produce this current detection signal, and
One electric current comparing unit, be used for relatively this sensed current signal and this minimum detectable signal and apply a mode select signal to this grid control circuit according to this comparison, make that this mode select signal makes this first transmission gate conducting when this sensed current signal during less than this threshold current signal.
6. linear voltage regulator as claimed in claim 4 is characterized in that:
This mode selection circuit comprises:
One current detecting unit is used to produce this current detection signal, and
One electric current comparing unit, be used for relatively this sensed current signal and this minimum detectable signal and apply a mode select signal to this grid control circuit according to this comparison, make that this mode select signal makes this second transmission gate conducting when this sensed current signal during greater than this threshold current signal.
7. linear voltage regulator as claimed in claim 1 is characterized in that:
This mode selection circuit comprises:
One current detecting unit is used to produce this sensed current signal, and
One electric current comparing unit is used for relatively this sensed current signal and this threshold current signal.
8. linear voltage regulator as claimed in claim 7 is characterized in that:
This electric current comparing unit is one to have the current comparator of hysteresis effect.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520002751 CN2904068Y (en) | 2005-03-07 | 2005-03-07 | Linear voltage regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520002751 CN2904068Y (en) | 2005-03-07 | 2005-03-07 | Linear voltage regulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2904068Y true CN2904068Y (en) | 2007-05-23 |
Family
ID=38079482
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200520002751 Expired - Fee Related CN2904068Y (en) | 2005-03-07 | 2005-03-07 | Linear voltage regulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2904068Y (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102681577A (en) * | 2011-03-15 | 2012-09-19 | 瑞昱半导体股份有限公司 | Voltage adjusting device with switching and linear voltage adjusting mode |
| CN101452301B (en) * | 2007-10-08 | 2013-09-25 | 雅达电子国际有限公司 | Linear regulator |
| CN107104578A (en) * | 2017-05-17 | 2017-08-29 | 江苏理工学院 | A kind of linear power supply classification adjustment output circuit |
| CN110647203A (en) * | 2018-06-26 | 2020-01-03 | 恩智浦有限公司 | Voltage regulation circuit with individually enabled control loops |
| CN110858083A (en) * | 2018-08-24 | 2020-03-03 | 株式会社东芝 | Constant voltage circuit |
-
2005
- 2005-03-07 CN CN 200520002751 patent/CN2904068Y/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101452301B (en) * | 2007-10-08 | 2013-09-25 | 雅达电子国际有限公司 | Linear regulator |
| CN102681577A (en) * | 2011-03-15 | 2012-09-19 | 瑞昱半导体股份有限公司 | Voltage adjusting device with switching and linear voltage adjusting mode |
| CN102681577B (en) * | 2011-03-15 | 2014-06-11 | 瑞昱半导体股份有限公司 | Voltage adjusting device with switching and linear voltage adjusting mode |
| CN107104578A (en) * | 2017-05-17 | 2017-08-29 | 江苏理工学院 | A kind of linear power supply classification adjustment output circuit |
| CN110647203A (en) * | 2018-06-26 | 2020-01-03 | 恩智浦有限公司 | Voltage regulation circuit with individually enabled control loops |
| CN110647203B (en) * | 2018-06-26 | 2022-08-23 | 恩智浦有限公司 | Voltage regulation circuit with individually enabled control loops |
| CN110858083A (en) * | 2018-08-24 | 2020-03-03 | 株式会社东芝 | Constant voltage circuit |
| CN110858083B (en) * | 2018-08-24 | 2022-01-25 | 株式会社东芝 | Constant voltage circuit |
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| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20090109 Address after: Postcode of Taiwan, Hsinchu, china: Patentee after: Global Mixed-mode Technology Inc. Address before: Postcode of Taiwan, Hsinchu: Patentee before: Yuanchuang Science and Technology Co., Ltd. |
|
| ASS | Succession or assignment of patent right |
Owner name: ZHIXIN TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: YUANCHUANG TECHNOLOGY CO., LTD. Effective date: 20090109 |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070523 |