CN2891081Y - Computer main board fault diagnostic card - Google Patents
Computer main board fault diagnostic card Download PDFInfo
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- CN2891081Y CN2891081Y CN 200620055820 CN200620055820U CN2891081Y CN 2891081 Y CN2891081 Y CN 2891081Y CN 200620055820 CN200620055820 CN 200620055820 CN 200620055820 U CN200620055820 U CN 200620055820U CN 2891081 Y CN2891081 Y CN 2891081Y
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Abstract
An accident diagnostic card of computer main unit comprises a accident diagnostic circuit which includes PCI interface, dress decoding and data locking storage circuit, signal driving circuit, data locking storage circuit, nixie decoding and driving circuit, signal LED, binary nixie tube. The primary structure is provided with parallel printing interface and USB interface and wherein parallel printing interface is connected with nixie decoding and driving circuit, the main unit diagnostic card intercepts and displays the hexadecimal diagnostic codes, and keeps the code until new code is generated. If the computer happened to the self-check fault or no operation, the problems would be found out based on the diagnostic code comparing to the BIOS diagnostic code definition sheet. And the diagnostic card is capable of fault position of hard ward check in internal memory, CPU or other hard discs to help to solve the difficult problems of main unit audio-visually.
Description
Technical field
The utility model relates to the computer main board failure diagnostic card, mainly is meant a kind of computer main board failure diagnostic card that is provided with parallel printer interface and USB interface.
Background technology
The diagnostic card of existing P CI bus interface or PCI/ISA bus combination in the market, because its circuit is not pressed pci bus host-host protocol modular working, Products Compatibility is poor, regular meeting shows error code on different mainboards; Present computer main board has been eliminated isa bus, and the isa bus interface is impracticable.In addition, also there are shortcomings such as circuit complexity, cost height in prior art.
Summary of the invention
The purpose of this invention is to provide a kind of computer main board failure diagnostic card, the circuit of this card has overcome the deficiency that prior art exists by setting up mainboard parallel printer interface and USB interface power supply.
The realization the technical solution of the utility model is: this diagnostic card comprises a fault diagnosis circuit, this circuit comprises pci interface, address decoding and data-latching circuit, signal indication driving circuit, data-latching circuit, charactron decoding and driving circuit, signal indication LED, two seven strokes of charactrons, its primary structure is that described circuit is provided with parallel printer interface, and this parallel printer interface connects charactron decoding and driving circuit.
This technical scheme also comprises:
Described circuit is provided with USB interface.
One concrete fault diagnosis circuit, 2 bit digital display U6 pin 1-3,15-18 meets charactron decoding and driving circuit U2 pin 13-19 respectively, U6 pin 5-8,10-12 meets charactron decoding and driving circuit U1 pin 12-18 respectively, U6 pin 13,14 meet power supply VCC respectively, U2 pin 12 and U1 pin 19 connect data latching control circuit U3 pin 14 respectively, 15, U3 pin 1,16,17 respectively through light emitting diode D21, D23, D24 and resistance R 7, R9, R4 meets VCC, U3 pin 18,19 difference ground connection location decoding scheme U4B pin 10,12, U4B pin 11 connects U4A pin 6, U4B pin 13 and U4A pin 1,4 meet VCC, U4A pin 2 meets VCC through light emitting diode D22 and resistance R 6, U4B pin 9 connects data-latching circuit U5 pin 11, LPT motherboard parallel printer interface JP3 pin 2-9 meets the pin 3-4 of U2 and U1 respectively through data line, 8-9, address date multiplexing line interface AD0-15 in the pci interface meets U1 respectively, U2, U3, U5, RESTE reset signal in the pci interface, the IRDY ready for data signal, C/BE0-3 order/byte multiplexed signals meets U1 respectively, U3, FRAME frame signal in the pci interface, the CLK clock signal meets U3 respectively, U4, voltage signal are respectively through light emitting diode D11, D12, D13 and resistance R 5, R1, R3 ground connection; USB interface is feed circuit.
The beneficial effect that the utility model had: pci bus that this circuit is integrated and LPT parallel printer interface, show DTC with the LED charactron, the main signal of pci bus has LED luminous indicating lamp show state.Because integrated PCI/LPT interface is compact to design, has only used three GAL16V8, a 74F74 and a 74LS374 integrated circuit, have compatible strong, characteristics such as the code of demonstration is correct.This card is pressed the work of pci data host-host protocol, the detection of the host computer and the notebook circuit of the convenient case of having installed.
Description of drawings
Fig. 1 is a circuit block diagram of the present utility model.
Fig. 2 is the schematic diagram of Fig. 1.
Embodiment
Below in conjunction with accompanying drawing the utility model is described further:
As shown in the figure, during booting computer, BIOS carries out initialization and self check to the basic I/O equipment of mainboard configuration, when BIOS will carry out a certain detection operation, to represent the diagnostic code of this operation to send to PCI, isa bus and LPT parallel printer interface earlier, pass through smoothly if detect, enter the next item down operation again and send next diagnostic code.
This mainboard diagnostic card energy hurdle cuts and shows diagnostic code with sexadecimal, and keeps this code to there being new code to produce.If computer makes a mistake or crashes in self check, according to the diagnostic code that shows, contrast the BIOS diagnostic code implication table of this mainboard, just can the understanding problem where go out.Knowing hardware detection what do not pass through by it is internal memory or CPU, or other hardware, solves thorny mainboard problem easily and intuitively.
Principle of work
The address/data multiplexing line AD0-AD15 of pci bus interface, the effective multiplexing line CBE0-CBE3 of order/byte, data ready IRDY, the effective FRAME of frame and clock signal clk are connected to three GAL16V8 and the address decoding circuitry that the 74F74 integrated circuit is formed, and produce data latch control signal control 74LS374 integrated circuit by this circuit and latch the scale-of-two diagnostic code; The scale-of-two diagnostic code that latchs on LPT parallel printer interface or the 74LS374 is connected to two GAL16V8 decodings and driving LED charactron and shows diagnostic code with sexadecimal.
PCI address decoding and data-latching circuit work schedule are pressed the work of pci data host-host protocol, are main decoding scheme because circuit adopts GAL16V8 able to programme, can set a plurality of decoding address.
PCI major control signal RESET, IRDY, FRAME, CLK reach+12V ,-12V, and+3.3V power supply is connected to LED, and shows signal duty or power supply have or not supply voltage.
Pilot lamp LED is 7, and wherein 3 is that power supply indication, 4 are the signal indications.
USB interface provides power supply for circuit.
Claims (3)
1. computer main board failure diagnostic card, comprise a fault diagnosis circuit, this circuit comprises pci interface, address decoding and data-latching circuit, signal indication driving circuit, data-latching circuit, charactron decoding and driving circuit, signal indication LED, two seven strokes of charactrons, it is characterized in that described circuit is provided with parallel printer interface, this parallel printer interface connects charactron decoding and driving circuit.
2. computer main board failure diagnostic card as claimed in claim 1 is characterized in that described circuit is provided with USB interface.
3. computer main board failure diagnostic card as claimed in claim 1, it is characterized in that a concrete fault diagnosis circuit, 2 bit digital display U6 pin 1-3,15-18 meets charactron decoding and driving circuit U2 pin 13-19 respectively, U6 pin 5-8,10-12 meets charactron decoding and driving circuit U1 pin 12-18 respectively, U6 pin 13,14 meet power supply VCC respectively, U2 pin 12 and U1 pin 19 connect data latching control circuit U3 pin 14 respectively, 15, U3 pin 1,16,17 respectively through light emitting diode D21, D23, D24 and resistance R 7, R9, R4 meets VCC, U3 pin 18,19 difference ground connection location decoding scheme U4B pin 10,12, U4B pin 11 connects U4A pin 6, U4B pin 13 and U4A pin 1,4 meet VCC, U4A pin 2 meets VCC through light emitting diode D22 and resistance R 6, U4B pin 9 connects data-latching circuit U5 pin 11, LPT motherboard parallel printer interface JP3 pin 2-9 meets the pin 3-4 of U2 and U1 respectively through data line, 8-9, address date multiplexing line interface AD0-15 in the pci interface meets U1 respectively, U2, U3, U5, RESTE reset signal in the pci interface, the IRDY ready for data signal, C/BE0-3 order/byte multiplexed signals meets U1 respectively, U3, FRAME frame signal in the pci interface, the CLK clock signal meets U3 respectively, U4, voltage signal are respectively through light emitting diode D11, D12, D13 and resistance R 5, R1, R3 ground connection; USB interface is feed circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620055820 CN2891081Y (en) | 2006-03-01 | 2006-03-01 | Computer main board fault diagnostic card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620055820 CN2891081Y (en) | 2006-03-01 | 2006-03-01 | Computer main board fault diagnostic card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2891081Y true CN2891081Y (en) | 2007-04-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200620055820 Expired - Fee Related CN2891081Y (en) | 2006-03-01 | 2006-03-01 | Computer main board fault diagnostic card |
Country Status (1)
| Country | Link |
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| CN (1) | CN2891081Y (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102402473A (en) * | 2011-10-28 | 2012-04-04 | 武汉供电公司变电检修中心 | Computer hardware and software fault diagnosis and repair system |
| CN104063297A (en) * | 2014-07-16 | 2014-09-24 | 合肥联宝信息技术有限公司 | Method and device capable of diagnosing computer hardware through USB interfaces |
| CN106406267A (en) * | 2015-07-27 | 2017-02-15 | 联想(北京)有限公司 | System diagnostic device and system diagnosis method |
| CN112783704A (en) * | 2021-01-20 | 2021-05-11 | 深圳市智微智能科技股份有限公司 | Novel diagnostic card based on X86 mainboard and diagnostic control method |
-
2006
- 2006-03-01 CN CN 200620055820 patent/CN2891081Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102402473A (en) * | 2011-10-28 | 2012-04-04 | 武汉供电公司变电检修中心 | Computer hardware and software fault diagnosis and repair system |
| CN104063297A (en) * | 2014-07-16 | 2014-09-24 | 合肥联宝信息技术有限公司 | Method and device capable of diagnosing computer hardware through USB interfaces |
| CN106406267A (en) * | 2015-07-27 | 2017-02-15 | 联想(北京)有限公司 | System diagnostic device and system diagnosis method |
| CN106406267B (en) * | 2015-07-27 | 2019-03-29 | 联想(北京)有限公司 | System diagnostics device and system diagnostic method |
| CN112783704A (en) * | 2021-01-20 | 2021-05-11 | 深圳市智微智能科技股份有限公司 | Novel diagnostic card based on X86 mainboard and diagnostic control method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |