CN2847389Y - Vehicle carried road condition recorder - Google Patents

Vehicle carried road condition recorder Download PDF

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Publication number
CN2847389Y
CN2847389Y CN 200520141918 CN200520141918U CN2847389Y CN 2847389 Y CN2847389 Y CN 2847389Y CN 200520141918 CN200520141918 CN 200520141918 CN 200520141918 U CN200520141918 U CN 200520141918U CN 2847389 Y CN2847389 Y CN 2847389Y
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video
digital signal
signal processor
camera
data
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CN 200520141918
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Chinese (zh)
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李强
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Individual
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Individual
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Abstract

The utility model relates to an auxiliary system of a motor vehicle, particularly a vehicle carried road condition recorder. The utility model comprises a camera and a video data processing device, wherein the camera is arranged on a vehicle body and the video data processing device is arranged in a vehicle. The video processing device comprises a digital signal processor, a video processing part, a data storage part and a data output part, wherein the processing part, the data storage part and the data output part are connected with the digital signal processor and the video processing part is connected with the camera. The utility model shoots the video information of road conditions in the running course of a vehicle through the camera, A/D conversion, compression and cache packaging are carried out on shot video signals, and then, the shot video signals are output to an externally connected storing device for storage through the data output part. Objective image recording operation can be realized for running accidents, and powerful evidentiary materials are offered for the work of responsibility confirmation of accidents.

Description

Recorder for vehicle traffic
Technical field
The utility model relates to a kind of motor vehicle backup system, particularly a kind of recorder for vehicle traffic.
Technical background
Traffic is a sign of urban development normally; because of the accident of traffic or human factor initiation is often brought confusion to traffic easily; so the processing of traffic hazard also must be fast rationally with effective; the processing of present traffic hazard is normally by the material evidence collection after the accident; vestige evaluation or eyewitness's testimony; can't reproduction accident truth at that time; and the evaluation of vestige or material evidence will need be adopted loaded down with trivial details technological means or judgement by virtue of experience usually usually; can't guarantee the objective of qualification result like this and approximate to the facts, therefore also influence the speed of accident treatment; effect.
The utility model content
The utility model has overcome above-mentioned shortcoming, and a kind of recorder for vehicle traffic that can objectively respond scene of the accident truth is provided.
The technical scheme in the invention for solving the technical problem is: comprise at least one camera that is arranged on the car body and be arranged on the interior video data processing apparatus of car, described video process apparatus comprises a digital signal processor and the video processing part that links to each other with described digital signal processor, data storage part and data output unit, and described video processing part links to each other with described camera.
Described data output unit can be the arm processor that links to each other with described digital signal processor by pci interface, and described arm processor is used for buffer memory, packing are carried out in the output of described digital signal processor, and exports by USB interface.
Described camera can be arranged on the vehicle body, and consistent with driver's seat direction in the car, or is arranged on each side of vehicle body.
Described data storage part can comprise the SDRAM storer that is used to deposit the FLASH storer of program object code and is used for metadata cache and program run space.
The peripheral circuit of described digital signal processor can comprise phase-locked loop clock generation electrical equipment, power circuit, synchronous rectification decompression converting circuit, pulse-width modulation circuit, power supply supervisory circuit and clock multiplier circuit also link to each other with described digital signal processor respectively synchronously.
Described digital signal processor can be DM642, is used for digital video input is compressed processing.
Described digital processing part can comprise the special-purpose A/D conversion chip of a Video processing, be used for the video that described video camera is taken is sampled, and the data-signal after will handling sends to described digital signal processor.
The utility model comprises the camera that is arranged on the car body and is arranged on the interior video data processing apparatus of car, described video process apparatus comprises a digital signal processor and the video processing part that links to each other with described digital signal processor, data storage part and data output unit, and described video processing part links to each other with described camera.The utility model is taken vehicle road conditions video information in the process of moving by described camera, then the vision signal of taking is carried out the A/D conversion, compression and buffer memory packing, outputing to external memory storage through described data output unit stores, can realize objective photologging, strong evidentiary material is provided for the confirmation of responsibility work of accident driving accident.In addition, a plurality of video cameras can be set on vehicle body, and the road conditions of vehicle periphery be taken, form omnibearing observation visual angle from a plurality of angles.
Description of drawings
Fig. 1 is a circuit block diagram of the present utility model
Fig. 2 is the circuit theory diagrams of video processing part in the utility model
Fig. 3 is the peripheral circuit schematic diagram that links to each other with digital signal processor in the utility model
Fig. 4 is the circuit theory diagrams of power circuit part in the utility model
Fig. 5 is FLASH storage and asynchronous communication circuit theory diagrams partly in the utility model
Fig. 6 is a device reset circuit schematic diagram
Fig. 7 is the clock multiplier circuit schematic diagram
Embodiment
The utility model comprises at least one camera that is arranged on the car body and is arranged on the interior video data processing apparatus of car, described camera is arranged on the edge of driver's seat the place ahead windshield of described vehicle, make that the direction of camera is consistent with driver's direction, and need not change primary car structure and circuit.
Described video process apparatus as shown in Figure 1, comprise a digital signal processor DSP and the video processing part that links to each other with described digital signal processor, data storage part and data output unit, described video processing part links to each other with described camera, and described data store branch comprises that the FLASH storage unit is used as storage respectively or moves different files or program with the SDRAM storage unit.
Described video processing part mainly comprises a Video Decoder U23, as shown in Figure 2, described Video Decoder U23 is the special-purpose A/D conversion chip of Video processing SAA7115H, and be connected between described video camera and the digital signal processor DSP, be used for the vision signal that described video camera is taken is sampled, the video signal input terminal of described Video Decoder U23 is connected to interface J16 after through two Leaded Ceramic Disc Capacitor L22, L30, and is connected the video output terminals of described video camera by described interface J16.Behind the interface chip RPACK-33 of the output terminal of described Video Decoder U23 by a plurality of special uses of connection, be connected in the described digital signal processor DSP, carry out follow-up processing.
Described digital signal processor DSP is that model is the dedicated video process chip of DM642, be used for the data that described decryption of video device U23 transmits are compressed processing, be converted into MPEG2 or MPEG4 or other form, then the data after the compression sent in the arm processor through pci interface.
The peripheral circuit of described digital signal processor DSP as shown in Figure 3, comprise phase-locked loop clock generation electrical equipment, power circuit, synchronous rectification decompression converting circuit, synchronous pulse-width modulation circuit, power supply supervisory circuit and clock multiplier circuit etc., described pll clock generator U2 is than crystal oscillating circuit design flexibility height commonly used, the degree of accuracy height, stability is strong, total cost is lower, and can guarantee the stable of clock signal.
A power circuit links to each other with described digital signal processor DSP, as shown in Figure 4, described power circuit comprise again the synchronous rectification decompression converting circuit and and synchronous pulse-width modulation circuit, the input end of synchronous rectification decompression converting circuit connects a connector J9, and connect the peripheral hardware direct supply by connector J9 and working power is provided for the whole video treating apparatus, described synchronous rectification change-over circuit comprises a synchronous rectified DC-DC modular converter U22 and peripheral circuit thereof, can realize the synchronous buck conversion of low input, realize Adjustable Output Voltage, the 5V power source conversion that is about to input is to satisfy the 3.3V operating voltage of each element in the described video process apparatus.Described synchronous pulse-width modulation circuit comprises synchronous pulse width modulating chip U17 and peripheral circuit thereof, the input end of described synchronous pulse-width modulation circuit also links to each other with described power supply input connector J9, after output terminal is exported stable pulse-width signal, be connected to a CVDD end of described digital signal processor DSP.
As shown in Figure 5, described digital signal processor DSP also is connected with one 16 system transverter U15, described 16 system transverter U15 also connect a FLASH storage chip U6 and a universal asynchronous reception/transmitter U9 respectively, and the data terminal of described FLASH storage chip U6 and universal asynchronous reception/transmitter U9 is corresponding to link to each other.Described FLASH storage chip U6 is AM29LV320, be used for depositing the object code of DSP program, perhaps also can be used as exented memory or L2 cache in the described video process apparatus operational process, described universal asynchronous reception/transmitter U9 also is connected with a binary channels Linear Driving/receiver U7, described driving/receiver U7 also is connected with RS323 interface J11, constitute common interface circuit by described universal asynchronous reception/transmitter U9, driving/receiver U7 and interface J11, carry out exchanges data with the external world.
A SDRAM memory circuit comprises that two parallel SDRAM storage chip U13, U14 constitute, described SDRAM storage chip is HY57V643220C, buffer memory and program run space as data, and link to each other operation needs that the number of described SDRAM storage chip can the visual range preface and deciding by exclusive data interface circuit RPACK-33 with described digital signal processor.
The data output end of described digital signal processor DSP also connects an arm processor by pci interface simultaneously, described arm processor is S3C2510, be used for the data after the described digital signal processor DSP compression are carried out buffer memory, packing sends to USB interface then.Interface between pci interface can be realized up and down is with the transmission of coordination data, and can keep high-performance under high clock frequency.
Described power supply supervisory circuit links to each other with power circuit as shown in Figure 6, also simultaneously is connected with the reset terminal of each chip in the video processing part, can realize the monitoring to power supply, guarantees the reliable running of complete machine, and the integral reset of control of video processing section.Comprise a reset button S3 and a power monitoring chip U33 in the described power supply supervisory circuit, described power monitoring chip U33 is TPS3307, can realize the supply voltage monitoring of System on Chip/SoC in the multiple voltage circuit, the power monitoring chip that adopts in the utility model can be realized two kinds of independent voltages.
Described clock multiplier circuit is made of clock multiplier U20 and peripheral circuit thereof as shown in Figure 7,20MHz frequency doubling clock signal can be provided, and output in the described digital signal processor DSP.
The course of work of the present utility model is as follows, take current road conditions image in real time by the one or more video cameras that are arranged on the vehicle body, and the video file information that will write down road conditions sends among the described Video Decoder U23, by described Video Decoder U23 the signal of each video camera is carried out circulating sampling, and decode and the A/D conversion, and then the data-signal after will changing sends in the described digital signal processor DSP, compress processing, file after the compression via pci interface after by described arm processor buffer memory and the packing, send in the external memory device by USB interface.When vehicle has an accident, 5 minutes video informations before and after the accident of the utility model can noting auto clear, exactly takes place, and be stored in the external memory device, in the confirmation of responsibility of accident and processing procedure, provide evidence, the utility model is set and can be write down 30 two field pictures at most p.s., each two fens half can write down altogether in the time up to 9000 complete independent images before and after driving like this, and choosing and setting by hardware, in the unit interval, take more multiple image, more clearly reflection accident truth at that time.Described video camera can be arranged on and pilot's line of vision direction consistent location, can judge the viewed driving situation of accident driver at that time exactly, thereby judge the accident responsibility people more exactly, simultaneously, can also the multi-section video camera be installed on vehicle body, be separately positioned on a plurality of positions of vehicle body, for example place, four of vehicle body angles, can constitute the shooting visual angle of omnidirectional, so that form omnibearing filmed image.In addition, can pass through the working power of the pulse signal control device of vehicle to run, when vehicle launch is walked, the beginning track up, stop after three minutes after vehicle stops to take, also can set the shooting time after the parking as required, can also start infrared light aid automatically, make photographic images more clear at night.
The storage of described video information is to rely on the described external memory device that links to each other with arm processor to realize, what store in described external memory device is image information in time period before the current time, and the duration of stored images is relevant with the capacity of external memorizer, and, control by described ARM controller in the process of data storage, what adopt is the mode that circulation covers storage, old storage data can constantly be covered by new data, make the data of storing in the external memorizer remain up-to-date interior data message of time period.In addition, can also connect external wireless telecommunications system by described USB interface in described data output unit, the information that photographs can be sent in the long-range communication receiving terminal in real time, prevent that memory device is destroyed and can't preserve complete evidentiary material in accident.
More than recorder for vehicle traffic provided by the utility model is described in detail, used specific case herein principle of the present utility model and embodiment are set forth, the explanation of above embodiment just is used for helping to understand method of the present utility model and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present utility model, the part that all can change in specific embodiments and applications, in sum, this description should not be construed as restriction of the present utility model.

Claims (7)

1. recorder for vehicle traffic, it is characterized in that: comprise at least one camera that is arranged on the car body and be arranged on the interior video data processing apparatus of car, described video process apparatus comprises a digital signal processor and the video processing part that links to each other with described digital signal processor, data storage part and data output unit, and described video processing part links to each other with described camera.
2. recorder for vehicle traffic according to claim 1, it is characterized in that: described data output section is divided into the arm processor that links to each other with described digital signal processor by pci interface, described arm processor is used for buffer memory, packing are carried out in the output of described digital signal processor, and exports by USB interface.
3. recorder for vehicle traffic according to claim 1 and 2 is characterized in that: described camera is arranged on the vehicle body, and consistent with driver's seat direction in the car, or is arranged on each side of vehicle body.
4. recorder for vehicle traffic according to claim 1 and 2 is characterized in that: described data store branch comprises the SDRAM storer that is used to deposit the FLASH storer of program object code and is used for metadata cache and program run space.
5. recorder for vehicle traffic according to claim 1 and 2 is characterized in that: the peripheral circuit of described digital signal processor comprises phase-locked loop clock generation electrical equipment, power circuit, synchronous rectification decompression converting circuit, pulse-width modulation circuit, power supply supervisory circuit and clock multiplier circuit also link to each other with described digital signal processor respectively synchronously.
6. recorder for vehicle traffic according to claim 1 and 2 is characterized in that: described digital signal processor is DM642, is used for digital video input is compressed processing.
7. recorder for vehicle traffic according to claim 1 and 2, it is characterized in that: described digital processes branch comprises the special-purpose A/D conversion chip of a Video processing, be used for the video that described video camera is taken is sampled, and the data-signal after will handling sends to described digital signal processor.
CN 200520141918 2005-11-23 2005-11-23 Vehicle carried road condition recorder Expired - Fee Related CN2847389Y (en)

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Application Number Priority Date Filing Date Title
CN 200520141918 CN2847389Y (en) 2005-11-23 2005-11-23 Vehicle carried road condition recorder

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Application Number Priority Date Filing Date Title
CN 200520141918 CN2847389Y (en) 2005-11-23 2005-11-23 Vehicle carried road condition recorder

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CN2847389Y true CN2847389Y (en) 2006-12-13

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CN 200520141918 Expired - Fee Related CN2847389Y (en) 2005-11-23 2005-11-23 Vehicle carried road condition recorder

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112242012A (en) * 2019-07-18 2021-01-19 上汽通用汽车有限公司 Event recording device and method based on vehicle camera

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112242012A (en) * 2019-07-18 2021-01-19 上汽通用汽车有限公司 Event recording device and method based on vehicle camera

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