CN2822513Y - Nerve induced potential detector based on CF interface tech - Google Patents

Abstract

The utility model relates to a nerve induced potential detector based on CF interface technique, which is designed against the problems of excessively large volume and inconvenient use and carrying existing in the existing induced potential test system. The utility model comprises a palm computer and a CF card. The utility model is characterized in that the CF card is composed of a CF interface and control part (1), a DDS signal generation device part (2), an induced signal conditioning and power amplification part (3), an induced signal preprocessing and conditioning part (4), an analog-to-digital conversion and digital signal processing part (5) and a power supply management part (6). The utility model has the advantages of small volume and portability.

Description

Nerve based on the CF interfacing brings out potential detector

Technical field

This utility model relates to a kind of medical apparatus and instruments, especially a kind of medical detector, and specifically a kind of nerve based on the CF interfacing brings out potential detector.

Background technology

At present, for nerve, especially the signal of telecommunication that the brain neuroblastoma lesion tissue can be by having certain intensity, frequency stimulates to reach the purpose of treatment the neuronal cell of difference in functionality, and relevant diagnosis and treatment method, pertinent instruments and operation principle thereof can be referring to Chinese patent ZL03220085.4.

In modern medicine basis and clinical application research and clinical diagnosis treatment activity, often need test bringing out current potential.By bringing out the test of current potential, can obtain the potential physiologic information of human body, on to these information processings, analysis foundation, not only can sum up some objective moving laws of finding that human body exists, disclose the secret of life movement, but also can find disease and observe the generation of disease, the process that develops and lapse to, so that suit the medicine to the illness, execute and control in good time, reach best therapeutic effect, remove patient's slight illness better.

The test macro that brings out current potential generally includes and brings out the signal generation and bring out potential acquisition two parts, bringing out the signal generation branch can produce as required and bring out the signal of telecommunication accordingly, this signal of telecommunication acts on human body by electrode or various transducer again, human body is produced bring out current potential; Bring out potential acquisition part and then the signal of electrode or the input of various pick off is carried out necessary conditioning and demonstration, storage, or further with signal digitalized and digitized signal further handled.

The early stage potential test system structure of bringing out is fairly simple, only have the sequence pulse generator as bring out that signal generation divides and analog oscilloscope as bringing out the current potential display part, the record of signal and analysis will be used the graph paper hand drawing or with photographing unit means such as take pictures; Progress along with electronic technology, bring out the potential test system bring out signal generator and the evoked potential recording device has had bigger improvement, replaced the train pulse generator with multiple function signal generator, the analog signal record instrument is used to record and brings out electric potential signal.Late 1990s, Microcomputer Technology is applied at numerous areas.Under the promotion of Microcomputer Technology, the signal generator that brings out that brings out the potential test system is designed to signal generator based on the DDS technology, the observed and recorded part of bringing out current potential is then by total digitalization, bring out that electric potential signal not only can be observed easily and with the digital form storage, and can carry out various analyzing and processing.

But the existing volume that brings out the potential test system is too huge, in many application scenarios its miniaturization and portable performance has been proposed higher requirement, such as large-scale examination of operating room, zoopery operation room and some disease etc.For satisfying requirement of actual application such as basic physiology research, disease treatment and examination, be badly in need of a kind of potential test system that brings out based on mobile computing platforms such as PDA and CF interfacing.

Summary of the invention

The purpose of this utility model is that a kind of volume of design nerve based on the CF interfacing little, easy to carry brings out potential detector.

The technical solution of the utility model is:

A kind of nerve based on the CF interfacing brings out potential detector, comprise palm PC (relevant program is installed in this palm PC), the CF card, the CF card links to each other with movable the pegging graft of palm PC, it is characterized in that the CF card is by CF interface and control section 1, DDS signal generator part 2, bring out signal condition and power amplifying part 3, bring out electric potential signal pretreatment and conditioning part 4, analog digital conversion and Digital Signal Processing part 5 and power management part 6 are formed, the input of DDS signal generator part 2 links to each other with the output of palm PC with control section 1 by the CF interface, the output of DDS signal generator part 2 connects the input of bringing out signal condition and power amplifying part 3, the output of bringing out signal condition and power amplifying part 3 links to each other with electrode or transducer, bring out the input receiving electrode or the pick off of electric potential signal pretreatment and conditioning part 4, its output connects analog digital conversion and Digital Signal Processing part 5, and the output of analog digital conversion and Digital Signal Processing part 5 links to each other with palm PC with control section 1 by the CF interface; Power management part 6 is respectively each several part work voltage is provided.

The interface and the power management part 6 of described CF interface and control section 1, DDS signal generator part 2, analog digital conversion and Digital Signal Processing part 5 are integrated on the fpga chip.

The beneficial effects of the utility model:

In medical apparatus and instruments, introduced notion first based on virtual type's equipment of CF interfacing, carry, use very convenient, date processing promptly and accurately, for diagnosis, treatment and the scientific research of disease provides a kind of brand-new detecting instrument, filled up the blank that domestic and international nerve brings out the potential test instrument, being of great practical significance, is doctor's good assistant.

Description of drawings

Fig. 1 is a structural representation of the present utility model.

Fig. 2 is the structured flowchart of CF card of the present utility model.

Fig. 3 is the electrical schematic diagram that brings out signal condition and power amplifying part of the present utility model.

The specific embodiment

Below in conjunction with drawings and Examples this utility model is further described.

As Figure 1-3.

A kind of nerve based on the CF interfacing brings out potential detector, comprise that palm PC (claims PDA again, model can be HP-ipaq2210, relevant program wherein is installed), CF card (its structured flowchart as shown in Figure 2), the CF card links to each other with movable the pegging graft of palm PC, the CF card is by CF interface and control section 1, DDS signal generator part 2, bring out signal condition and power amplifying part 3 (as Fig. 3), bring out electric potential signal pretreatment and conditioning part 4 (can adopt model is the integrated circuit realization of TLC1564 and AD7685), analog digital conversion and Digital Signal Processing part 5 (model can be: MAX7535) and power management part 6 (model can be MAX1702B) form, as shown in Figure 1, the input of DDS signal generator part 2 links to each other with the output of palm PC with control section 1 by the CF interface, the output of DDS signal generator part 2 connects the input of bringing out signal condition and power amplifying part 3, the output of bringing out signal condition and power amplifying part 3 links to each other with electrode or transducer, bring out the input receiving electrode or the pick off of electric potential signal pretreatment and conditioning part 4, its output connects analog digital conversion and Digital Signal Processing part 5, and the output of analog digital conversion and Digital Signal Processing part 5 links to each other with palm PC with control section 1 by the CF interface; Power management part 6 is respectively each several part work voltage is provided.

The interface and the power management part 6 of CF interface and control section 1, DDS signal generator part 2, analog digital conversion and Digital Signal Processing part 5 can adopt FPGA (field programmable gate array, can adopt the Cyclone of altera corp series EP1C6F256) in the realization, to reduce the complexity of pcb board design, improve circuit reliability, also reduced simultaneously the area of circuit board, cut down power consumption, met the requirement of portable instrument.

The structural representation of the CF card of present embodiment is as shown in Figure 2, and is as described below:

The CF interfacing is inherited in the pcmcia interface technology, and it is on the basis of PCMCIA technology, is released and obtain gradually the approval of numerous mobile computing device manufacturers and IEEE tissue in nineteen ninety-five by SanDisk company.Along with continuing to bring out of portable mobile computing device, they constantly increase the requirement of outside data memory and external equipment, and the function of CF card also becomes more diverse, and CF interfacing agreement is also constantly expanded.Now the kind of CF card is except the data-storing card, also contained Mini hard disk based on the CF interface, Ethernet card, wireless network card (802.11a/b/g), fax/modem card (modem), radio call card (pager), data collecting card etc.Other non-storage card based on the CF interface generally claims the CF+ card, to distinguish with the simple CF card that store function is only arranged.

The structure of CF card generally comprises HPI, controller and Flash memory module (CF card) or I/O module (CF+ card) three parts according to its function, as Fig. 1.The HPI of CF card, controller and Flash memory module integrate usually, reduce volume, reduce power consumption with the form of single integrated circuit, save cost; The CF+ card is according to difference in functionality, and its IO module difference so its HPI, controller and I/O module are normally isolating, has only the bigger CF+ card of minority circulation that the special IC support is arranged, it three together partly integrated.

The CF card can be operated in 3.3V and two kinds of electric power systems of 5.0V, and the supply voltage error should be no more than respectively ± and 5% and ± 10%.Under the 3.3V logic state, logic low should not be higher than 0.6V, and logic high should be not less than 1.5V; Under the 5.0V logic state, logic low should be lower than 0.8V, and logic high should be greater than 2.0V.Comprehensive 3.3V and 5.0V logical system, its input, output logic level are as long as observing general 3.3V CMOS level requires, and just logic low should be lower than 0.4V, and logic high should be higher than 2.4V.

The HPI of CF card is 25 * 2 biserial Female type connector, pitch of holes 1.27mm, and interface connector outward appearance is as shown in Figure 2.The CF jig has three kinds of mode of operations, i.e. storage card pattern, IO pattern and true IDE pattern, and its interface signal foot definition has difference under these three kinds of patterns.With regard to the employed IO pattern of CF+ card in this research, signal definition sees Table 1.

Table 1.

Signal name	Sense	The signal numbering	Function
				A10-A0	I	8，10-12，14-20	11 bit address buses

/STSCHG	I/O	46	The state of CF card changes
				/SPKR	I/O	45	Binary audio output is not if having this function, this foot ground connection
/CD1、/CD2	O	26，25	The CF clamping goes into to detect
				/CE1、/CE2	I	7，32	Chip is selected
/CSEL	I	39	This foot need not in the IO pattern
				D15-D00	I/O	31-27，49-47，6-2，23-21	16 bit data bus
GND	--	1，50	Power supply and signal ground
				/INPACK	O	43	The response of main frame read-write operation
/IORD	I	34	IO reads signal in the space
				/IOWR	I	35	IO space write signal
/OE	I	9	Attribute and general spatial read signal
				/IREQ	O	37	Interrupt request singal
/REG	I	44	The read-write operation space is selected
				RESET	I	41	Reset signal
VCC	--	13，38	Power supply
				/VS1、/VS2	O	33，40	Supply voltage is selected
/WAIT	O	42	Index signal is waited in the main frame read-write
				/WE	I	36	Attribute and general spatial write signal
/IOIS16	O	24	16 bit manipulation index signals

According to the CF technical specification, with regard to the CF+ card that works in the IO pattern, address space roughly divides three parts in its card: attribute memory space, common memory space and IO space.To attribute memory space and the spatial operation of common memory all relate to/REG ,/CE ,/OE ,/WE, A10-A0, D15-D0 signal, REG signal low level is effective during wherein to attribute memory spatial operation, to distinguish with common memory spatial operation (REG signal high level is effective), and its A0 signal is total to keep 0, i.e. its D15-D8 invalidating signal; To the IO spatial operation relate to/REG ,/CE ,/IORD ,/IOWE, A10-A0, D15-D0 signal, though its REG signal also is that low level is effective, but read-write operation by/IORD ,/the IOWE signal substituting/OE and/the WE signal, so just make a distinction with the spatial operation of attribute memory.

For a CF card, whether it can be depended on its CIS (Card Information Structure) writes whether correct, appropriate by main frame identification and normal operation.CIS is stored in a data structure in the non-volatile memory in the CF card, the type of the operating system of main frame by reading CIS and detect the CF of installation, operating rate, exercisable space size and to the demand of system resource etc.CIS generally is positioned at the attribute memory space of CF, and greatest length is 256 bytes, and initial address is 0x0000.Since for 8 system compatibles, CIS only uses the least-significant byte of data/address bus to operate, so the CIS data only take even address, so its senior general takies the attribute memory space of 512 bytes.As read-only memory, it can only carry out read operation, will be illegal with invalid to its write operation.

CIS is made up of data segment (or it is fast the to be called data) link of a series of being called as " Tuple ", the structure of each " Tuple " is roughly the same, it mainly comprises a byte TPL_CODE, a byte TPL_LINK, TPL_DATA (comprising " Tuple " end mark symbol 0xFF) with the 2-N byte, wherein TPL_CODE shows the information type that is stored in " Tuple ", TPL_LINK points to next " Tuple " (normally also remaining byte number in this " Tuple "), TPL_DATA then is the detailed description data of this " Tuple " information, different " Tuple " information types, the TPL_DATA data bulk difference that it comprises.

The design of CF clamping notch portion:

The design key that brings out the potential test system based on mobile computing device platforms such as PDA and CF interfacing is CF interface circuit and the design of relevant firmware and writing of design of Device Drivers.The CF interface circuit is mainly realized by FPGA with relevant firmware etc.Adopt the IDE Quartus VHDL language down of altera corp for the design of FPGA, for the device driver developing instrument DDK and embedded Visual C++ (the eMbedded Visual C++) IDE of writing employing Microsoft company of the device driver of CF card.

Because the IO foot level of selected FPGA and CF card signal level are compatible fully, therefore, each interface signal configuration of CF+ card seems very simple, and like this, the emphasis of CF+ interface section design then is the realization of CIS.The cis module of expressing with VHDL language in the present embodiment.

Entity CIS is

Port(reg,n_ce1,n_ce2,n_oe,n_we:in std_logic;a:in integer range 0 to 2047;

data:out integer range 0 to 65535);

end CIS;

The interface of----above definition cis module because CIS is positioned at attribute memory space, only relates to n_we, the n_oe signal to its operation.

Architecture CIS_behavior of CIS is

type cis_block is array(0 to 255)of std_logic_vector(7 downto 0);

Structure of arrays of----above definition is used to organize the CIS data.

Constant cis:cis_block:=(----definition CIS data.

X " 01 ", x " 03 ", x " D9 ", x " 01 ", x " FF ",----first " Tuple ", identifier, speed and the space size etc. of definition CF card.

X " 1C ", x " 05 ", x " 03 ", x " D9 ", x " 01 ", x " FF ", x " 00 ",----second " Tuple ", definition running voltage etc.

X " 18 ", x " 02 ", x " Df ", x " 01 ",----the 3rd " Tuple ", definition JEDEC identification code.

X " 20 ", x " 00 ", x " 00 ", x " 00 ", x " 00 ", x " 00 ",----the 4th " Tuple ", and definition manufacturer code, this code is distributed by CF association.

X " 15 ", x " 17 ", x " 01 ", x " 00 ",----the 5th " Tuple ", the character string of definition firmware version and manufacturer's title etc., version number 1.0.

X " 4E ", x " 61 ", x " 6E ", x " 6A ", x " 69 ", x " 6E ", x " 67 ", x " 20 ", the character string of----manufacturer title, " Nanjing ".

x"47",x"65",x"6E",x"6E",x"69",x"6E",x"65",x"72",x"61",x"6C",x"20",----“General”。

x"48",x"6F",x"73",x"70",x"69",x"74",x"61",x"6C",x"20",----“Hospital”。

.........

.........

X " 14 ", x " 00 ", x " ", x " FF "--among-the CIS last " Tuple ", the end of ordinary representation CIS.

);

signal a_vector:std_logic_vector(15 downto 0);

signal data_tmp:std_logic_vector(15 downto 0);

signal a_div:integer range 0 to 255;

begin

a_vector<=conv_std_logic_vector(a,16);

A_div＜=a/2;---even address is effective

process(reg,n_ce1,n_oe,n_we)

----finishes the read operation to a CIS data segment

begin

if(reg='0'and n_ce1='0'and n_oe='0'and n_we='1'

and a_vector(0)='0')then

data_tmp<=(0=>cis(a_div)(0),1=>cis(a_div)(1),

2=>cis(a_div)(2),3=>cis(a_div)(3),

4=>cis(a_div)(4),5=>cis(a_div)(5),

6=>cis(a_div)(6),7=>cis(a_div)(7),

others=>'0'

);

else

data_tmp<="ZZZZZZZZZZZZZZZZ";

end if;

data<=conv_integer(data_tmp);

end process;

end cis_behavior;

The operation principle of each several part of the present utility model is:

CF interface of the present utility model and controller part 1 are mainly finished data and the information exchange with main frame (palm PC), make main frame identification native system and collaborative main frame finish initialization step, in application process, accept the instruction and data of main frame, the generation of bringing out the signal of telecommunication and the conditioning of control system, bring out the collection and the processing of electric potential signal, in time (utilize interrupt mode or host query mode) simultaneously the data that collect are sent to main frame; The DDS signal generator part of system is mainly finished the synthetic mimic signal of telecommunication of the Wave data that brings out signal that main frame is sent, and changes the parameters such as frequency, amplitude and dutycycle of bringing out signal according to the instruction of main frame.Bring out signal condition and power amplifying part mainly with the signal of telecommunication filtering of DDS signal generator output, the filtering high fdrequency component makes signal become smooth, at last it is amplified to certain power output; Electric potential signal cushions, amplification with nursing one's health bringing out of partly mainly will importing to bring out the electric potential signal pretreatment, with frequency overlapped-resistable filter filtering high fdrequency component, pseudo-low-frequency noise with the digital signal after the reduction analog digital conversion, and according to the instruction of main frame, adjust its gain, make the requirement of the suitable analog-digital converter of signal amplitude of input; Analog digital conversion and Digital Signal Processing part are according to the setting of main frame, bring out electric potential signal with certain sample rate collection simulation, and the method with hardware is handled digital signal under the control of main frame, from strong noise background, extract and bring out electric potential signal really, or signal done various conversion (such as FFT, Wavelet Transform etc.), bring out current potential so that investigate from other angle (time domain, frequency domain or other space).The power management part is system's each several part required voltage with main frame by 3.3V or the 5.0V voltage transitions that the CF interface provides, and the power supply supply of waiting the closed portion circuit where necessary prolongs the battery service time of mobile computing devices such as PDA to reduce the power consumption of system.

Of the present utility model bringing out sent in the palm PC after electric potential signal pretreatment and the data that receive of conditioning part 4 are filtered through amplification, conditioning, anti-aliasing filter and with white noise, under the control of software, adopt the Kalman filter method to carry out digital filtering, with wherein power frequency interference signals, primitive stimulus signal, strong man's bulk noise (after one's own heart electric wave, brain wave etc.) is separated on every side, obtain real nerves reaction signal value, can show, operation such as storage, printing.

Claims (2)

1, a kind of nerve based on the CF interfacing brings out potential detector, comprise the palm PC that related application has been installed, the CF card, the CF card links to each other with movable the pegging graft of palm PC, it is characterized in that the CF card is by CF interface and control section (1), DDS signal generator part (2), bring out signal condition and power amplifying part (3), bring out electric potential signal pretreatment and conditioning part (4), analog digital conversion and Digital Signal Processing part (5) and power management part (6) are formed, the input of DDS signal generator part (2) links to each other with the output of palm PC with control section (1) by the CF interface, the output of DDS signal generator part (2) connects the input of bringing out signal condition and power amplifying part (3), the output of bringing out signal condition and power amplifying part (3) links to each other with electrode or transducer, bring out the input receiving electrode or the pick off of electric potential signal pretreatment and conditioning part (4), its output connects analog digital conversion and Digital Signal Processing part (5), and analog digital conversion links to each other with palm PC with control section (1) by the CF interface with the output of Digital Signal Processing part (5); Power management part (6) is respectively each several part provides work voltage.

2, the nerve based on the CF interfacing according to claim 1 brings out potential detector, it is characterized in that the interface of described CF interface and control section (1), DDS signal generator part (2), analog digital conversion and Digital Signal Processing part (5) and power management part (6) are integrated on the fpga chip.

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