CN2792022Y - satellite downconverter - Google Patents

satellite downconverter Download PDF

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Publication number
CN2792022Y
CN2792022Y CN 200520016348 CN200520016348U CN2792022Y CN 2792022 Y CN2792022 Y CN 2792022Y CN 200520016348 CN200520016348 CN 200520016348 CN 200520016348 U CN200520016348 U CN 200520016348U CN 2792022 Y CN2792022 Y CN 2792022Y
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China
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mentioned
signal
frequency
output
mixer
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Expired - Lifetime
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CN 200520016348
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Chinese (zh)
Inventor
詹长庚
黄宜勤
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Wistron Neweb Corp
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Wistron Neweb Corp
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Abstract

A frequency demultiplier comprises two low noise amplifiers, a switching circuit, a filter, two oscillators, a mixer, an intermediate frequency amplifier and a control circuit. The low noise amplifier is used for amplifying two polarization signals, the output of the switching circuit can be switched to one input of the switching circuit, the filter can allow signals with a plurality of specific frequencies to pass through, the mixer is used for mixing the output of the filter with a first or a second oscillating wave, the intermediate frequency amplifier is used for amplifying the output of the mixer, the control circuit can determine the output of the switching circuit, and one of the outputs of the oscillators can be selected as the input of the mixer.

Description

Satellite frequency demultiplier
Technical field
The utility model system is meant the low noise satellite frequency demultiplier of a kind of full frequency band especially relevant for a kind of frequency demultiplier.
Background technology
Satellite communication service is because have wideband, broadcasting, characteristic such as borderless, and the consumption market increases gradually to the demand of satellite receiving system recently.When using the satellite communication service, need have satellite ground receiver, satellite frequency demultiplier (low noise block down-converter, LNB), elements such as intermediate frequency cable, demodulator.The satellite ground receiver is used for receiving satellite signal; Satellite frequency demultiplier will be amplified by more than the 30000 kilometers radiofrequency signals that transmit, and radiofrequency signal be dropped to the frequency range that immediate frequency cable can transmit again; The immediate frequency cable line is delivered to signal demodulator again and is done follow-up image processing.The 1st figure is example with the digital satellite broadcasting, demonstrates the required element of receiving satellite signal.At first come receiving satellite signal with disc-shaped antenna (disk) 10.The general used satellite frequency (radio frequency) of TV is about 10.7G-12.75GHz, so reduce to 22 the intermediate frequency frequency ranges that can transmit of coaxial cable (about 950M-2150MHZ) after need signal being amplified with satellite frequency demultiplier 20.General satellite frequency demultiplier more than 20 is installed on the disc-shaped antenna 10.At last be connected in addition demodulation of indoor demodulator 30 with intermediate frequency cable 22, (indoor unit is IDU) as TV etc. to connect indoor unit 40.
And along with the indoor unit of satellite receiving system continue progressive, increasing indoor unit have personal video recorder (personal video records, function PVR), on one side can allow the user watch program, Yi Bian include the program of different channel.Therefore, the satellite receiver demand of a plurality of outputs also increases gradually.
The 2nd figure shows the full frequency band satellite frequency demultiplier of traditional double polarization dual output, is made up of institutes such as a pair of low noise amplifier (LNA) 212, a low noise amplifier bias circuit 214, a pair of local oscillator 255 and 257, mixer 251 and 253, intermediate frequency amplifier 259, intermediate frequency commutation circuit 232, control circuits 262.After this type of satellite frequency demultiplier is amplified the signal of level and vertical polarization by low noise amplifier 212, by signal branch device 220 signal is divided into two strands, the band pass filter 242 and 244 of delivering to different filter ranges respectively is divided into high band-vertical signal (S with signal HV), low-frequency range-vertical signal (S LV), high band-horizontal signal (S HH) and low-frequency range-horizontal signal (S LH).The running of low noise amplifier bias circuit 214 may command low noise amplifiers 212.Local oscillator 255 and 257 respectively produces the wave of oscillation of different frequency, usually be about 10.6GHz and 9.75GHz, drop to about 0.95-2.15GHz by about 10.7G-12.75GHz with frequency range with vertical polarization radiofrequency signal (V) and horizontal polarization radiofrequency signal (H).Respectively through mixer 251 or 253, filter 246 or 248 intermediate-freuqncy signals that produce separately, select to obtain which intermediate-freuqncy signal by four pairs two intermediate frequency commutation circuit 232 and control circuit 262 more again.
Satellite frequency demultiplier design among the 2nd figure, need use dielectric oscillator (DRO) in addition in mixer, dielectric oscillator not only needs artificial frequency modulation, has also occupied very big printed circuit board (PCB) (print circuitboard, PCB) area is the shortcoming of this type of frequency demultiplier design.
Summary of the invention
In view of this, the utility model proposes a frequency demultiplier, include two low noise amplifiers, commutation circuit, filter, two oscillators, mixer, intermediate frequency amplifier and control circuit.Low noise amplifier is used to amplify two polarization signals, filter can allow the signal of a plurality of characteristic frequency pass through, mixer is used for the output of this filter is mixed with the first or second vibration phase of wave, intermediate frequency amplifier is used for the output of this mixer is amplified, control circuit can select two one of them person of polarization signal to be output, also can select above-mentioned oscillator to export the input of one of them person for above-mentioned mixer.
Description of drawings
The 1st figure shows that digital satellite broadcasting is at the required element of receiving satellite signal.
The 2nd figure shows the full frequency band satellite frequency demultiplier of traditional two polarization dual outputs.
3A figure is an embodiment of the present utility model, is the calcspar of the single output of a pair of polarization low noise full range amplifying frequency demultiplier.
3B, 3C figure are respectively the single output of of the present utility model pair of polarization low noise full range amplifying frequency demultiplier, and another implements calcspar.
4A figure is another embodiment of the present utility model, is the calcspar of a pair of polarization dual-output low noise full range amplifying frequency demultiplier.
4B, 4C, 4D figure are respectively of the present utility model pair of polarization dual-output low noise full range amplifying frequency demultiplier, and another implements calcspar.
Label declaration:
10 disc-shaped antennas, 20 frequency demultipliers
22 intermediate frequency cables, 30 demodulator
40 indoor units, 220,221 signal branch devices
214 low noise amplifier bias plasma, 210,212,216,217 low noise amplifiers
The road
230 4 pairs two commutation circuit 237 reference oscillation sources
234 2 pairs one switch circuit 236,237 reference oscillation sources
240,241 band pass filters, 242,244 band pass filters
246,232 4 pairs two Mid Frequencies of 248 band pass filters or low pass filtered are cut
The ripple device changes circuit
243 voltage controlled oscillators, 247 frequency/phase detectors
245 voltage controlled oscillators, 249 frequency eliminators
250 integrated circuits, 251,252,253 mixers
254,255, local oscillator 258,259 intermediate frequency amplifiers
256、257
260,266 control circuits, 261 amplifiers
262 filters, 263 decoders
264 control circuits, 265 amplifiers
266 amplifiers, 270,272 output ports
275 phase-locked loops, 274 phase-locked loops
280 integrated circuits, 281 frequency/phase detectors
282 mixers, 283 frequency eliminators
284,286 local oscillators, 285 decoders
288 intermediate frequency amplifiers, 290,292 integrated circuits
The vertical polarization signal of V H horizontal polarization signal
S HVHigh band-vertical signal S LVLow-frequency range-vertical signal
S HHHigh band-horizontal signal S LHLow-frequency range-horizontal signal
Embodiment
3A figure is an embodiment of the present utility model, is the calcspar of the single output of a pair of polarization low noise full range amplifying frequency demultiplier.Present embodiment switches institutes such as circuit 234, band pass filter 240, mixer 252, a pair of local oscillator 254 and 256, filter 262, intermediate frequency amplifier 258 and control circuit 264 by two pairs one to be formed.Wherein include low noise amplifier 210 and 211, low noise amplifier bias circuit 214 in two pairs one switching circuit 234.After low noise amplifier 210,211 amplified vertical polarization signal (V), horizontal polarization signal (H) respectively, control circuit 264 is selective reception horizontal polarization signal 211 or vertical polarization signal 210 again.Filter noise through delivering to a band pass filter 240 after partial low noise amplifier 216 amplifications, signal is sent to the action that mixer 252 is carried out frequency reducings.Mixer 252 is with local oscillator 254 or 256 wave of oscillation S that produce 2Output S with band pass filter 240 1Mix mutually, can produce intermediate-freuqncy signal.Control circuit 264 can be selected to be output as S with local oscillator 254 or 256 2After filter 262, local oscillated signal and high-frequency signal be by elimination, pass through intermediate frequency amplifier 258 again after, can be in the signal after output port 270 obtains a frequency reducing.Wherein the output that obtains of output port 270 can be high band-vertical signal, low-frequency range-vertical signal, high band-horizontal signal or low-frequency range-horizontal signal one of them.That is to say that control circuit 264 can be selected vertical polarization signal V or horizontal polarization signal H, and can determine to determine that with the output of local oscillator 254 or 256 signal content of output port 270 is high band or low-frequency range.
In the utility model, do not limit which kind of using, wave of oscillation S is provided 2Element.3B figure is another enforcement calcspar of the single output of of the present utility model pair of polarization low noise full range amplifying frequency demultiplier.In the present embodiment, replace local oscillator 254,256, in addition, and must provide the wave of oscillation of fixed frequency to be used as the input of phase-locked loop 273 in a reference oscillation source 236 with a phase-locked loop 273.In the present embodiment, adopt a quartz (controlled) oscillator as reference oscillation source 236.Control circuit 264 also produces the frequency of oscillation of control signal with 273 outputs of decision phase-locked loop.
3C figure is another enforcement calcspar of the single output of of the present utility model pair of polarization low noise full range amplifying frequency demultiplier.Wherein a kind of embodiment of phase-locked loop is provided in the present embodiment.Behind signal incoming frequency/phase detectors 247 that reference oscillation source 236 produces, compare with the oscillator signal phase difference of frequency eliminator 249 generations again.Frequency/phase detector 247 changes into magnitude of voltage with the phase difference of the output of reference oscillation source 236 and frequency eliminator 249, is used to adjust the frequency of oscillation of voltage controlled oscillator 245.By the output S of mixer 252 with amplifier 261 1Mix mutually, can produce an intermediate-freuqncy signal.Control circuit 264 can be by the divisor adjustment of decoder 263 with frequency eliminator 249, producing required signal, and then the output of control mixer 252.After passing through intermediate frequency amplifier 258 again, can be in the signal after output port 270 obtains a frequency reducing.Wherein the output that obtains of output port 270 can be high band-vertical signal, low-frequency range-vertical signal, high band-horizontal signal or low-frequency range-horizontal signal one of them.That is to say that control circuit 264 can be selected vertical polarization signal V or horizontal polarization signal H, and the output that can control frequency eliminator 249 to decide the signal content of output port 270 be the high band or the low-frequency range of satellite-signal.
For instance, the frequency of oscillation that hypothetical reference oscillation source 236 provides is 50MHz, and the divisor of frequency eliminator 249 is 195.Then the frequency 9750MHz of voltage controlled oscillator 245 promptly becomes the wave of oscillation of a 50MHz through behind the frequency eliminator 249.In addition, if change divisor into 212, then the frequency 10600MHz of voltage controlled oscillator 245 is through just becoming the wave of oscillation of a 50MHz behind the frequency eliminator 249.
4A figure is another embodiment of the present utility model, is the calcspar of a pair of polarization dual-output low noise full range amplifying frequency demultiplier.Present embodiment by a pair of low noise amplifier 210 and 211, low noise amplifier bias circuit 214, a pair of signal branch device 220 and 221, four pairs two commutation circuits 230, pair of bandpass 240 and 241, a pair of mixer 252 and 282, the two pairs of local oscillators 254 and 256,284 and 286, a pair of low pass filter or band pass filter 262 and 292, a pair of intermediate frequency amplifier 258 and 288 and control circuit 260 etc. form.Low noise amplifier 210,211 is delivered to four pairs two commutation circuits 230 with signal branch device 220,221 respectively with the signal that amplified after respectively vertical polarization signal (V), horizontal polarization signal (H) being amplified.Signal branch device 220,221 can transfer input to two identical outputs.The running of low noise amplifier bias circuit 214 may command low noise amplifiers 210,211.Control circuit 260 can be selected the output signal S of four pairs two commutation circuits 230 S1And S S2For from the horizontal polarization signal or from vertical polarization signal.S S1And S S2Signal content independent each other, meaning is that control circuit 260 can separately determine S S1, S S2For from vertical polarization or horizontal polarization signal, not because of S S1Select the polarization signal of a certain direction and limited S S2Selection.The output S of commutation circuit 230 S1After delivering to band pass filter 240 and filtering noise, signal S 3Be sent to mixer 252 and carry out the action of frequency reducing.Mixer 252 is with local oscillator 254 or 256 wave of oscillation S that produce 2Output S with band pass filter 240 3Mix mutually, can produce an intermediate-freuqncy signal.After filter 262, local oscillated signal and high-frequency signal be by elimination, pass through intermediate frequency amplifier 258 again after, can be in the signal after output port 270 obtains a frequency reducing.The output that output port 270 obtains can be high band-vertical signal, low-frequency range-vertical signal, high band-horizontal signal or low-frequency range-horizontal signal one of them.S 2The source be local oscillator 254 or 256 can influence output port 270 be high band or low-frequency range.
In addition, the output S of commutation circuit 230 S2After delivering to a band pass filter 241 and filtering noise, signal S 5Be sent to mixer 282 frequency reducings.Mixer 282 is with local oscillator 284 or 286 wave of oscillation S that produce 4Output S with band pass filter 241 6Mix mutually, can produce an intermediate-freuqncy signal.After filter 292, local oscillated signal and high-frequency signal be by elimination, pass through intermediate frequency amplifier 288 again after, can be in the signal after output port 272 obtains a frequency reducing.Wherein the output that obtains of output port 272 can be high band-vertical signal, low-frequency range-vertical signal, high band-horizontal signal or low-frequency range-horizontal signal one of them.Control circuit 260 can determine to be output as S with local oscillator 284 or 286 4S 4The source be local oscillator 284 or 286 can influence output port 272 be high band or low-frequency range.Same, control circuit 260 can freely be selected S 2, S 4The source why, can be because of S 2Select high band or low-frequency range and limited S 4Possibility.
4B figure is another enforcement calcspar of of the present utility model pair of polarization dual-output low noise full range amplifying frequency demultiplier.In the present embodiment, replace local oscillator 254,256,284 and 286, in addition, provide the wave of oscillation of fixed frequency to be used as the input of phase-locked loop 273,275 by reference oscillation source 236,237 with phase-locked loop 274,275.In the present embodiment, also adopt a quartz (controlled) oscillator as the reference oscillation source.Control circuit 260 also produces the frequency of oscillation of control signal with 274,275 outputs of decision phase-locked loop.
4C figure is another enforcement calcspar of of the present utility model pair of polarization dual-output low noise full range amplifying frequency demultiplier.Low noise amplifier 210,211 is delivered to four pairs two commutation circuits 230 with signal branch device 220,221 respectively with the signal that amplified after respectively vertical polarization signal (V), horizontal polarization signal (H) being amplified.Signal branch device 220,221 can transfer input to two identical outputs.The running of low noise amplifier bias circuit 214 may command low noise amplifiers 210,211.Control circuit 260 can be selected the output signal S of four pairs two commutation circuits 230 S1And S S2For from the horizontal polarization signal or from vertical polarization signal.S S1And S S2Signal content independent each other, meaning is that control circuit 260 can separately determine S S1, S S2For from vertical polarization or horizontal polarization signal, not because of S S1Select the polarization signal of a certain direction and limited S S2Selection.S S1With S S2Respectively behind the input tape bandpass filter 240,241, all the other signal transfer modes are all similar to 3B figure, do not state so skip at this.
4D figure is similar to 4C figure framework, but has only used a reference oscillation source 237 in 4D figure.The cost of electronic component and shared area can have been saved so.
3A figure also can spread out and stretch out other execution mode.Mixer among the 3rd figure 252, local oscillator 254 and 256, filter 261 and intermediate frequency amplifier 258 integrated circuit with integrated circuit 250 or 3-1 figure is replaced, and also is framework of the present utility model.
In like manner, in embodiment of the present utility model, mixer, oscillator and intermediate frequency amplifier can be replaced with an integrated circuit in addition, shown in the integrated circuit among the 3B-3C figure 280.But control circuit 264 input control signals to decoder 263 adjusting divisor, and then the output frequency of control voltage controlled oscillator.And mixer 252, local oscillator 254 and 256, filter 262 and intermediate frequency amplifier 258 can also integrated circuits 250 or replace among the 4A figure, and mixer 252, voltage controlled oscillator 245, frequency/phase detector 247 and frequency eliminator 249 etc. all can replace by integrated circuit 280 among 4C, the 4D figure.
Though the utility model discloses as above with embodiment such as single output, dual outputs, right any those skilled in the art can also spirit of the present utility model extend the satellite frequency demultiplier of many outputs, many polarizations, many satellites.
Though the utility model has increased the element of radio band, but can reduce the number of band pass filter and mixer, omit the intermediate frequency commutation circuit of multi-to-multi, do not need simultaneously to re-use the electronic material of the dielectric resonator of artificial frequency modulation, can adopt the mode of 4C figure for many outputs, all integrated circuits are shared a reference oscillation source.But the utility model reduced volume, the step that reduces electronic material, removes artificial frequency modulation from generally speaking, are a satellite frequency demultiplier design that can reduce production costs.
Though the utility model discloses as above with preferred embodiment; so it is not to be used to limit the utility model; any those skilled in the art; in not breaking away from spirit and scope of the present utility model; when doing a little change and retouching, therefore protection range of the present utility model is as the criterion when looking appended the claim scope person of defining.

Claims (10)

1. frequency demultiplier includes:
Commutation circuit, above-mentioned commutation circuit has at least two inputs, is respectively first signal and secondary signal, and wherein above-mentioned first signal and secondary signal are the polarization signal, and the output of above-mentioned commutation circuit system determines according to first control signal;
Filter is couple to above-mentioned commutation circuit, is used to allow the signal of a plurality of characteristic frequency pass through;
The reference oscillation source provides the reference oscillation ripple;
The phase-locked loop produces first wave of oscillation according to second control signal and above-mentioned reference oscillation ripple;
Mixer is used for the output of above-mentioned filter is mixed with the above-mentioned first vibration phase of wave;
Intermediate frequency amplifier is used for the output of above-mentioned mixer is amplified; And
Control circuit is used to produce above-mentioned first and second control signal.
2. frequency demultiplier according to claim 1, wherein above-mentioned phase-locked loop are to comprise:
Frequency eliminator is used for involving a divisor according to above-mentioned first vibration and produces the 3rd wave of oscillation;
The frequency/phase detector is used for producing voltage according to the frequency of second wave of oscillation and above-mentioned the 3rd wave of oscillation;
Voltage controlled oscillator is used for adjusting the above-mentioned first vibration wave frequency according to above-mentioned voltage; And
Decoder changes above-mentioned divisor according to above-mentioned second control signal.
3. frequency demultiplier according to claim 1, wherein above-mentioned commutation circuit are the commutation circuit of two inputs, one output, comprising:
First low noise amplifier is used to amplify first signal: and
Second low noise amplifier is used to amplify secondary signal, and wherein the first input end of above-mentioned commutation circuit is above-mentioned first signal, and second is input as above-mentioned secondary signal.
4. frequency demultiplier according to claim 1 more comprises:
First and second signal branch device is received above-mentioned commutation circuit respectively, and wherein each signal branch device can change into an input signal two identical output signals:
First low noise amplifier is couple to the above-mentioned first signal branch device, is used to amplify above-mentioned first signal; And
Second low noise amplifier is couple to above-mentioned secondary signal splitter, is used to amplify above-mentioned secondary signal.
5. frequency demultiplier according to claim 4, wherein above-mentioned commutation circuit is the high frequency commutation circuit of four inputs, two outputs, wherein above-mentioned filter is first band pass filter, above-mentioned mixer is first mixer, above-mentioned phase-locked loop is first phase-locked loop, above-mentioned intermediate frequency amplifier is first intermediate frequency amplifier, wherein first of above-mentioned commutation circuit, second input is couple to the output of the above-mentioned first signal branch device, the 3rd, the 4th input is couple to the output of above-mentioned secondary signal splitter, above-mentioned commutation circuit has first output to be couple to above-mentioned first band pass filter, above-mentioned commutation circuit one second output is couple to second band pass filter, above-mentioned second band pass filter is couple to second mixer, second phase-locked loop is couple to above-mentioned second mixer, second intermediate frequency amplifier is couple to above-mentioned second mixer, above-mentioned control circuit also produces the 3rd control signal, makes second phase-locked loop produce second wave of oscillation according to above-mentioned the 3rd control signal and above-mentioned reference oscillation ripple.
6. frequency demultiplier according to claim 5, wherein above-mentioned intermediate frequency amplifier circuit are output as mutually independently output.
7. frequency demultiplier according to claim 5, wherein the reference oscillation ripple of above-mentioned first, second phase-locked loop can be produced or be produced by two identical oscillators by an oscillator.
8. frequency demultiplier according to claim 1, wherein above-mentioned mixer, above-mentioned phase-locked loop and above-mentioned intermediate frequency amplifier can be realized by an integrated circuit.
9. frequency demultiplier according to claim 1, wherein above-mentioned low noise amplifier can be controlled by a low noise amplifier bias circuit.
10. frequency demultiplier according to claim 1, wherein above-mentioned filter can be a band pass filter.
CN 200520016348 2005-04-18 2005-04-18 satellite downconverter Expired - Lifetime CN2792022Y (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101459437B (en) * 2007-12-14 2012-04-25 启碁科技股份有限公司 Frequency demultiplier with ninety degree hybrid coupler having open or short circuit transmission line
CN103490730A (en) * 2013-09-10 2014-01-01 珠海市百音电子科技有限公司 PLL-CS waveband multifunctional frequency down converter with dual-polarized integrated circuit structure
CN103595353A (en) * 2012-08-15 2014-02-19 珠海市肯普电子科技有限公司 Phase-locked loop type down-conversion amplifier with voltage-controlled oscillator
CN112104825A (en) * 2020-09-28 2020-12-18 珠海市普斯赛特科技有限公司 Multi-spectrum common-path demodulation output circuit and frequency demultiplier

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101459437B (en) * 2007-12-14 2012-04-25 启碁科技股份有限公司 Frequency demultiplier with ninety degree hybrid coupler having open or short circuit transmission line
CN103595353A (en) * 2012-08-15 2014-02-19 珠海市肯普电子科技有限公司 Phase-locked loop type down-conversion amplifier with voltage-controlled oscillator
CN103595353B (en) * 2012-08-15 2016-10-05 珠海市肯普电子科技有限公司 A kind of voltage controlled oscillator phase-locked loop type frequency reducing amplifier
CN103490730A (en) * 2013-09-10 2014-01-01 珠海市百音电子科技有限公司 PLL-CS waveband multifunctional frequency down converter with dual-polarized integrated circuit structure
CN103490730B (en) * 2013-09-10 2017-04-05 珠海市百音电子科技有限公司 The multi-functional frequency demultiplier of PLL CS wave bands of dual polarization integrated circuit structure
CN112104825A (en) * 2020-09-28 2020-12-18 珠海市普斯赛特科技有限公司 Multi-spectrum common-path demodulation output circuit and frequency demultiplier

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Expiration termination date: 20150418

Granted publication date: 20060628