CN2786640Y - GPS and Big Dipper receiver signal auto and manual switching equipment - Google Patents
GPS and Big Dipper receiver signal auto and manual switching equipment Download PDFInfo
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- CN2786640Y CN2786640Y CN 200520078711 CN200520078711U CN2786640Y CN 2786640 Y CN2786640 Y CN 2786640Y CN 200520078711 CN200520078711 CN 200520078711 CN 200520078711 U CN200520078711 U CN 200520078711U CN 2786640 Y CN2786640 Y CN 2786640Y
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Abstract
The utility model relates to GPS and Big Dipper receiver signal automatic and manual switching equipment which comprises a single chip computer, a signal conversion circuit 1, a manual /automatic switching device, a signal conversion circuit 2, a signal control circuit, a signal selective circuit, a frequency dividing circuit and a single chip computer processor. The utility model realizes the uninterrupted switching of time information of a global navigation timing positioning system and a Big Dipper receive timing positioning system; under the condition of no signal of the two systems, the utility model has time keeping function to realize the uninterruptiblity and the continuity of the time information. The utility model has the advantages of reasonable design, simplified circuit, complete function, stable operation, working safety, etc. The utility model can be popularized and used for time unitization application departments.
Description
Technical field
The utility model belongs to technical field of radio, is specifically related to GPS and Big Dipper receiver signal auto-manual switching device shifter.
Background technology
Accurately time service and time synchronized are national defense system, the indispensable ingredient of mobile communication observing and controlling and many departments, usually adopt regularly positioning system of GPS worldwide navigation at present, in view of this system dangerous, especially in wartime, than higher, confidentiality is eager to excel to the time system accuracy requirement, and any moment temporal information all can not be interrupted, obviously this system can not be adopted, the Time Location System of our country oneself should be set up.Our country has set up the Big Dipper and has received regularly positioning system at present, and also constantly perfect, the mutual displacement of positioning system temporal information is very important to realize receiving GPS worldwide navigation timing positioning system and the Big Dipper regularly.Present two timing positioning system temporal informations are mutually independently, if use two timing positioning system temporal informations to replace mutually, can only adopt artificial plug signal, both bother like this, lose time, and can cause the temporal information interruption again.But also there are not GPS worldwide navigation timing positioning system and the Big Dipper to receive the regularly mutual switching device shifter of positioning system temporal information at present.
Summary of the invention
Technical problem to be solved in the utility model is to provide a kind of reasonable in design, circuit reduction, function is complete, running is stable, safe and reliable GPS and Big Dipper receiver signal auto-manual switching device shifter.
Solving the problems of the technologies described above the technical scheme that is adopted is that it comprises:
The one-chip computer that complete machine is controlled; Signaling conversion circuit 1, the input end order sheet computing machine of this circuit; Manual switch, the input end order sheet computing machine and the signaling conversion circuit 1 of this circuit; Signaling conversion circuit 2; Signal control circuit, the input termination signaling conversion circuit 2 and the manual switch of this circuit; Signal selecting circuit, the input termination signal control circuit of this circuit; Frequency dividing circuit, the input termination signal selecting circuit of this circuit; Processor of single chip computer, the input termination frequency dividing circuit and the signal selecting circuit of this circuit.
The utility model has been realized worldwide navigation regularly positioning system and the regularly uninterrupted switching of positioning system temporal information of the Big Dipper reception, all has punctual function under the situation of no signal two systems, can realize at any time under the unbroken situation of signal that two kinds of automatic or manual buttons of system switch, and have realized uninterrupted and continuity, the safe reliability of temporal information.The utlity model has advantages such as reasonable in design, circuit reduction, function is complete, running is stable, safe and reliable, can the time application department that unites promote the use of.
Description of drawings
Fig. 1 is an electrical principle block scheme of the present utility model.
Fig. 2 is an electronic circuit schematic diagram of the present utility model.
Embodiment
Below in conjunction with drawings and Examples the utility model is further described, but the utility model is not limited to these embodiment.
Fig. 1 has provided electrical principle block scheme of the present utility model, referring to Fig. 1.In Fig. 1, the utility model is connected and composed by one-chip computer, signaling conversion circuit 1, manual switch, signaling conversion circuit 2, signal control circuit, signal selecting circuit, frequency dividing circuit, processor of single chip computer.The output termination signaling conversion circuit 1 and the manual switch of one-chip computer, the output terminal catcher of signaling conversion circuit 1 moves/automatic switchover device, the output termination signal control circuit of signaling conversion circuit 2, signal control circuit output termination signal selecting circuit, the output termination frequency dividing circuit and the processor of single chip computer of signal selecting circuit, the output terminal of frequency dividing circuit connects processor of single chip computer.
GPS signal second from the output of GPS receiver, timecode information is to signaling conversion circuit 1, the Big Dipper signal second of the Big Dipper receiver output, timecode information is to signaling conversion circuit 2, and the serial ports timecode information of GPS receiver output is input to Single Chip Microcomputer (SCM) system, carrying out duty judges, if receive normal, single-chip microcomputer is exported a high level, signal converter 1 output high level under second signal condition is being arranged, at this moment as long as manual automatic switchover device is in automated location, manually automatic switchover device is exported a level signal and is given the gps signal control circuit, makes the second signal of GPS, temporal information outputs to processor of single chip computer by signal selecting circuit.If same the Big Dipper signal second, timecode information have signal, arrive Big Dipper signal control circuit by signaling conversion circuit 2 outputs one level signal, but under GPS signal second and time information signal normal condition, signal selecting circuit is preferentially selected GPS signal second and temporal information, and Big Dipper signal control circuit can only allow signal selecting circuit export GPS signal second and temporal information.If GPS signal second and temporal information all do not have or one do not have, signal control circuit automatically switches to Big Dipper signal, signal selecting circuit selects the Big Dipper signal second and temporal information to output to processor of single chip computer.If GPS worldwide navigation timing positioning system and the Big Dipper receive when regularly positioning system all breaks down, keep the work processor of single chip computer by interruption second of frequency dividing circuit generation and walk the software clock, make this cover system keep continuity.When manual automatic switchover device during at manual state, regularly positioning system running or the Big Dipper receive regularly positioning system running to select the GPS worldwide navigation by manually-operated.
In Fig. 2, the signaling conversion circuit 1 of present embodiment is connected and composed by integrated circuit U1A, integrated circuit U1B, integrated circuit U1C, integrated circuit U2A, integrated circuit U3A, R1, C1, the model of integrated circuit U1A, integrated circuit U1B, integrated circuit U1C is MC74HCO4, the model of integrated circuit U2A is MC74HC123, and the model of integrated circuit U3A is MC74HCO8A.GPS signal second is from the input end 1 pin input of integrated circuit U1A, and output terminal 2 pin of integrated circuit U1A connect output terminal 3 pin and the one-chip computer of integrated circuit U1B, and output terminal 4 pin of integrated circuit U1B connect 2 pin and the signal control circuit of integrated circuit U2A.14 pin of integrated circuit U2A connect the end of C1, the other end that 15 pin meet C1 and connect power supply, 1 pin ground connection, 3 pin by R1 and connect input 1 pin that power supply, 13 pin meet integrated circuit U3A.Another input end 2 of integrated circuit U3A is order sheet computing machine, the moving automatic switchover device of output terminal 3 pin catcher.The serial ports temporal information of GPS is from the input of 5 pin of integrated circuit U1C, the output terminal 6 pin order sheet departments of computer science of the integrated circuit U1C gps signal control circuit of unifying.The standard second signal that receives from the GPS receiver outputs to integrated circuit U2A monostable 2 pin with the serial ports timing code respectively through the phase inverter that integrated circuit U1A～integrated circuit U1C is connected and does the signal level conversion, and the serial ports timing code of GPS outputs to microcontroller system and handles judgement simultaneously.
The signaling conversion circuit 2 of present embodiment is connected and composed by integrated circuit U7A, integrated circuit U7E, integrated circuit U7F, integrated circuit U8A, integrated circuit U8B, integrated circuit U9A, R2～R4, C3, C4, and the model of integrated circuit U7A, integrated circuit U7E, integrated circuit U7F is MC74HCO4.The model of integrated circuit U8A, integrated circuit U8B is 74HC123, and the model of integrated circuit U9A is MC74HCO8A.Big Dipper signal second is from the input end 11 pin input of integrated circuit U7E, and output terminal 10 pin of integrated circuit U7E connect input end 13 pin of integrated circuit U7F, and output terminal 12 pin of integrated circuit U7F connect 2 pin and the signal control circuit of integrated circuit U8A.14 pin of integrated circuit U8A connect the end of C3, the other end that 15 pin meet C3 and connect power supply, 1 pin ground connection, 3 pin by R3 and connect an input end 1 pin that power supply, 13 pin meet integrated circuit U9A.From the input of integrated circuit U7A input end 1 pin, integrated circuit U7A output terminal 2 pin connect 10 pin of integrated circuit U8B to the serial ports temporal information of the Big Dipper through R2.6 pin of integrated circuit U8B connect the end of C4, the other end that 7 pin meet C4 and connect power supply, 9 pin ground connection, 11 pin by R4 and connect another input end 2 pin that power supply, 5 pin meet integrated circuit U9A.Output terminal 3 pin of integrated circuit U9A connect signal control circuit.Anti-phase from standard second signal and serial ports timing code that the Big Dipper receiver receives by integrated circuit U7A, integrated circuit U7E, integrated circuit U7F phase inverter, output to 2 pin of integrated circuit U8A, 10 pin of integrated circuit U8B, output to integrated circuit U9A respectively from output terminal 13 pin of integrated circuit U8A, output terminal 5 pin of integrated circuit U8B, convert level to and output to control circuit.
The one-chip computer of present embodiment is connected and composed by integrated circuit U6, crystal oscillator JZ, C5～C7, and the model of integrated circuit U6 is 89C51.7 pin of integrated circuit U6 connect output terminal 2 pin, 18 pin and 19 pin that integrated circuit U3A input end 2 pin, 12 pin meet integrated circuit U1A and connect the clock circuit that crystal oscillator JZ is connected with C5 and C6, the end that 9 pin meet C7, output terminal 6 pin and the gps signal control circuit that 10 pin meet integrated circuit U1C, the other end ground connection of C.Be input to single-chip microcomputer from the serial ports timecode information of GPS receiver output, carry out duty and judge, if signal is normal, the level of the P1.6 position of integrated circuit U6 is uprised by low, becomes high level with second of time signal by monostable and outputs to signal control circuit.
The manual switch of present embodiment is connected and composed by integrated circuit U3C, R5, K switch 1, K switch 2.The model of integrated circuit U3C is MC74HCO8A.Output terminal 3 pin, contact 3 that the contact 2 that connects K switch 1 meets integrated circuit U3A connect signal control circuit.The contact that an input end 9 pin of integrated circuit U3C and 10 pin connect K switch 2 also connects the electric shock 1 that power supply, output terminal 8 pin connect K switch 1, another contact ground connection of K switch 2 by R5.When the contact 1 of K switch 1 was connected with contact 3, whole device was in manual state, at this moment selects job information to depend on the state of K switch 2, and K switch 2 is closed, and selects the Big Dipper to receive regularly positioning system, disconnected and selected regularly positioning system of GPS worldwide navigation.More than select by manually finishing.
The signal control circuit of present embodiment is connected and composed by integrated circuit U3B, integrated circuit U3D, integrated circuit U5A, integrated circuit U9B, integrated circuit U9C, integrated circuit U9D, the model of integrated circuit U3B, integrated circuit U3D, integrated circuit U9B, integrated circuit U9C, integrated circuit U9D is MC74HCO8A, and the model of integrated circuit U5A is MC74HCO4.An input end 4 pin of integrated circuit U3B connect output terminal 6 pin, output terminal 6 pin that the input end of the contact 3 of K switch 1 and integrated circuit U5A and integrated circuit U3D one input end 13 pin, another input end 5 pin meet integrated circuit U1C and connect signal selecting circuit.Output termination integrated circuit U9B one input end, 5 pin of integrated circuit U5A and an input end 13 pin of integrated circuit U9D.Output terminal 3 pin, output terminal 6 pin of another input end of integrated circuit U9B 4 pin integrated circuit U9BA connect integrated circuit U9C one input end 9 pin.Output terminal, output terminal 8 pin that another input end 10 pin of integrated circuit U9C meet integrated circuit U7A connect signal selecting circuit.Another input end 12 pin of integrated circuit U3D connect output terminal, the output termination signal selecting circuit of integrated circuit U1B.Integrated circuit U9B controls the level of integrated circuit U5A output controlling from the level of integrated circuit U9A output, exports serial ports timing code, integrated circuit U9D outputting standard signal second to signal selecting circuit by integrated circuit U9C.GPS serial time code signal by integrated circuit U3B output outputs to signal selecting circuit.GPS signal second by integrated circuit U3D output outputs to signal selecting circuit.
The signal selecting circuit of present embodiment is connected and composed by integrated circuit U4A, integrated circuit U4B, integrated circuit U13B, R10, C10, and the model of integrated circuit U4A, integrated circuit U4B is MC74HC32A, and the model of integrated circuit U13B is 74HC221.An input end 1 pin of integrated circuit U4A connects output terminal 6 pin of integrated circuit U3B, output terminal 8 pin, output termination 3 pin that another input end 2 pin meet integrated circuit U9C connect processor of single chip computer.An input end 4 pin of integrated circuit U4B connect output terminal 11 pin of integrated circuit U3D, output terminal 11 pin that another input end 5 pin meet integrated circuit U9D, 10 pin that output terminal 6 pin meet integrated circuit U13B.6 pin of integrated circuit U13B connect the end of C10, the other end that 7 pin meet C10 and connect power supply, 11 pin by R10 and connect 2 pin that power supply, integrated circuit 9 pin ground connection, 5 pin meet integrated circuit U13A.When 4 pin of the integrated circuit U3B of signal control circuit, 13 pin of integrated circuit U3D are high level, signal selecting circuit control GPS information is passed through.When 9 pin of the integrated circuit U9C of signal control circuit, 13 pin of integrated circuit U9D are high level, signal selecting circuit control Big Dipper information is passed through.
The frequency dividing circuit of present embodiment is connected and composed by integrated circuit U10A～integrated circuit U14A, integrated circuit U10B～integrated circuit U12B, triode T1, triode T2, R6～R9, C8～C9, the model of integrated circuit U10A, integrated circuit U10B, integrated circuit U11A, integrated circuit U11B, integrated circuit U12A, integrated circuit U12B, integrated circuit U13A is 74HC390, and the model of integrated circuit U14A is 74HC221.The pulse signal of 5MHZ is by the end input of C8, the base stage of another termination triode T1 of C8 also connects power supply by R6, the base stage of the collector connecting transistor T2 of triode T1 connects power supply by R7, and the collector of triode T2 connects 4 pin of integrated circuit U10A and connects power supply by R8.7 pin of integrated circuit U10A connect 15 pin of integrated circuit U10B, and 13 pin of integrated circuit U10B connect 1 pin that 12 pin, 9 pin meet integrated circuit U11A.3 pin of integrated circuit U11A connect 15 pin that 4 pin, 7 pin meet integrated circuit U11B.13 pin of integrated circuit U11B connect 1 pin that 12 pin, 9 pin meet integrated circuit U12A.3 pin of integrated circuit U12A connect 15 pin that 4 pin, 7 pin meet integrated circuit U12B.13 pin of integrated circuit U12B connect 1 pin that 12 pin, 9 pin meet integrated circuit U13A.3 pin of integrated circuit U13A connect 1 pin that 4 pin, 7 pin meet integrated circuit U14A.14 pin of integrated circuit U14A connect the end of C9, the other end that 15 pin meet C9 and connect power supply, 13 pin outputs second, 4 pin by R9 and connect processor of single chip computer.14 pin of 2 pin of integrated circuit U10A, integrated circuit U11A, integrated circuit U12A, integrated circuit U13A and integrated circuit U10B, integrated circuit U11B, integrated circuit U12B are connected with 5 pin of integrated circuit U13B.Integer circuit that synchronous 5MHZ frequency signal connects into by triode T1, triode T2 and the frequency dividing circuit that integrated circuit U10A～integrated circuit U13A is linked to be produce second signal output, and the look-at-me of processor of single chip computer is provided simultaneously.Serial Port Information send processor of single chip computer equally.
The processor of single chip computer of present embodiment is connected and composed by integrated circuit U15, crystal oscillator JZ2, C11～C13, and the model of integrated circuit U15 is 89C51.4 pin, 18 pin and 19 pin that 12 pin of integrated circuit U15 meet integrated circuit U14A meet crystal oscillator JZ2 and are connected output terminal 3 pin, the output of 11 pin single port, 31 pin that clock circuit, 10 pin meet integrated circuit U4A with C11 and C12 and connect power supply, and C13 is a filter capacitor.Frequency dividing circuit produces the standard second signal, and as interruption second of processor of single chip computer, the timecode information of the while GPS or the Big Dipper outputs to processor of single chip computer and decodes, and the statement of being exported same form by processor of single chip computer provides the user to use.
Claims (1)
1, a kind of GPS and Big Dipper receiver signal auto-manual switching device shifter is characterized in that it comprises: the one-chip computer that complete machine is controlled;
Signaling conversion circuit 1, the input end order sheet computing machine of this circuit;
Manual switch, the input end order sheet computing machine and the signaling conversion circuit 1 of this circuit;
Signaling conversion circuit 2;
Signal control circuit, the input termination signaling conversion circuit 2 and the manual switch of this circuit;
Signal selecting circuit, the input termination signal control circuit of this circuit;
Frequency dividing circuit, the input termination signal selecting circuit of this circuit;
Processor of single chip computer, the input termination frequency dividing circuit and the signal selecting circuit of this circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520078711 CN2786640Y (en) | 2005-04-30 | 2005-04-30 | GPS and Big Dipper receiver signal auto and manual switching equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520078711 CN2786640Y (en) | 2005-04-30 | 2005-04-30 | GPS and Big Dipper receiver signal auto and manual switching equipment |
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| Publication Number | Publication Date |
|---|---|
| CN2786640Y true CN2786640Y (en) | 2006-06-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200520078711 Expired - Fee Related CN2786640Y (en) | 2005-04-30 | 2005-04-30 | GPS and Big Dipper receiver signal auto and manual switching equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2786640Y (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101752653A (en) * | 2008-12-12 | 2010-06-23 | 石家庄世纪森诺通讯有限公司 | Double-mode time service active antenna |
| CN101398474B (en) * | 2007-09-30 | 2011-12-07 | 郑州威科姆技术开发有限公司 | COMPASS and GPS double system second difference switching method |
| CN103105613A (en) * | 2011-11-09 | 2013-05-15 | 中兴通讯股份有限公司 | Method and device for signal source selection |
| CN105403899A (en) * | 2015-12-23 | 2016-03-16 | 中国船舶重工集团公司第七一〇研究所 | GPS and Beidou positioning switching system |
-
2005
- 2005-04-30 CN CN 200520078711 patent/CN2786640Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101398474B (en) * | 2007-09-30 | 2011-12-07 | 郑州威科姆技术开发有限公司 | COMPASS and GPS double system second difference switching method |
| CN101752653A (en) * | 2008-12-12 | 2010-06-23 | 石家庄世纪森诺通讯有限公司 | Double-mode time service active antenna |
| CN103105613A (en) * | 2011-11-09 | 2013-05-15 | 中兴通讯股份有限公司 | Method and device for signal source selection |
| CN103105613B (en) * | 2011-11-09 | 2017-02-08 | 中兴通讯股份有限公司 | Method and device for signal source selection |
| CN105403899A (en) * | 2015-12-23 | 2016-03-16 | 中国船舶重工集团公司第七一〇研究所 | GPS and Beidou positioning switching system |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |