CN2783655Y

CN2783655Y - Memory circuit for digital vider receiver set-top box with writing protective function

Info

Publication number: CN2783655Y
Application number: CNU2005200539780U
Authority: CN
Inventors: 陈复兴; 周宝忠
Original assignee: SHENZHEN BIANQI DIGITAL TECHNOLOGIES Co Ltd
Current assignee: MStar Software R&D Shenzhen Ltd
Priority date: 2005-01-18
Filing date: 2005-01-18
Publication date: 2006-05-24
Anticipated expiration: 2015-01-18

Abstract

The utility model relates to a memory circuit for a digital video receiving set-top box with a writing protection function. The utility model comprises a memory and a writing protection logic circuit, wherein the memory is provided with writing protection base pins; the writing protection logic circuit is provided with an address input end, a writing protection input end and a writing protection output end, wherein the writing protection output end outputs effective writing protection signals when the addresses of input ends in a specific state or signals of the writing protection input end are effective, the address input end is connected with the base pins of specific address wires of the memory and the writing protection output end is connected with the writing protection control base pins of the memory. The specific address wires of the memory in the writing protection circuit of the memory for the digital video receiving set-top box of the utility model are connected with a writing protection device, the partial storage space of the memory can achieve the writing protection function and the compatibility of different CA can be achieved by the setting of jumper wires.

Description

Digital video receiver top box memory circuitry with write-protect function

Technical field

The utility model relates to digital video receiver top box memory circuitry, is specifically related to a kind of digital video receiver top box memory circuitry with write-protect function.

Background technology

Digital Television had entered from the experimental stage in China over the past two years and had developed the popularization stage, and the digital video receiver top box is an indispensable key equipment in the Digital Television evolution.Digital TV set-top box sees it is that the terminal receiver of hardware is again the execution terminal of digital television CA (Conditional Access management software) from performance.General set-top box should be able to adapt to the CA of many companies different brands; IRDETO accounts for the bigger tame CA provider of market volume at home; the user requires the segment space (0-256K is used to the parking space that downloads) of hardware ROM is done write-protect control during integrated its software; and can normally upgrade again and write in other parts ROM space, requires simultaneously can cancel this protection flexibly when using the CA of other company.The write-protect circuit of prior art normally is directly connected to a write protect signal write-protect control pin of memory, can only realize the protection of full wafer memory, and can not realize the write-protect function of specific address space.

The utility model content

The technical problems to be solved in the utility model is; above-mentioned defective at prior art; a kind of digital video receiver top box memory circuitry with write-protect function is provided; comprise memory; described memory has write-protect control pin; it is characterized in that; also comprise the write-protect logical circuit; described write-protect logical circuit has address input end; write-protect input and be in the write-protect output that the signal of particular state or write-protect input is exported effective write protect signal when effective in the input address; described address input end links to each other with the particular address lines pin of described memory, and the write-protect control pin of described write-protect output and described memory links to each other.

In the digital video receiver top box memory circuitry with write-protect function described in the utility model; described write-protect logical circuit comprise one or and one two the input with the door; the particular address lines of described memory with or the door input link to each other; output, write-protect input and described two inputs described or door link to each other with the input of door, and described two inputs link to each other with the output of door and the write-protect control pin of described memory.

In the digital video receiver top box memory circuitry with write-protect function described in the utility model; the address wire of one or more of described memory and or door be connected with the break-make device between the input, described break-make device and or an end that links to each other be connected with a pull-up resistor.Be the different CA of compatibility, when the break-make device was communicated with, the output state of write-protect logical circuit was by address input end and the control of write-protect input; When the break-make device disconnects because or an input of door be connected with pull-up resistor, input perseverance be " 1 ", or the output perseverance be " 1 ", the signal controlling that the output signal of whole like this write-protect logical circuit can be imported by the write-protect input.

In the digital video receiver top box memory circuitry with write-protect function described in the utility model, above-mentioned break-make device is a wire jumper.

In the digital video receiver top box memory circuitry with write-protect function described in the utility model, above-mentioned break-make device is a toggle switch.

In the digital video receiver top box memory circuitry with write-protect function described in the utility model, the output of described write-protect logical circuit links to each other by the write-protect input pin of shaping output circuit and described memory.

In the digital video receiver top box memory circuitry with write-protect function described in the utility model, the protected address space of described memory is 0～128K or 0～256K or 0～512K or 0～1024K.

Because the digital video receiver top box memory circuitry with write-protect function of the present utility model; link to each other with write protector by particular address lines memory; the part memory space of memory is realized the write-protect function, can realize compatibility different CA by wire jumper is set.

Description of drawings

The utility model is described in further detail below in conjunction with drawings and Examples, in the accompanying drawing:

Fig. 1 is the structured flowchart of the write-protect logical circuit of the digital video receiver top box memory circuitry with write-protect function of the present utility model;

Fig. 2 is the circuit diagram of the write-protect logical circuit of the digital video receiver top box memory circuitry with write-protect function of the present utility model.

Embodiment

As shown in Figure 1; in the write-protect logic circuit structure block diagram of the digital video receiver top box memory of the utility model embodiment with write-protect function; 0～256K address wire scope of digital video receiver top box memory FLASH is A0～A17; its spatial dimension is 000000H～03FFFFH; as doing write-protect to this spatial dimension; only need all high addresses more than the A17 are linked respectively or the door input; carry out write-protect when promptly selecting the above high address of A17 all to be zero; the address space of this situation is 0～256K; by the gate circuit operation principle as can be known; when the high address line of all inputs or door is zero level entirely; its output is a zero level; general or gate output terminal are linked one or two input and door; this moment another be input to signal (write-protect incoming line MCU_PIO26 input signal WP# IN) with the write-protect input of door change invalid; with the gate output terminal perseverance be zero level; through integer circuit output one be the write-protect level of zero level, and pin link to each other (is that zero level is just carried out write-protect to FLASH at WP#OUT) is controlled in the output WP#OUT of integer circuit and the write-protect of FLASH.Downloading in such 0～256K can not be eliminated or rewrite again.Be input to more than the A17 or the high address line of door when having an above address wire to be high level (selectively avulsing out 0～256K interval) this door be output as high level.Controlled by the signal (the signal WP# IN of write-protect incoming line MCU_PIO26 input) of write-protect input input with the control of door output this moment, recovers normal read-write protection function.

For adapting to different CA (Conditional Access management software); the above height of A17 be address wire have at least one by wire jumper J1 with or be connected; and wire jumper J1 with or the end that links to each other of door be connected with a pull-up resistor; if the set-top box of this circuit has been installed will be with the CA of other company the time; only wire jumper J1 need be pulled out and get final product; then the input of this address wire perseverance is " 1 "; taken over by write-protect incoming line MCU_PI26 (WP# IN) with the control of door output this moment, recovers normal read-write protection function.

Have in the circuit diagram of digital video receiver top box memory embodiment of write-protect function in of the present utility model shown in Fig. 2, the high address line MIU_ADDR18 of FLASH, MIU_ADDR19, MIU_ADDR20, MIU_ADDR21 and four inputs link to each other with the input 2,3,4,5 of door U17_A; Four inputs link to each other with diode D8 is anti-phase with the output 1 of door U17_A, and write-protect incoming line P1026_FLH_WP links to each other with diode D7 is anti-phase, diode D7 in parallel common constitute two inputs and door with diode D8, pull-up resistor R78; Two inputs link to each other with the input of shaping circuit with the output 9 of door; in the present embodiment; shaping circuit is four inputs or door U17_8; or other input 10,11,12 ground connection of door U17_8; the signal of input 9 amplifies output through four inputs or door U17_B, and the output 13 of shaping circuit U17_B links to each other with the write-protect input pin U6.14_WP of FLASH.The signal of FLASH write-protect input pin U6.14_WP input is that zero level is effective, and promptly U6.14_WP input zero level is just carried out write-protect to FLASH.

For adapting to different CA (Conditional Access management software); the high address line MIU_ADDR20 of FLASH also is connected with wire jumper K1; and wire jumper K1 with or the end that links to each other of door also be connected with a pull-up resistor R45; if the set-top box of this circuit has been installed will be with the CA of other company the time; only wire jumper K1 need be pulled out and get final product; then the input of this address wire perseverance is " 1 "; controlled by the write-protect input signal of write-protect incoming line P1026_FLH_WP input with the signal of logic output terminal 9 outputs this moment, recovers normal read-write protection function.

The write-protect circuit of the different spaces that the utility model can also be made (as: 0～128K, 0～512K etc.); only need the space of protection according to actual needs selectively to pull, the OR circuit that the address wire of corresponding FLASH is connected to digital video receiver top box memory write protective device of the present utility model gets final product.

Claims

1; a kind of digital video receiver top box memory circuitry with write-protect function; comprise memory with write-protect control pin; it is characterized in that; also comprise the write-protect logical circuit; described write-protect logical circuit has address input end; write-protect input and be in the write-protect output that the signal of particular state or write-protect input is exported effective write protect signal when effective in the input address; described address input end links to each other with the particular address lines pin of described memory, and the write-protect control pin of described write-protect output and described memory links to each other.

2, the digital video receiver top box memory circuitry with write-protect function according to claim 1; it is characterized in that; described write-protect logical circuit comprise one or and one two the input with the door; the particular address lines of described memory with or the door input link to each other; output, write-protect input and described two inputs described or door link to each other with the input of door, and described two inputs link to each other with the output of door and the write-protect control pin of described memory.

3, the digital video receiver top box memory circuitry with write-protect function according to claim 2; it is characterized in that; address wire of described memory and or the door input between be connected with the break-make device, described break-make device and or an end that links to each other be connected with a pull-up resistor.

4, the digital video receiver top box memory circuitry with write-protect function according to claim 3 is characterized in that described break-make device is a wire jumper.

5, the digital video receiver top box memory circuitry with write-protect function according to claim 3 is characterized in that described break-make device is a toggle switch.

6, according to any one described digital video receiver top box memory circuitry among the claim 1-5 with write-protect function; it is characterized in that the output of described write-protect logical circuit links to each other by the write-protect input pin of shaping output circuit and described memory.

7, according to any one described digital video receiver top box memory circuitry among the claim 1-5, it is characterized in that described memory is FLASH or EEPROM with write-protect function.

8, the digital video receiver top box memory circuitry with write-protect function according to claim 7 is characterized in that, the protected address space of described memory is 0～128K or 0～256K or 0～512K or 0～1024K.