CN2777860Y - Integrated module for passive balancer - Google Patents

Integrated module for passive balancer Download PDF

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Publication number
CN2777860Y
CN2777860Y CN 200520053451 CN200520053451U CN2777860Y CN 2777860 Y CN2777860 Y CN 2777860Y CN 200520053451 CN200520053451 CN 200520053451 CN 200520053451 U CN200520053451 U CN 200520053451U CN 2777860 Y CN2777860 Y CN 2777860Y
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China
Prior art keywords
circuit
passive equalizer
passive
equalizer
integration module
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Expired - Fee Related
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CN 200520053451
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Chinese (zh)
Inventor
汪伦
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN 200520053451 priority Critical patent/CN2777860Y/en
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Publication of CN2777860Y publication Critical patent/CN2777860Y/en
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Abstract

The utility model relates to an integrated module for a passive balancer. The utility model is proposed to solve the problems of larger PCB area occupation, low skim sheet production efficiency, etc. of the conventional passive balancer. The inner part of the integrated module for the passive balancer of the utility model comprises at least one circuit of the passive balancer, and the inner part of each balancer comprises a corresponding resistance element, a capacitance element and (or) an inductive element. The resistance element, the capacitance element and (or) the inductive element of each passive balancer are integrated into the same package. The circuit of each passive balancer is required to be mutually connected with two or a plurality of element ends which are connected by the same external signal line, and is connected to the same one or a plurality of pins which are packed, wherein the package can be in a BGA form or an SOP form. A metallic shield can be arranged between two adjacent circuits of the passive balancer so that interchanging interference is prevented. The discrete resistance and the capacitance elements in the conventional passive balancer are integrated to be packed in a device with small volume, the PCB occupation area can reduced and the sheet cementing times can be reduced.

Description

The passive equalizer integration module
Technical field
The utility model relates to the equalizer that uses in the signal transmission, more particularly, relates to a kind of passive equalizer integration module.
Background technology
In the high speed transmission of signals process, because the attenuation characteristic of signal link, the attenuation ratio low frequency signals decay of high-frequency signal is big, causes intersymbol interference (ISI), cause signal jitter to strengthen, and effective breadth reduces.Passive equalizer reasonable in design is the decay of balanced circuit well, thereby reduces the influence of ISI (InterSymbolInterference, intersymbol interference), reduces signal jitter, improves the quality of reception.
Passive equalizer in the past all is to use discrete element to build, the simplest single channel difference RC (resistance and electric capacity) type equalizer principle as shown in Figure 1, in each RC circuit, resistance R 1 is in parallel with capacitor C 1.Its corresponding PCB encapsulating structure as shown in Figure 2.Wherein, resistance R, capacitor C are the individual resistors of 0603 encapsulation, the PCB encapsulation of electric capacity.
Because use therein is that discrete resistance, capacity cell realized equalizer, element can take bigger PCB area, is unfavorable for improving board integration; When adopting SMT (surface installation technique) to produce, each element needs independent paster, causes production and processing loaded down with trivial details and unreliable.
The utility model content
At the above-mentioned defective of prior art, the utility model will solve in the traditional passive equalizer owing to the meeting of using discrete component to bring takies problems such as bigger PCB area, paster production efficiency are lower.
For solving the problems of the technologies described above, the utility model provides a kind of passive equalizer integration module, comprising at least one passive equalizer circuit, comprise at least one RC circuit in each equalizer, the resistance R 1 in each described RC circuit is in parallel with capacitor C 1; Wherein, described each passive equalizer circuit is integrated in the same encapsulation.
In the utility model, at the input or the output of each RC circuit, a capacitance C2 also can connect; For the RC circuit that is in series with capacitance C2 at each, also can connect a pull-up resistor R3 who connects positive supply, and connect the pull down resistor R4 of a ground connection at its output or input at its input or output.In addition, the inductance L 1 that also can connect a ground connection at the input or the output of each RC circuit.When comprising at least one pair of RC circuit in each equalizer, can between each is to the input of described RC circuit or output, connect an inductance L 2.
In the utility model, in described encapsulation, be provided with a plurality of pins; Need in each passive equalizer circuit with two or more member ends that same external signal line is connected between interconnect, and be connected to same or a plurality of pins of described encapsulation, for the saving number of welds, preferably be connected to same pin.
In the utility model, described encapsulation can be BGA (Ball Grid Array, ball grid array) form or SOP (Small Outline Package, little outline packages) form.If two or more passive equalizer circuit are arranged in the same encapsulation, be preferably between adjacent two passive equalizer circuit antinoise signal crosstalk shields layer is set.
The utility model has solved traditional discrete component passive equalizer and has taken the big problem of PCB area, can reduce the PCB area occupied greatly, improves board integration, and reduces the single board design difficulty.Simultaneously,, only need paster once during assembling, and need not resembling in the tradition to carry out repeatedly paster at each resistance, electric capacity respectively, thereby can significantly reduce the paster number of times, enhance productivity for an encapsulation.
Description of drawings
The utility model is described in further detail below in conjunction with drawings and Examples, in the accompanying drawing:
Fig. 1 is the schematic diagram of difference RC equalizer;
Fig. 2 is the PCB schematic diagram that adopts passive equalizer shown in Fig. 1 that discrete resistors, electric capacity realizes;
Fig. 3 and Fig. 4 are the PCB encapsulation schematic diagrames of the BGA form and the SOP form of the passive equalizer integration module corresponding with Fig. 2;
Fig. 5 has increased the schematic diagram behind the capacitance in Fig. 1;
Fig. 6 is the PCB schematic diagram that adopts passive equalizer shown in Fig. 5 that discrete resistors, electric capacity realizes;
Fig. 7 is the PCB schematic diagram that adopts four tunnel passive equalizer of discrete resistors, electric capacity realization;
Fig. 8 and Fig. 9 are the PCB encapsulation schematic diagrames of the BGA form and the SOP form of the passive equalizer integration module corresponding with Fig. 7;
Schematic diagram on Figure 10 increases in Fig. 5 behind the pull down resistor;
Figure 11 and Figure 12 are the circuit diagrams of two kinds of RCL equalizers.
Embodiment
Core of the present utility model is, Resistor-Capacitor Unit discrete in the traditional passive equalizer carried out integrated, is encapsulated in the device of a small size.Owing to the power requirement of the resistance that uses in the equalizer, electric capacity is lower, so can be with the volume-diminished of single Resistor-Capacitor Unit; To the RC element, connection between the two can solve in that encapsulation is inner, thereby only need draw a solder joint in the equalizer each; Reduce to four for an equalizer solder joint by eight, as seen, number of welds has reduced half.
In the inside of integrated equalizer, can adopt high density connected modes such as direct contact connection, welding, conducting resinl be bonding to interconnect, to realize circuit connecting relation shown in Figure 1.
The packaging appearance structure of passive equalizer integration module can adopt BGA, SOP or the like various ways.The structure of the passive equalizer integration module of the BGA corresponding encapsulation with Fig. 2 as shown in Figure 3, this is encapsulated as rectangular configuration, is provided with four spherical pins in its bottom, correspondingly, four circular solder joints can be set on PCB.The structure of the passive equalizer integration module of the SOP corresponding encapsulation with Fig. 2 as shown in Figure 4, the profile of this encapsulation and common IC are similar, its four pins stretch out from both sides, correspondingly, can setting on PCB side by side four solder joints in twos.
As shown in Figure 5, in traditional passive equalizer shown in Figure 1, also can increase by two capacitance C2, its PCB schematic diagram as shown in Figure 6.The PCB of Dui Ying BGA form encapsulation is identical with structure shown in Figure 3 with it, and the PCB encapsulation of SOP form is then identical with structure shown in Figure 4.As seen, though set up capacitance C2, its PCB encapsulation does not change.
The utility model is when more multichannel high-density applications, and effect is more obvious, as shown in Figure 7, if No. four equalizers all use discrete component to realize, will use 16 Resistor-Capacitor Units, thereby need paster 16 times.The PCB of Dui Ying BGA form encapsulates as shown in Figure 8 with it, and the PCB of SOP form encapsulates then as shown in Figure 9, as seen, if use the passive equalizer integration module, only needs paster once, has significantly reduced the paster number of times, has improved production efficiency; And its area occupied reduces greatly, 1/4 of not enough original area, thus can further improve board integration.
In the foregoing description, need in the same passive equalizer circuit with each member end that same external signal line is connected between be connected to the same pin that encapsulates after interconnecting, when specifically implementing, also can be connected to the pin of two or more parallel connections.In addition, passive equalizer circuit wherein can also be a RLC passive equalizer circuit, and as shown in figure 11, it has connected the inductance L 1 of a ground connection at the input of single RC circuit; Also can be as shown in figure 12, it connects an inductance L 2 between the input of two RC circuit shown in Figure 1.
Because with a plurality of resistance, element such as electric capacity and/or inductance has been integrated in the same encapsulation, in order to prevent phase mutual interference between the different passages, inside in encapsulation, can use metallic shield (for example each passive equalizer circuit to be wrapped up with conductor, perhaps will keep apart with conductor between two passive equalizer circuit, make that electromagnetic field can the phase mutual interference), can also by rational arrangement of elements (for example will be not on the same group passive equalizer circuit by last, down and before, the back dislocation is arranged, make the electromagnetic coupled distance between two groups of passive equalizer circuit draw back, strengthen) wait one or more means, reduce the signal cross-talk between the different passages.
In the utility model, can integrated a plurality of equalizers in the encapsulation.Simultaneously, also can discrete element be also integrated comes in capacitance, pull-up resistor, pull down resistor etc., further reduce the PCB area occupied.Circuit on the basis of Fig. 5 after increase pull-up resistor R2 and the pull down resistor R3 as shown in figure 10, at this moment, on module, to increase power supply (Vtt) pin and a ground (GND) pin, shared described power supply (Vtt) pin of the meeting of each passive equalizer circuit and ground (GND) pin.Certainly, also can on module, set up a plurality of power supplys (Vtt) pin and a plurality of ground (GND), at this moment, can allow shared one of them power pin of certain several passive equalizer circuit, then shared another power pin of several passive equalizer circuit in addition, the rest may be inferred.

Claims (8)

1, a kind of passive equalizer integration module comprising at least one passive equalizer circuit, comprises at least one RC circuit in each equalizer, the resistance R 1 in each described RC circuit is in parallel with capacitor C 1; It is characterized in that,
Described each passive equalizer circuit is integrated in the same encapsulation.
2, passive equalizer integration module according to claim 1 is characterized in that, is provided with a plurality of pins in described encapsulation; Need in each passive equalizer circuit with two or more member ends that same external signal line is connected between interconnect, and be connected to same or a plurality of pins of described encapsulation.
3, passive equalizer integration module according to claim 2 is characterized in that, at the input or the output of each RC circuit, also is in series with a capacitance C2.
4, passive equalizer integration module according to claim 3 is characterized in that, at the input or the output of each RC circuit, also is connected with a pull-up resistor R3 who connects positive supply; Each RC circuit or output or input, also be connected with the pull down resistor R4 of a ground connection.
5, passive equalizer integration module according to claim 2 is characterized in that, at the input or the input of each RC circuit, also is connected with the inductance L 1 of a ground connection.
6, passive equalizer integration module according to claim 2 is characterized in that, comprises at least one pair of RC circuit in each equalizer, between each input or output to described RC circuit, also is connected with an inductance L 2.
7, according to each described passive equalizer integration module among the claim 1-6, it is characterized in that described ball grid array format or the little outline packages form of being encapsulated as.
8, passive equalizer integration module according to claim 7 is characterized in that, comprising two or more passive equalizer circuit, between adjacent two passive equalizer circuit, is provided with antinoise signal crosstalk shields layer.
CN 200520053451 2005-01-04 2005-01-04 Integrated module for passive balancer Expired - Fee Related CN2777860Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200520053451 CN2777860Y (en) 2005-01-04 2005-01-04 Integrated module for passive balancer

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Application Number Priority Date Filing Date Title
CN 200520053451 CN2777860Y (en) 2005-01-04 2005-01-04 Integrated module for passive balancer

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CN2777860Y true CN2777860Y (en) 2006-05-03

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101577686A (en) * 2008-05-09 2009-11-11 鸿富锦精密工业(深圳)有限公司 Equalizer and connector provided with same
CN102983827A (en) * 2012-09-17 2013-03-20 贸联电子(昆山)有限公司 Low-cost balancing signal passive element
CN104320603A (en) * 2014-10-30 2015-01-28 成都康特电子高新科技有限责任公司 Equalizer with high-frequency signal compensation function based on radio and television network system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101577686A (en) * 2008-05-09 2009-11-11 鸿富锦精密工业(深圳)有限公司 Equalizer and connector provided with same
CN101577686B (en) * 2008-05-09 2013-05-08 鸿富锦精密工业(深圳)有限公司 Equalizer and connector provided with same
CN102983827A (en) * 2012-09-17 2013-03-20 贸联电子(昆山)有限公司 Low-cost balancing signal passive element
CN104320603A (en) * 2014-10-30 2015-01-28 成都康特电子高新科技有限责任公司 Equalizer with high-frequency signal compensation function based on radio and television network system

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20060503

Termination date: 20100204