CN2704982Y - TV circuit with one input port for simulating several I/O inputs - Google Patents
TV circuit with one input port for simulating several I/O inputs Download PDFInfo
- Publication number
- CN2704982Y CN2704982Y CNU2004200519138U CN200420051913U CN2704982Y CN 2704982 Y CN2704982 Y CN 2704982Y CN U2004200519138 U CNU2004200519138 U CN U2004200519138U CN 200420051913 U CN200420051913 U CN 200420051913U CN 2704982 Y CN2704982 Y CN 2704982Y
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- adc
- input port
- circuit
- inputs
- voltage terminal
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Abstract
Disclosed is a TV circuit with one input port for simulating several I/O inputs. The TV circuit with one input port for simulating several I/O inputs is merged with 6 resistors at the ADC_VREF main voltage terminal, the 6 resistors are respectively connected in series with a key, and then the resistors and the keys are connected together in parallel to become the input port of the ADC to input to the CPU. A divider resistance and a capacitor are also connected in parallel between the input port of the ADC and the earth, and another capacitor is connected in series between the main voltage terminal of the ADC_VREF and the earth. The 6 resistors which are merged on the main voltage terminal of the ADC_VREF and the divider resistance are evenly precision resistors. The TV circuit with one input port for simulating several I/O inputs simulates a plurality of IO opening key entry via the low speed ADC input port, and has simple circuit. With the situation of not changing the appearance and the structure of the casing, the IO opening is made use of to implement low cost and high economic performance. The utility model can be widely applied to TV set, in particular to the CRT class TV set.
Description
Technical field
The utility model belongs to the TV set circuit technical field, more particularly relates to the improvement that one road ADC input port is simulated the TV set circuit of a plurality of IO mouth button inputs.
Background technology
What existing general television set adopted generally has two kinds by key control---and the on off state of button is realized by the high-low level of IO mouth, perhaps converts the form of ADC voltage to, is input to CPU, judges the kind and the state of this button again.But under a lot of situations, CPU provides one road ADC input, and can be not more than needed for the IO mouth resource of the CPU that adopts.Particularly all the more so on general CRT class television set.Because the restriction of television set profile mould and structure in most of the cases, has to adopt the button of a plurality of IO mouth controls.So just be faced with the difficult problem of an IO mouth inadequate resource.
Summary of the invention
The purpose of this utility model just is to overcome above-mentioned shortcoming and defect, and a kind of circuit is provided, and simulates the button input of a plurality of IO mouth controls by one road ADC input.Solved the IO scarcity of resources, more IO mouths problem that input is used to button can't be provided.
In order to achieve the above object, the utility model is by the ADC_VREF power voltage terminal and connect 6 resistance, 6 resistance button of connecting respectively again, and being connected in parallel then becomes the ADC input port and inputs to CPU.A divider resistance also in parallel and electric capacity between ADC input port and the ground, another electric capacity of also connecting between ADC_VREF power voltage terminal and the ground.
ADC_VREF power voltage terminal and 6 resistance that connects and divider resistance are precision resister.
This road low speed ADC input port that the utility model utilizes CPU to provide, the circuit that produces the ADC input voltage is expanded and transformed, simulate the behavior of a plurality of IO mouths when controlling and accepting key-press status, make that accepting push button signalling with the form of IO mouth becomes a reality.
Task of the present utility model comes to this and finishes.
The utility model is simulated a plurality of IO mouth button inputs by low speed ADC input port, and circuit design is simple.Make full use of existing resource, do not changing under the situation of outward appearance such as casing and structure, utilizing existing IO mouth control button to realize the low-cost high-efficiency benefit.It can be widely used in television set especially in the CRT class television set.
Description of drawings
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
Embodiment 1.A kind of one road ADC input port is simulated the TV set circuit of a plurality of IO mouth button inputs, as shown in Figure 1.It is by ADC VREF power voltage terminal and meet 6 resistance R Z11, RZ12, RZ13, RZ14, RZ15 and RZ16.6 resistance R Z11, RZ12, RZ13, RZ14, RZ15 and RZ16 connect respectively button KZ01, KZ02, KZ03, KZ04, KZ05 and a KZ06, being connected in parallel then becomes the ADC input port and inputs to CPU again.A divider resistance RZ17 also in parallel and capacitor C 1 between ADC input port and the ground, another capacitor C 2 of also connecting between ADC VREF power voltage terminal and the ground.Wherein ADC VREF power voltage terminal and 6 resistance that connects and divider resistance RZ11~RZ17 are precision resister, make circuit more accurate reliable.
Can very distinct seeing from Fig. 1, simulate IO1, IO2, IO3, IO4, IO5 and IO6 totally 6 IO mouths in the ADC Simulation with I O mouth circuit square frame (1) of on the left side, come the formed MENU of corresponding button IO mouth circuit key switch state, TV/AV, VOL-, VOL+, CH-, CH+.Inverse signal is just as the ground end in the button IO mouth circuit in the return loop.Square frame (2) is the IO mouth of 6 button KZ01, KZ02, KZ03, KZ04, KZ05 and KZ06.
Claims (2)
1. an ADC input port is simulated the TV set circuit of a plurality of IO mouth button inputs, it is characterized in that it is by the ADC_VREF power voltage terminal and connect 6 resistance, 6 resistance button of connecting respectively again, being connected in parallel then becomes the ADC input port and inputs to CPU, a divider resistance also in parallel and electric capacity between ADC input port and the ground, another electric capacity of also connecting between ADC_VREF power voltage terminal and the ground.
2. simulate the TV set circuit of a plurality of IO mouth buttons input according to described one road ADC input port of claim 1, it is characterized in that said ADC_VREF power voltage terminal and 6 resistance that connects and divider resistance are precision resister.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2004200519138U CN2704982Y (en) | 2004-06-26 | 2004-06-26 | TV circuit with one input port for simulating several I/O inputs |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2004200519138U CN2704982Y (en) | 2004-06-26 | 2004-06-26 | TV circuit with one input port for simulating several I/O inputs |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2704982Y true CN2704982Y (en) | 2005-06-15 |
Family
ID=34777214
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNU2004200519138U Expired - Fee Related CN2704982Y (en) | 2004-06-26 | 2004-06-26 | TV circuit with one input port for simulating several I/O inputs |
Country Status (1)
Country | Link |
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CN (1) | CN2704982Y (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103686010A (en) * | 2013-11-22 | 2014-03-26 | 乐视致新电子科技(天津)有限公司 | ADC port simulation multi-IO-port key input device, television-system and method |
-
2004
- 2004-06-26 CN CNU2004200519138U patent/CN2704982Y/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103686010A (en) * | 2013-11-22 | 2014-03-26 | 乐视致新电子科技(天津)有限公司 | ADC port simulation multi-IO-port key input device, television-system and method |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |