CN2638356Y - Image level geometric distortion correcting circuit used for CRT colour television - Google Patents

Abstract

The utility model discloses an image geometry amending algorithm method and a circuit used in the color television CRT, comprising a satiable reactor Ls which is connected with a traveling deflection yoke DY loop in series. The neighborhood of the satiable reactor Ls is provided with a direct current coil Lp which is connected with a driving circuit 1. The driving circuit 1 provides different direct currents to change the equivalent saturated reactance value of the satiable reactor Ls for the direct current coil Lp. The image geometry amending algorithm method used in the color television CRT includes the following procedures: The satiable reactor Ls is connected with the traveling deflection yoke DY loop in series; the neighborhood of the satiable reactor Ls is provided with a direct current coil L p; the direct current coil L p is connected with a driving circuit 1 to get different direct currents according to the requirements of the different scanning models.

Description

The image level geometry distrotion correction circuit that is used for the CRT colour TV

Technical field

The utility model relates to a kind of image level geometry distrotion correction circuit of the CRT of being used for colour TV, specifically, relates to a kind of image level geometry distrotion correction circuit that is used for many display modes CRT colour TV.

Background technology

The image restoring of CRT type color television set demonstration at present all based on the cathode-ray vacuum tube (CRT pipe) of magnetic deflection structure, makes it to produce a plane grating track by the field drives electron beam that is enclosed within the magnetic deflection coil generation on the neck and forms on phosphor screen.The magnetic deflection field of its horizontal direction produces sawtooth current by line output circuit shown in Figure 1 and forms in line deflector coil DY.Because line deflector coil DY is the imperfection inductance, actual product has the resistance of coil copper to exist, and therefore just influences its deflection sawtooth current that flows through and changes when initial soon, changes slow during end, cause the image left side to be elongated, the phenomenon that is referred to as image level geometric distortion of image the right compression.

Traditional geometry distrotion correction circuit arrangement is as shown in Figure 1: structure saturable reactor Ls as shown in Figure 2 of series connection in line deflector coil DY loop.Its principle is: because permanent magnet is introduced a static magnetic field, make the inductance value of saturable reactor Ls originally only become a variate-value that changes with its size of current of passing through by the steady state value that its structure determined by one, its amp-induction reactance characteristic as shown in Figure 3.Its induction reactance changed with the size of current that flows through it after saturable reactor Ls connected with line deflector coil DY, and present Low ESR in the active line end point, starting point presents high impedance on the active line left side, thereby change soon in order to proofread and correct, change the horizontal nonlinearity distortion that causes slowly during end because of there is the horizontal deflection electric current starting point that causes in the resistance of line deflector coil DY copper.

But geometry distrotion correction circuit shown in Figure 1 only is aimed at the video image of the present color television set of the PAL of TSC-system that the reduction standard is 60 hertz of fields of 525 row or 50 hertz of fields of 625 row and Sequential Color and Memory system.Along with the birth of Digital Television in recent years, doubly row color TV and 120 hertz of 525 row or 100 hertz times healthy TVs that do not glimmer of 625 row as 60 hertz of fields of 1050 row or 50 hertz of fields of 1250 row have appearred again.And, require color TV function compatibility to restore the high sharpness colour TV graphics standard again along with the appearance of high-definition television standard.These cause at present having the function that multi-modality image shows for the designing requirement of color television set, can reduce demonstration: 1. common simulation television image; 2. the doubly row of crossing through digitized processing or doubly a television image; 3. high-definition television image.

Above-mentioned three kinds of video images may be corresponding multiple scan pattern, therefore require modern color television set scanning circuit not only to want to be operated under the multiple scan pattern, but also require under various scan patterns, still to want to guarantee the distortion that the image that restored can not produce geometric aspects.Obviously, for the multiple mode scanning horizontal-deflection circuit, the requirement of the saturation reactance value of different scan patterns or different line deflector coil DY correspondence is different.For example: DY=0.23 milihenry, horizontal deflection current peak peak value be-and 5A is during to+5A, and the pairing saturation reactance value of line deflector coil DY that is operated under the different scanning frequency is approximately listed as following table.

Line-scanning frequency	Saturation reactance value (0A value)
		28.125KHz	12μH
31.5KHz	11.5μH
		35KHz	7μH
38KHz	5.5μH
		47KHz	2.7μH

Existing solution is: with two or more line linearity inductance serial or parallel connections, adopt electronic switch or relay to switch at different scanning frequencys, as shown in Figure 4.Obviously the scan pattern of its compensation also is limited, and circuit elements device consumption is many, the circuit complexity.

Summary of the invention

The purpose of this utility model is to solve the CRT color television set with multiple mode scanning function and proofreaies and correct problem for the horizontal geometric scanner distortion under the various different scanning patterns.

For achieving the above object, the utility model proposes a kind of image level geometry distrotion correction circuit of the CRT of being used for colour TV, comprise saturable reactor Ls, described saturable reactor Ls connects with line deflector coil DY loop, it is characterized in that: establish an AC line circle Lp near the described saturable reactor Ls, described dc coil Lp links to each other with one drive circuit 1, and described drive circuit 1 is used to change the equivalent saturation reactance value of saturable reactor Ls for dc coil Lp provides different direct currents.

The beneficial effects of the utility model are: select the amp-induction reactance characteristic curve of different corrections for various image model, with the state of image rectification to horizontal geometric distortion minimum.Because different image models or the different amp-induction reactance characteristic curves of the pairing correction of line deflector coil DY are different, the utility model flows through the DC current values of dc coil Lp by change, produce different magnetic field, with act on saturable reactor Ls after the alnico magnets B stack, can change the equivalent saturation reactance value of saturable reactor Ls, when injection direction and the direct current that varies in size, its amp-induction reactance characteristic curve moves up and down with the y axle, can produce continuous saturation reactance value, along with the variation of horizontal deflection electric current can generate different amp-induction reactance characteristic curves, be used to compensate the inherent copper resistance of line deflector coil DY, thereby proofread and correct horizontal geometric distortion under different image models because of causing in the copper resistance in the line deflector coil DY existence.Because electric current is electrodeless adjustable, so can produce the saturation reactance value of mating most according to different image models, with respect to existing solution, the utility model circuit is simple, is suitable for the image model wide ranges.

Feature of the present utility model and advantage will be elaborated in conjunction with the accompanying drawings by embodiment.

Description of drawings

Fig. 1 represents to have in the prior art line-scan circuit figure of horizontal geometric distortion correction.

Fig. 2 represents the structure chart of saturated reactor Ls in the prior art.

Fig. 3 represents the amp-induction reactance characteristic curve of saturable reactor Ls.

Fig. 4 represents a kind of horizontal geometric distortion correction circuit in the prior art.

Fig. 5 represents the line linearity induction structure figure that is added with dc coil of the present utility model.

Fig. 6 represents the amp-induction reactance characteristic curve of saturable reactor Ls under the different DC of the present utility model.

Fig. 7 represents the structural representation of dc coil of the present utility model.

Fig. 8 represents the circuit diagram of dc coil of the present utility model.

Fig. 9 represents the block diagram of drive circuit of the present utility model.

Figure 10 represents the circuit diagram of first embodiment of drive circuit of the present utility model.

Embodiment

As shown in Figure 5, on the cap ned of saturable reactor Ls, place alnico magnets 5, below saturable reactor Ls, place an I-shaped dc coil Lp.Saturable reactor Ls connects with line deflector coil DY loop, and dc coil Lp links to each other with drive circuit 1.The structural representation of dc coil Lp as shown in Figure 7, its circuit diagram is as shown in Figure 8.

Digital technology is adopted in the direct current control of dc coil Lp, the block diagram of its drive circuit 1 as shown in Figure 9, produce controlled pulse-width modulation output (PWM) signal of a way sign indicating number by the microcontroller MCU chip in the machine, this signal becomes dc controling level after low pass filter 2 filtering, the voltage output of control voltage amplifier 3, this voltage output converts direct current to through driving stage 4 and supplies with dc coil Lp.The size of its direct current depends on the duty ratio of pwm signal, as long as control the duty ratio of the pwm signal of output with microcontroller MCU, electric current with regard to may command dc coil Lp also can be adjustable continuously, reaching change saturable reactor Ls is the purpose of the inductance value of zero ampere-hour at electric current, as shown in Figure 6.

Figure 10 is the first embodiment circuit diagram of drive circuit 1, wherein the single order passive low ventilating filter 2 of first resistance R 1, first capacitor C, 1 composition will be filtered into dc control signal from the pwm signal of microcontroller MCU, the collector voltage that the first triode Q1 and second resistance R 2 and the 3rd resistance R 3 constitute voltage amplifier 3, the first triode Q1 changes with dc control signal.The second triode Q2 and the 3rd triode Q3 form the push-pull type emitter follower, have the electric current enlarging function, in order to promote dc coil Lp.The 4th resistance R 4 forms current-limiting resistance with the internal resistance of dc coil Lp, makes the electric current maximum that flows through dc coil Lp be no more than 200 milliamperes, prevents that coil from generating heat because of electric current is excessive.

Figure 11 is second kind of execution mode of the low pass filter 2 in the drive circuit 1, and low pass filter 2 is an active low-pass filter circuit.

Figure 12 is second kind of execution mode of the voltage amplifier 3 in the drive circuit 1, and voltage amplifier 3 is for including the voltage amplifier circuit of univoltage operational amplifier.

Figure 13 is the third execution mode of the voltage amplifier 3 in the drive circuit 1, and voltage amplifier 3 is for including the voltage amplifier circuit of two voltage operational amplifiers.

The utility model is in Skyworth 32 " has carried out replication experiment on 16: 9 CRT high sharpness colour TV machines.Its CRT picture tube line deflector coil inductance value is 0.2 milihenry, and the horizontal deflection electric current is the 12Ap-p value, adopts line output circuit shown in Figure 1.Former machine has only adopted the line linearity inductance of a compensation 38KHz image model, and image has the distortion of contracting of the Zola right side when seeing 1080 i 50Hz high definition pictures; When seeing 720P high definition picture, there is the right side of contracting, a left side to draw distortion, only horizontal geometric distortion minimum when the 38KHz image model.After adopting the utility model, the amp-induction reactance value of actual measurement is as shown in the table.

	-5A	-3A	-1A	0A	1A	3A	5A
								Ls inductance value (μ H) (ILp=0A direct current)	45.07	24.73	11.22	9.07	7.86	6.66	6.09
Ls inductance value (μ H) (ILp=200mA direct current)	13.91	8.42	6.81	6.42	6.13	5.75	5.52

Because electric current is adjustable continuously, so can obtain the continuous amp-induction reactance characteristic curve that moves up and down along the y axle, having reached can both be with the purpose of horizontal geometric distortion correction to minimum to every kind of pattern.

In the practical application, when colour TV completes, export one road pwm signal by the technical staff with the total line traffic control microcontroller of I 2C MCU, the duty ratio of different television image patterns being controlled pwm signal respectively makes image in horizontal geometric distortion minimum, and deposits the data of correspondence in E ²Go among the PROM, the television image pattern that automatically according to microcontroller MCU identify when starting shooting next time accesses the PWM data is operated on the current value that sets dc coil Lp, has reached the accurately purpose of level of corrections geometric distortion of every kind of pattern.

Claims (6)

1. image level geometry distrotion correction circuit that is used for the CRT colour TV, comprise saturable reactor (Ls), described saturable reactor (Ls) is connected with line deflector coil (DY) loop, it is characterized in that: establish an AC line circle (Lp) in the magnetic field range of described saturable reactor (Ls), described dc coil (Lp) links to each other with one drive circuit (1), and described drive circuit (1) provides adjustable direct current to be used to change the equivalent saturation reactance value of saturable reactor (Ls) for dc coil (Lp).

2. the image level geometry distrotion correction circuit that is used for the CRT colour TV as claimed in claim 1, it is characterized in that: described drive circuit (1) comprises microcontroller (MCU), low pass filter (2), voltage amplifier (3) and driving stage (4), described microcontroller (MCU) is supplied with dc coil (Lp) according to different image model output relevant pulse width modulation signals after low pass filter (2), voltage amplifier (3) and driving stage (4) conversion.

3. the image level geometry distrotion correction circuit that is used for the CRT colour TV as claimed in claim 2 is characterized in that: described low pass filter (2) is for including the single order passive low-pass filter circuit or the active low-pass filter circuit of first resistance (R1) and first electric capacity (C1).

4. the image level geometry distrotion correction circuit that is used for the CRT colour TV as claimed in claim 2 is characterized in that: described voltage amplifier (3) is for including the voltage amplifier circuit of first triode (Q1).

5. the image level geometry distrotion correction circuit that is used for the CRT colour TV as claimed in claim 2 is characterized in that: described voltage amplifier (3) is the voltage amplifier circuit that includes the voltage amplifier circuit of univoltage operational amplifier or include two voltage operational amplifiers.

6. the image level geometry distrotion correction circuit that is used for the CRT colour TV as claimed in claim 1 is characterized in that: alnico magnets (5) are set above or below the described saturable reactor (Ls).

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