CN2626788Y

CN2626788Y - Circuit structure of multimedia vehicle mounted navigation system

Info

Publication number: CN2626788Y
Application number: CN 03257533
Authority: CN
Inventors: 陈小平; 周松林
Original assignee: Lingke Electronic Technology China Co ltd
Current assignee: Lingke Electronic Technology China Co ltd
Priority date: 2003-05-12
Filing date: 2003-05-12
Publication date: 2004-07-21
Anticipated expiration: 2013-05-12

Abstract

The utility model relates to a multi-media car circuit board structure of navigation system, which includes a central processor unit CPU, structure flash memory devices NANDFLASH and multimedia cards MMC. The central processing unit CPU can be connected with a plurality of structure flash memory devices NANDFLASH and a plurality of multimedia cards MMC directly. The data wire of structure flash memory device NANDFLASH is in direct connection with the data wire of the central processing unit CPU. The confirmation signal of the structure flash memory device NANDFLASH is connected with the input port of the central processing unit CPU. The data wire and command wire of the multimedia card MMC is connected with the I/O port of the central processing unit CPU directly. The utility model can drive a plurality of MMC cards and multi-groups of NANDFLASH data storage devices with unlimited capacity, improve the flexibility of the system and increase the expansibility, with the overall cost lower than the special chips.

Description

The circuit structure of multimedia vehicle mounted navigationsystem

Technical field

The utility model relates to a kind of circuit structure of onboard navigation system, particularly a kind of circuit structure that is exclusively used in multimedia vehicle mounted navigationsystem.

Background technology

Vehicle-mounted satellite navigation system is that locating data, time data that provides according to the gps satellite position fixing system and the electronic map data that is stored in internal system navigate to the vehicle in advancing; Also have simultaneously the multimedia amusement function of audiovisual, can realize the playing function of radio receiver, TV, CD, VCD, DVD, MP3 according to client's needs.

At present, some similar vehicle mounted guidance products are arranged on the market, the data-storing of each product and read mode and all be not quite similar.But all in all, mmc card that the interface of CPU and mmc card or NANAFLASH is supported by CPU itself or the interface of NANDFLASH are finished data exchange, perhaps by the control of finishing after the special interface chip conversion the NANDFLASH of the MMC of 1-2 sheet and a constant volume.Extensibility is relatively poor.

Content

The purpose of this utility model is single in order to overcome in the existing product control path, the deficiency that extendability is more weak, a kind of improved circuit structure that is exclusively used in multimedia vehicle mounted navigationsystem is provided, make it can drive a plurality of mmc cards and organize the not data storage apparatus of the NANDFLASH of limited capacity amount more, the alerting ability of raising system, strengthen extensibility, and integrated cost is lower than special chip.

The technical scheme that the utility model adopted is: the circuit structure of improved multimedia vehicle mounted navigationsystem, comprise central processor CPU, with structure flash memory device NANDFLASH and multimedia card MMC, wherein, central processor CPU can directly link to each other with several multimedia cards MMC with structure flash memory device NANDFLASH with several respectively; With data line and the central processor CPU data line direct connection of structure flash memory device NANDFLASH, link to each other with the input port of central processor CPU with the affirmation signal of structure flash memory device NANDFLASH; The I/O mouth direct connection of the data line of multimedia card MMC and order wire and central processor CPU.

The utility model is by method soft, combination of hardware, by the read-write of central processor CPU generation with structure flash memory device NANDFLASH, the address signal that central processor CPU produces is used as order input clock signal and the address input clock signal with structure flash memory device NANDFLASH; The read signal of central processor CPU is used as the chip selection signal with structure flash memory device NANDFLASH; The state of central processor CPU reads in signal as reading in structure flash memory device NANDFLASH whether can carry out operation signal; The data-signal of central processor CPU is connected with structure flash memory device NANDFLASH data-signal.Program can be controlled the read-write operation of NANDFLASH fully like this, and this operation only is subjected to the influence of chip drives ability.

For multimedia card MMC also is to use the address signal of central processor CPU as its clock signal, thereby the data line of mmc card directly linked to each other with the I/O mouth of CPU with order wire finish the Interface design of mmc card, central processor CPU by the I/O mouth to multimedia card MMC output data with read in data, MMC controls to multimedia card, finishes read-write operation to mmc card by program.

Adopt the beneficial effect that the utility model reached to be, can make multimedia card mmc card that system drives and with structure flash memory device NANDFLASH respectively more than the as many as 10 (sheet/group), the enhancing that the leeway of its expansion and alerting ability all obtain, and to reduce many than the application cost of traditional die.This design at present has been applied on the product of company, and the mode of operation of interface is highly stable reliably, and can support 1G with structure flash memory device NANDFLASH.

The utility model is described in further detail below in conjunction with drawings and Examples:

Description of drawings

Fig. 1 is a functional block diagram of the present utility model

Fig. 2 is an electrical schematic diagram of the present utility model

Connection signal instruction in the accompanying drawing

Cpu address signal: SA-A2～SA-A4 MMC clock signal: 0800-0010

CPU chip selection signal SA-CS1# 0800-0014

Cpu data signal: SA-D[0～15] COMMAND signal: PS-MODE-SYNC

NANDFLASH write signal: nNANDWE DATA:SA111_IRQ_CF_BVD1

Read signal: nNANDOE READY: the RADIO_R1 by CPU reads in

Chip selection signal: RED-LED2#

(annotate: network of the same name is electrically connected on the circuit)

The specific embodiment:

With reference to figure 1 and Fig. 2, central processor CPU adopts the SA-1110 chip, and central processor CPU can directly link to each other with several multimedia cards MMC with structure flash memory device NANDFLASH with several respectively; With data line and the central processor CPU data line direct connection of structure flash memory device NANDFLASH, link to each other with the input port of central processor CPU with the affirmation signal of structure flash memory device NANDFLASH.

CPU adopts address signal to finish differentiation with structure flash memory device NANDFLASH and multimedia card mmc card address through address decoder 74138.Mmc card is done the clock signal of mmc card with address 0800:0010 and 0800:0014, does data line with the SA111_IRQ_CF_BVD1 of CPU, does order wire with the PS_MODE_STNC of CPU and is connected with the signal of mmc card to finish CPU.

Be used as the order input clock signal of NANDFLASH through the 0800:0000 address signal of address decoder 74138 generations; The 0800:0004 address signal is used as the address input clock signal of NANDFLASH.0800:0008 address signal and NANDFLASH order input clock signal, the address input clock signal through not gate 74LCX04 and or door 74LCX32 after realize logic composite signal NANDDATA B.

The SA-WE signal of NANDDATA B and CPU produces the write signal NANDWE of NANDFLASH; The SA-OE signal of NANDDATA B and CPU produces the read signal NANDOE of NANDFLASH; The RED-LED2# signal of CPU is done the NANDFLASH chip selection signal, and whether the RADIO_RI signal of CPU reads in NANDFLASH can carry out operation signal.The SA-D[0 of CPU～15] be connected with the data-signal of NANDFLASH.

CPU can send read write command to NANDFLASH by software control like this, confirms by state READY signal whether NANDFLASH has all responded order each time simultaneously.So just, reach read-write control to NANDFLASH.

Equally, in control to mmc card.The direct clock signal of doing mmc card with address and the chip selection signal of CPU.To the mmc card output data with read in data and finish control to mmc card, we make read or write speed faster with the RAM chip selection signal of CPU now, also are easier to control with the I/O mouth.Certainly The whole control circuit and control program all should meet the read-write standard of NANDFLASH read-write standard and mmc card, thereby could guarantee the normal operation of circuit.

Claims

1. the circuit structure of a multimedia vehicle mounted navigationsystem, comprise central process unit (CPU), with structure flash memory device (NANDFLASH) and multimedia card (MMC), it is characterized in that central process unit (CPU) can directly link to each other with several multimedia cards (MMC) with structure flash memory device (NANDFLASH) with several respectively; With the data line and central process unit (CPU) the data line direct connection of structure flash memory device (NANDFLASH), link to each other with the input port of central process unit (CPU) with the affirmation signal of structure flash memory device (NANDFLASH); The I/O mouth direct connection of the data line of multimedia card (MMC) and order wire and central process unit (CPU).

2. according to the circuit structure of the described multimedia vehicle mounted navigationsystem of claim 1, it is characterized in that, central process unit (CPU) produces the read-write with structure flash memory device (NANDFLASH), and the address signal that central process unit (CPU) produces is used as order input clock signal and the address input clock signal with structure flash memory device (NANDFLASH); The read signal of central process unit (CPU) is used as the chip selection signal with structure flash memory device (NANDFLASH); The state of central process unit (CPU) reads in signal as reading in structure flash memory device (NANDFLASH) whether can carry out operation signal; The data-signal of central process unit (CPU) is connected with structure flash memory device (NANDFLASH) data-signal.

3. according to the circuit structure of the described multimedia vehicle mounted navigationsystem of claim 1, it is characterized in that, multimedia card (MMC) uses the address signal of central process unit (CPU) as its clock signal, to multimedia card (MMC) output data and read in data, (MMC) controls central process unit (CPU) to multimedia card by the I/O mouth.