CN2590130Y - Hard disk rotation motor control system - Google Patents

Abstract

The utility model relates to a hard disk rotation motor control system which comprises a BEMF commutating circuit, a starting circuit and a monitoring circuit, wherein the BEMF commutating circuit comprises a first programmable counter and a second programmable counter which can be used for regulating a variable system. The BEMF commutating circuit does not need an additional capacitor, is insensitive to leakage current but can provide stable speed regulation performance. The starting circuit also comprises a programmable counter which can be used for regulating the variable system. The starting circuit can stably produce start pulses without an additional capacitor. The monitoring circuit comprises a first counter and a second counter which are used for cutting off the BEMF circuit after commutation. The monitoring circuit further comprises a circuit which is used for detecting and correcting the rotation deviation of a rotation motor. The monitoring circuit can provide an interface for a microprocessor to change the operating parameter and the environmental factor of the motor and provide stable speed regulating performance.

Description

Hard disk rotation motor control system

[technical field]

The utility model is about a kind of motor control system, particularly about a kind of hard disk rotation motor control system.

[background technology]

A typical hard disk drive system comprises that many surfaces scribble the video disc of magnetic metal material, this system further comprises one group of sensing head by support construction supports between each video disc, this sensing head converts magnetic variable to electric variable in reading of data, when writing data electric variable is converted to magnetic variable.This supporting construction is connecting a motor that is wound with coil makes this sensing head can be positioned on the magnetic disk surface magnetic track.During normal operation, this positioning motor is controlled the location by the control signal that a master controller sends.

A typical hard disk drive system also comprises a rotation motor that is connected the disk axle center, so that in data read and write operation, keep the rotation of disk, be connected electronic controller and driving circuit between this rotation motor and this Host Controler Interface in addition, providing drive signal to be used for controlling rotating speed and other operational factors of this rotation motor, and also can also control the startup operation of this rotation motor to motor coil.

Fig. 1 is 10 the part control of a three-dimensional rotation motor and the synoptic diagram of driving circuit.Rotation motor 10 in this example contains 12 electrodes and 9 coil windings, and these coils are divided into 3 coil groups, sequencer 18 and motor amplifier 20 be in different phase drive coil group 12,14,16 optionally, thereby keep the rotation of motor 10 turning axles.

Referring to Fig. 2 A, it is track 1,2,3 synoptic diagram corresponding to the motor potential change of the motor torque of selection drive coil group generation in 12,14,16 o'clock.Track 1 be when transistor 20a and 20f open (transistor 20b-20e closes) motor torque corresponding to the curve map of motor potential change, track 2 is curve maps of motor torque when transistor 20a and 20d open, and track 3 is curve maps of motor torque when transistor 20a and 20e open.In the hard disk drive system in early days, it all is to be controlled by the hall effect sensor of implanting motor inside that brush type motor rotates commutating period.

Another can select the method that the best of rotation motor commutates opportunity just need increase the switch operation that a sequencer circuit is assisted rotation motor in system, and this method relates to a kind of back electromotive force (BEMF) phenomenon.BEMF signal such as signal among Fig. 2 B 4,5 and signal 6 that a kind of three-brush motor system produces, from figure, can clearly find out when motor torque is in maximum value, this BEMF signal will pass the no-voltage axis, and optimal motor commutates opportunity as shown in Fig. 2 C and Fig. 3 A.

The comparer cross connection is used for measuring each greater than zero BEMF signal on each section winding of the coil 12,14,16 of this motor, the output signal that these comparers produce is shown in Fig. 3 B-3D.Comparator signal as shown in Fig. 3 B-3D all can be deciphered the tach signal that becomes as shown in Fig. 3 E by logic.Wherein Zui Jia motor commutation appears at each high state of tach signal and the mid point of low state opportunity, i.e. X point as shown in Fig. 3 E and Y point.

Each high state of this tach signal and the mid point X of low state and Y determine according to the circuit among Fig. 4 A and the 4B.Capacitor 22 in this circuit and 28 voltage oscillograms that produce are respectively shown in Fig. 3 F and Fig. 3 G.As the voltage oscillogram among Fig. 3 F, capacitor 22 has a constant current supply 24 to its charging when tach signal is in high state, and capacitor 22 will be to 26 discharges of continuous current receiver when tach signal changes state.When this rotation motor speed when operation in the name of, this capacitor 22 will reach the Y point of its minimum value, the ideal commutation opportunity of Here it is this motor.Capacitor 22 can also be connected on the sequencer 18 so that make motor amplifier commutate in next stage then in conjunction with other sensor and trigger circuit.Capacitor 28 usefulness among Fig. 4 B decide another one reversal point X, when capacitor 22 discharges, will charge to capacitor 28 by a constant current supply, capacitor 28 will keep this voltage to become high state up to tach signal, after this, capacitor 28 will be to 29 discharges of continuous current receiver, when capacitor 28 reached its minimum voltage value, this motor amplifier 20 can trigger the state of the sequencer 18 of next stage.

More than Xu Shu BEMF technology is very successful to the switch operation of the rotation motor of the startup first time, but, when capacitor 22 and 28 is selected when incorrect, can cause its overlong time that discharges and recharges, thereby influence the motor commutation selection on opportunity, and constant current supply 24,27, the selection of electric current receiver 26,29 also must be appropriate, and also good coupling of these four elements, otherwise, the selection of this reversal point and may just have very big deviation.In addition, current source 24,27, electric current receiver 26,29 generally is to be operated in the very little voltage range, they all can have different leakage currents at printed circuit board (PCB), so also can have influence on discharging and recharging the time of capacitor 22 and 28, thereby influence the selection of rotation motor reversal point, even wrong commutation opportunity occurs.Extra capacitor 22 and 28 accounts for suitable big space possibly, may be installed in them in the turning axle start-up control integrated circuit (IC) chip hardly, and, when the time parameter of motor commutation or motor operation parameter need be revised, just must change capacitor 22 and 28, this circuit board of almost will reforming.Make very difficulty of its change operational factor like this, and be not suitable for being widely used under the situation of the different parameters of motor operation and varying environment factor.

A kind of known rotation motor system as shown in Figure 5, it comprises a capacitor 30, a pair of electric current receiver 34,36, one electronic switches 38, comparer 40,42 and radio road 44,46 one to one.In conjunction with referring to the oscillogram among Fig. 6 A-6C, speed has produced more BEMF signal slowly when motor has just begun to start rotation, this moment, switch placed 1 place, position, and capacitor 30 is then charged to it by current source 32, and the voltage waveform during capacitor 30 chargings arrives shown in the B section as the A section among Fig. 6 A.When the voltage by capacitor 30 reaches reference voltage VR1, comparer 40 will produce a control signal and give control logic circuit 48, thereby make switch 38 place 2 places, position, at this moment, electric current receiver 34 will impel capacitor 30 discharges till its magnitude of voltage reaches reference voltage VR2.When the magnitude of voltage of comparer 42 detected capacitors 30 was far smaller than reference voltage VR2, control logic circuit will make switch 38 home positions 1 place, and capacitor will charge as C section among the figure to the situation shown in the D section again like this.Comparer 42 also can produce a positive pulse signal when the magnitude of voltage of capacitor 30 surpasses reference voltage VR2, this pulse signal is sent to a radio road 44 and receives, thereby impel a radio road 44 to produce a commutation trigger pulse and give sequencer 18, sequencer 18 is used for controlling the phase place of this motor amplifier, and circulation repeats this process has enough rotational speeies to start this BEMF signal of generation up to this motor.

When point of arrival H, will produce a BEMF commutating pulse signal, this BEMF pulse signal will trigger a radio road 46, thereby makes control logic circuit 48 gauge tap 38 place 3 places, position.Along with increasing of the BEMF pulse signal that produces, capacitor 30 will be discharged repeatedly to it by electric current receiver 36 and be lower than reference voltage VR2 up to its voltage, like this, to keep low state from the output signal of comparer 40 and 42, and sequencer 18 can not triggered by a radio road 44 more yet, and this sequencer 18 will only can be triggered separately by the BEMF pulse signal by a radio road 46.

Fig. 6 B is by the commutating pulse synoptic diagram that starts oscillator one radio road, 44 generations, and Fig. 6 C is the commutating pulse synoptic diagram that is produced by BEMF one radio road 46.Wherein, the fast rotational of motor needs more BEMF pulse, be lower than reference voltage VR2 and produce the BEMF pulse fast with regard to the voltage that needs capacitor 30, but can make this startup oscillator lose efficacy so again, it is unfavorable for starting the work of oscillator, and capacitor 30 just must be changed when systematic parameter changes, and in addition, the additional capacitor in the rotation chip for driving will take the finite space of mini disc driver.In addition, leakage current in the capacitor 30 also can influence the frequency of this startup commutation, this just makes this rotation motor be difficult in to reach in the desired time nominal travelling speed, needs the rotation motor that starts fast for some, and capacitor 30 too much leakage currents can make it be difficult to reach.

Therefore, how to provide a kind of and need not that additional capacitor can realize commutating and the motor control system of stable speed governing is problem to be solved in the utility model.

[summary of the invention]

The purpose of this utility model is to provide a kind of and need not that additional capacitor can realize commutating and the hard disk rotation motor control system of stable speed-regulating function.

The purpose of this utility model is achieved through the following technical solutions: the utility model hard disk rotation motor control system mainly comprises a BEMF commutating circuit, a start-up circuit and a supervisory circuit.This BEMF commutating circuit comprises first and second programmable counters that can be used to regulate variable system, and this BEMF commutating circuit does not need extra capacitor, and it is insensitive to leakage current, but stable speed adjusting performance can be provided.This start-up circuit comprises that equally also one can be used to regulate the programmable counter of this variable system, and this start-up circuit does not need extra capacitor to get final product stable generation starting impulse yet.This supervisory circuit comprises that first and second counters are used for cutting off commutation BEMF circuit afterwards, this supervisory circuit comprises that further one is used for detecting and proofreading and correct the circuit of this rotation motor rotating deviation, operational factor and environment factor that this supervisory circuit can provide a Microprocessor Interface to allow to change motor, and stable speed adjusting performance is provided.

Owing to adopted technique scheme, the utility model hard disk rotation motor control system to have that the additional capacitor of need not can realize commutating and the effect of stable speed governing.

With reference to the accompanying drawings, in conjunction with the embodiments the utility model is further described.

[description of drawings]

Fig. 1 is the commutation sequence circuit diagram of a rotation motor in the prior art.

Fig. 2 A be in the above-mentioned technology one group of motor torque corresponding to the synoptic diagram of motor potential change.

Fig. 2 B is motor produced in each stage in the above-mentioned technology the BEMF signal waveform synoptic diagram corresponding to the motor potential change.

Fig. 2 C and 3A activate the time diagram of section corresponding to the motor potential change on desirable commutation opportunity and winding in the above-mentioned technology.

Fig. 3 B-3D is one group of waveform synoptic diagram by BEMF signal comparator output signal in the above-mentioned technology.

Fig. 3 E is the oscillogram of a tach signal in the above-mentioned technology.

Fig. 3 F and 3G are the voltage waveform views that passes through a group capacitor in the above-mentioned technology.

Fig. 5 is the module map of a rotation startup pierce circuit in the prior art.

Fig. 6 A-6C is one group of oscillogram of circuit among Fig. 5.

Fig. 7 is the module map of a hard disk drive system in the utility model hard disk rotation motor control system.

Fig. 8 is the Spin Control of a hard disk drive system in the utility model hard disk rotation motor control system and the module map of drive part.

Fig. 9 is the commutating circuit synoptic diagram of a rotation motor in the utility model hard disk rotation motor control system.

Figure 10 is the module map of a BEMF commutation control circuit in the utility model hard disk rotation motor control system.

Figure 11 A is the oscillogram of a tach signal in the utility model hard disk rotation motor control system.

Figure 11 B and 11C are the curve maps of the count value of counter in the BEMF commutation control circuit in the utility model hard disk rotation motor control system.

Figure 12 is a start-up circuit module map in the utility model hard disk rotation motor control system.

Figure 13 A-13J is one group of oscillogram when above-mentioned start-up circuit moves in the utility model hard disk rotation motor control system.

Figure 14 is a supervisory circuit module map in the utility model hard disk rotation motor control system.

Figure 15 A-15K is one group of oscillogram when above-mentioned supervisory circuit is moved in the utility model hard disk rotation motor control system.

[embodiment]

At first with reference to figure 7, it is a synoptic diagram of this invention hard disk drive system.Comprise a microcontroller 200, a gate array 202, a ROM module 204, an A/D and D/A converter 206, a magnetic head drive control module 208 and a disc format cache management interface protocol controller 210 in this synoptic diagram.This synoptic diagram further comprises interface connector 212, a RAM impact damper 214, a read/write modules 216, a read/write prime amplifier 218, a motor and sensor groups compound module 220, also comprises a Spin Control and driver module 222.The structure of this hard disk drive system and ruuning situation can be with reference to U.S. Patent application Ser.No.07/629,948 and the applying date be the technology contents that is disclosed in " miniature hard disk drive of portable computer " in Dec 19 nineteen ninety.

With reference to figure 8, it is the synoptic diagram of this Spin Control and Drive Module 222.This synoptic diagram comprises that a serial port 230, a frequency lock loop circuit 240, a current control circuit 245, a BEMF detecting device 250, start oscillator 260, a supervisory circuit 270, a sequencer 280 and power supply module 290.

Serial port 230 receives continuous clock signal, continuous data signal and chip selection signal from incoming line 231-233 respectively.Serial port 230 is connected on the BEMF detecting device 250 by a signal bus 234, starts oscillator 260 by signal bus 235, comes supervisory circuit 270 by signal bus 236, locks this frequency loop circuit 240 by signal bus 237.

Frequency lock loop circuit 240 is used for controlling the rotating speed of this rotation motor, it comprises that an incoming line is used for receiving next frequency feedback signal to gate array 202, but also comprising that an other incoming line is used for receiving next frequency feedback signal to BEMF detecting device 250, one the 3rd incoming line further is used for receiving next reference frequency signal to gate array 202 timer internals.Frequency lock loop circuit 240 comprises an internal counter by this reference frequency signal driving, this rolling counters forward numerical value and a feedback signal (come to gate array 202 or BEMF detecting device 250) are compared, thereby provide one to output signal to current control module 245, it can control the electric current supply of this rotation motor.

Fig. 9 is the part synoptic diagram of energy supply module 290, and Fig. 9 can be with reference to U.S. Patent application Ser.No.07/630,110 and the applying date be the technology contents that is disclosed in " rotation motor of hard disk " in Dec 19 nineteen ninety.Among the present invention, each motor coil all can produce a BEMF voltage, and the BEMF voltage that is produced by coil L1-L6 makes the two ends of capacitor C1 also produce a voltage, and this voltage is used to stop the running of magnetic head.Have only and when the L2 in the motor coil, L4 and L6 operation, just have the tach signal generation.

Referring to Figure 10, it is the BEMF commutating circuit synoptic diagram in this BEMF detecting device 250.This BEMF commutating circuit comprises on 100, two of the Microprocessor Interface/following counter 102,104, control logic circuit 106,107,108,114 and be used to provide the frequency generator 112 and 113 of source signal (F1 and F2).This circuit further comprises zero detector 109,110, with door 122,123, or door 124,128 and not gate 131,132.

In Fig. 3 E circuit, when motor operation, aforementioned comparer and decoding scheme are used to produce tach signal.This tach signal is sent to circuit 135, then by on the counter 102/down the control pin receives by logical circuit 114, logic gate 122,131 and 132.

When motor operation during in nominal speed, and this tach signal is in high state hour counter 102 beginning counting forwards, come then to be used as the clock of counter 102 this moment to the signal F1 of frequency generator 112, and when this counter signals becomes low state, the signal F2 that this counter then sends to frequency generator 113 and by logical circuit 106 and logic gate 122,123,124 and 131 in the future is as its clock, the signal F2 that frequency generator 113 produces is the twice of the frequency of signal F1, and counter 102 then can be counted down by the tach signal control of U/D terminal.Referring to Figure 11 A and 11B, when the count value of the counter 102 of null detector 110 detecting is zero, the tach signal value is in the Y point, so just can find the best opportunity of motor commutation, when this tach signal is in high state, logical circuit 114 will make counter 102 get back to reset mode, when the counter of counter 102 is zero, logical circuit 114 will produce a BEMF commutating pulse, and this commutating pulse flows to this motor sequencer 280 (Fig. 8) by a logic gate 128 (Figure 10).

When counter 102 counts down, counter 104 will begin counting forward as its clock signal with signal F1, and when the count value of counter 102 was zero, this clock signal can lose efficacy to counter 104 owing to the influence of logical circuit 107.When this tach signal became a high state, 104 in counter was counted down by the control of U/D terminal.When the count value of counter 104 was zero, this tach signal was in the X point, the best opportunity that it also commutates for motor.At this moment, the logical circuit BEMF pulse of sending is connected on the motor sequencer by circuit 126 with door 128.

The running of this BEMF commutating circuit also is the commutation problem when regulating this motor starting.Operation is during first week when this motor starting, this tach signal will become longer at this section period, and the count value of counter 102 and 104 also can be bigger, and when each counter gained count value is all bigger, these counters just need the longer time to make their numerical value change back to zero, this circuit is an auto-adjusting circuit, itself and can realize the commutation work of motor in the best opportunity, and do not spend misgivings tach signal length.

Yet, when motor starting operation very slow, a voltage problem is just arranged, for example, this speed cycle is very long and counter 102 and 104 can not reach the situation that count value is overflowed, can cause counter 102 and 104 very low count value all to occur like this when the tach signal transition state, these wrong count values will cause motor to carry out switch operation in mistake.

Circuit in this invention can be avoided the generation of this situation in some aspects, this circuit can design in advance and make that the count enable value of counter 102 and 104 is enough big and unlikely and the phenomenon that data are overflowed occurs, and frequency signal F1 and signal F2 are designed to low frequency when the motor starting state, like this, these counters can be not so yet fast frequency startup and close, therefore also the data spillover can not occur, frequency generator 112 and 113 frequency can be controlled by above-mentioned microprocessor and edit.

The other technologies advantage of also having showed above-mentioned commutation control circuit in Figure 10, it is because used frequency generator and counter still is programmable, thereby motor can not change its physical arrangement and be applied under the situation of different parameters.The instruction that this rotation motor can be sent by this microprocessor and change its operational factor arbitrarily, like this, if a systematic parameter has changed, for example changed a magnetic disc driver, the operational factor that this microprocessor can also be adjusted this rotation motor automatically adapts to the variation of these parameters.In addition, its external capacitor also can save, and like this, the The whole control circuit just can be integrated on the monolithic integrated circuit chip, thereby can accomplish to save most the space.

Referring to Figure 12, it is a synoptic diagram that can make this rotation motor start the oscillator start circuit 260 of operation.This circuit comprises a Microprocessor Interface 140, clock frequency 142, register sum counter module 144,146, the 148 and logic modules 150 in a radio road.This circuit further comprise a zero count detecting device 152, maximum count detecting device 154, counter 156, with door 158,160,162,164, or door 166,168, this circuit also comprises a sequencer 170, a motor amplifier 172 and a rotation motor 174.When the amplitude of the BEMF signal that is produced by this motor was too big, this starting impulse circuit will lose efficacy, and in this case, (come to Figure 10 in circuit 130) the BEMF signal that receives by circuit 116 will be used to the switch operation of this motor amplifier.

That Figure 13 A-13J shows is the waveform and the signal association figure of this startup oscillator.What Figure 13 A represented is the count value of the motor current potential of counter 156 records, what Figure 13 B represented is the starting impulse synoptic diagram that produces from maximum count detecting device 154, what Figure 13 C represented is the next BEMF commutating pulse synoptic diagram as for circuit 116 that receives, Figure 18 D and 18E represent be from door 158 and 160 separately the output signal synoptic diagram, what Figure 13 F represented is the control signal synoptic diagram that is applied to the U/D terminal of counter 156, what Figure 18 G represented is a count value of zero that is write down by zero count detecting device 152, and Figure 13 H represents is a maximum count value by maximum count detecting device 154 records, and Figure 13 I and Figure 13 J represent the output signal synoptic diagram that sends from logic gate 164 and 162 respectively.

When the startup operation of magnetic disc driver element, this rotation motor is fixed.This rotation motor of supposition is right handed earlier here, this microprocessor is by interface 140, editor comes frequency signal F1 and the F2 to module 144, in addition, this microprocessor is zero count initialized device 156 further, be provided with one and penetrate the duration of pulse, the count value of maximum count detecting device 154 is set, signal F1 is by logic gate 158,164 and 166 and as the input of the clock of counter 156.Therefore, the situation of counter 156 beginning counting forwards as shown in FIG. 13A.Like this, counter 156 begins to count until the count value of counter reaches maximum count value, the B point in its situation such as the identical moment, this maximum count detecting device 154 produce a starting impulse by or door 168 be sent to sequencer 170, and then send commutation amplifier 172 to.What Figure 13 B represented is the result schematic diagram of starting impulse, and this moment, this motor will be transformed into another state, and this logic module 150 then while counter reset 156 is zero.

The A point is to cause this motor to rotate to the situation of change of the parameters of hydraulic motor of next reversal point to the expression of C point, this just needs the running shock energy of this motor to stop before next starting impulse arrives, if this pulse arrives too soon, in the intersegmental appropriate setting of A-C is very important, this motor just can rotate in a counter-clockwise direction like this, otherwise if this pulse arrives too slowly, this motor may can not produce the BEMF signal owing to rotational speed is not enough.

When arriving the F point, this motor rotational speed is just enough fast, the BEMF commutating pulse that produces is shown in Figure 13 C, receive this pulse by a radio road 148, then come this motor and amplifier are commutated by a sequencer, in addition, a radio road 146 also is activated, when a radio road 146 is triggered when starting, 156 in the counter signal F2 that counts down then becomes this counter clock signal.When editor one radio road 146, counter 156 will count down, represents to this section of some G by a F during this period of time, and under the overtime situation in a radio road 146, counter 156 will continue counting until put H, but it can last till a J under normal operation.At this moment, the another one BEMF pulse that produces control counter 156 once more counts down, yet, during this period of time, circuit among Figure 10 will produce more BEMF pulse, the count value that can prevent counter 156 like this reaches maximum count value, and final, counter 156 will reach remainder value.Meanwhile, the BEMF pulse meeting that does not stop production living makes the startup that is triggered that does not stop on a radio road 146, and when the count value of counter 156 is zero, will can not produce new starting impulse signal again.Like this, therefore this start-up circuit can lose efficacy and the switch operation of this motor 174 and amplifier 172 will be fully by this BEMF pulse control.

To this introduction that starts oscillatory circuit, the rotation starting impulse that is transported to motor is to change its frequency according to the difference of parameter and the variation of surrounding environment factor according to top.In addition, because do not need to increase extra capacitor, its entire circuit is can be integrated on the single integrated circuit (IC) chip, thereby can make its manufactured size minimum as far as possible.

One supervisory circuit, it can be used for the correctness cutting off this BEMF commutating circuit and detect the sense of rotation of this rotation motor.Referring to Figure 14, this supervisory circuit comprises counter 180,182, allow counter 180,182 and logic decoding circuit 184,186 are edited under 184,186 and Microprocessor Interface 120 of logic decoding circuit, this Microprocessor Interface 120 situation that environment difference or operational factor change around.This supervisory circuit comprises that further one is used for testing comparer 190, one triggers 192 of this BEMF signal polarity, with door 194,196,198, or door 200,202 and not gate 204,206.

Referring to the circuit diagram of Figure 15 A-15K and front, this microprocessor can be edited the decode results of the counting step and the logic decoding circuit 184 of counter 180, provides one to output signal to counting terminated line 1 (TC1) then.The decode results of counter 182 and logic decoding circuit is used to provide one and outputs signal to counting terminated line 2 (TC2).When any BEMF commutating pulse by or door 200 time, an one startup oscillating impulse or a TC2 pulse will be arrived high state by secondary actuator 192, when the output signal of trigger 192 is high state, to produce a clock signal shown in Figure 15 H with door 194 and give counter 180, counter 180 will situation begin counting shown in Figure 15 C, when the count value of this counting terminal TC1 is sent to door 194 to invalid numerical value, be activated with door 196 and 198.At this moment, counter 182 will according to door 196 outlet lines on clock signal shown in Figure 15 F beginning the counting.

If the sense of rotation of this motor is incorrect, and come to the BEMF signal of winding C section for just, thereby make that the output signal of comparer 190 is low state, like this, counter 182 will be allowed to reach according to this clock signal (with the output signal of door 196) count value of the counting terminal (TC2) shown in Figure 20 I.In this case, trigger 192 sum counters 182 all are reset, and a pulse shown in Figure 15 G enters next winding section then with being sent to sequencer by motor amplifier earlier, wherein, come to be imported into or door 200 carries out next cyclic process to the signal of terminating circuit 2 (TC2).

If this BEMF signal is for negative, comparer 190 and with the output signal of door then be high state, like this, counter 182 will by or the output signal replacement of door.The oscillogram of counter 182 during resetting is shown in Figure 20 J, extremely the clock signal shown in Figure 20 K with door 196 is less generation, when the sense of rotation of motor is correct, to not have any pulse signal and be sent to this sequencer, and come to or the output signal of door 202 will cause trigger 192 to be reset, this circuit will wait for to or the next pulse signal of door 200.

Notice only to have shown a comparer 190 among Figure 14 that the voltage condition of its monitoring winding C section also has two identical comparers to be used for monitoring the voltage signal of the winding A section and the B section of this circuit in addition.This supervisory circuit has a lot of technical advantages, its Microprocessor Interface comprises several ports, the operational factor of this supervisory circuit can be made corresponding edit-modify because of motor operation situation and surrounding environment factor, in addition, thus this circuit does not need extra capacitor can make its required space for minimum yet.

Claims (10)

1. hard disk rotation motor control system, it comprises that circuit, a counter circuit, a starting impulse, a signal, a logical circuit and a counting direction control circuit take place a BEMF, and above-mentioned BEMF circuit takes place comprises that one is used for receiving the incoming line of BEMF commutating pulse signal; Above-mentioned counter circuit comprises an incoming line, a counting direction control terminal and an outlet line; Above-mentioned logical circuit comprises that one is connecting the incoming line that the circuit incoming line takes place above-mentioned BEMF; Above-mentioned counting direction control circuit comprises that one is connecting the circuit incoming line takes place above-mentioned BEMF incoming line is being connected above-mentioned counter circuit counting direction control terminal with one outlet line, it is characterized in that: above-mentioned BEMF take place circuit produce a BEMF commutating pulse signal to its outlet line to respond the BEMF signal on the above-mentioned incoming line; The signal that above-mentioned counter circuit responds on the above-mentioned incoming line changes its count value; Above-mentioned starting impulse produces on above-mentioned counter circuit outlet line when above-mentioned count value equates with predetermined value; Above-mentioned signal is in the direction variation that is used for measuring above-mentioned count value on the above-mentioned counting direction control terminal; Above-mentioned counting direction control circuit produces one and be in other signal of the first order on above-mentioned outlet line when above-mentioned rotation motor starts, like this, the count value of above-mentioned counter circuit responds the changing value of each time clock on first direction by above-mentioned logical circuit control on above-mentioned outlet line; Above-mentioned counting direction control circuit produces a signal that is in second level on counter circuit counting direction control terminal when the above-mentioned BEMF commutating pulse of response, like this, the count value of above-mentioned counter circuit will change because of the different of second direction and first direction.

2. hard disk rotation motor control system as claimed in claim 1 is characterized in that: the signal on the above-mentioned counter circuit input circuit is programmable.

3. hard disk rotation motor control system as claimed in claim 1, it is characterized in that: above-mentioned counter circuit comprises that further a count value bus that is used for carrying the above-mentioned counter value signal of expression is being connected the count detector of above-mentioned count value bus to above-mentioned counter circuit outlet line with one, and above-mentioned detecting device produces one and detects after the count enable pulse of selecting.

4. hard disk rotation motor control system as claimed in claim 3 is characterized in that: above-mentioned to be used for selecting the count detector of count value be programmable.

5. hard disk rotation motor control system as claimed in claim 2, it is characterized in that: the said motor control system further comprises the Microprocessor Interface that is connecting above-mentioned counter circuit.

6. hard disk rotation motor control system as claimed in claim 1, it is characterized in that: above-mentioned counter circuit comprises that further a count value bus that is used for carrying the above-mentioned counter value signal of expression is being connected above-mentioned logical circuit with an outlet line, wherein, above-mentioned count detector produces one and detects after the counter value signal of selecting on above-mentioned outlet line, and the logical circuit of response count detector output signal can suppress the generation of signal on the outlet line of above-mentioned logical circuit.

7. hard disk rotation motor control system as claimed in claim 6, it is characterized in that: the said motor control system further comprises a sequential circuit, its incoming line is connecting the outlet line of above-mentioned counter circuit, wherein, said sequence device circuit will make response come to the state change of the rotation motor of above-mentioned counter circuit starting impulse.

8. hard disk rotation motor control system as claimed in claim 7, it is characterized in that: the said motor control system further comprises one first pulse-generator circuit, it has an incoming line connecting the outlet line that circuit takes place above-mentioned BEMF, and, the one outlet line is connecting said sequence device circuit, it can respond above-mentioned BEMF commutating pulse, and above-mentioned first pulse-generator circuit can produce pulse signal on above-mentioned outlet line.

9. hard disk rotation motor control system as claimed in claim 8, it is characterized in that: above-mentioned counting direction control circuit comprises one second pulse-generator circuit, it has an incoming line connecting the outlet line that circuit takes place above-mentioned BEMF, and, the one outlet line is connecting the counting direction control terminal of above-mentioned counter circuit, wherein, the incoming line of above-mentioned second pulse-generator circuit and outlet line are respectively the incoming line and the outlet lines of above-mentioned counting direction control terminal.

10. hard disk rotation motor control system as claimed in claim 1, it is characterized in that: the counting module of above-mentioned counter circuit is programmable.

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