CN2580516Y - Computer chess board match system - Google Patents

Abstract

The utility model relates to a computer chessboard match system, which is of a chess match system and integrates computer technology, communication technology and single chip computer technology into a whole. The computer chessboard match system is composed of a special match chessboard, a communication cable, a conversion interface and a computer (PC) which are controlled by a single chip computer. The computer chessboard match system comprises four kinds of special chessboards which can be used for Chinese chess, chess, five-in-a-row and I-go. The computer chessboard match system can realize the functions in a match, such as chessboard number confirmation, chess playing time limit selection, time recording in real time, step recording, display, pause, overtime alarm, chess manual recording, computer chess playing analog display, match data storage and management, etc. Each chess position of the four kinds of chessboards can be encoded by the computer chessboard match system. The utility model can carry out relevant program processing by a control circuit single of the chip computer of the inner part of each chessboard which collects different signals generated by a photosensitive diode in real time when each chess position of the chessboards is lifted, and the chess playing information can be sent to a computer. The utility model can carry out analog display and data storage and management by a special developed application software of a supervisory computer chess match.

Description

The Computer chessboard tournament system

1. technical field

The utility model is a kind of Computer chessboard tournament system, specifically, is a kind of board game system that integrates computer technology, mechanics of communication, singlechip technology.Can be used for the match of Chinese chess, chess, go and quintet game.

2. background technology

At present, in the various board games, generally adopt the chess player to press the timing of chess clock, manual note spectrum, or replace timing note spectrum by the staff; Some match needs to transmit chess manual at any time by the professional and gives mistress narrator explanation; In a small amount of go match, adopt the chess manual of staff with the manual input of portable computer single-deck; In some big event, the chess player remembers that less four step chess manuals can be judged to break rules once.These situations cause the chess player not to be absorbed in and play chess, and the workload that the worker is personnel is big, deficiencies such as explanation inconvenience.

" the universal electric chess tool " that the game chess tool of application electric technology such as Chinese patent information center have announced is a kind of without general chess tool chess piece, that be made up of LCDs and numerous mechanical keys, that can be used for Chinese chess, chess, go and quintet game match (CN2356720Y), it obviously is not suitable for professional chess player's match custom, the chess player needs to be familiar with its method of operating fully and just can play chess, otherwise, make mistakes slightly and will make mistakes." multifunctional single-chip control chessboard " is a kind ofly to make sensor, adopt the chessboard of the special chessman be embedded with magnetic patch with tongue tube (CN2254306Y), though the note of timing simultaneously spectrum, it is to show the chess piece landing point successively by the light emitting diode that is arranged on the chessboard that its chess manual shows." multi-purpose computer go dish " (CN2081747U) is added with a kind of signal of retracting a false move, and the control loudspeaker pipe and will retract a false move and a little do respective handling on chess manual, and, be provided with both sides' row chess pilot lamp, sudden strain of a muscle in one second once is used for timing, obviously can influence chess player's thinking, also is not suitable for regulation game.

3. summary of the invention

The utility model is for adapting to chess player's custom, avoid using special chessman, change deficiencies such as some electronics chess tool function dullness, complicated operation, is convenient to compete and data management, says a kind of tournament system of design such as chess.Native system can be confirmed 32 reel numbers, carries out similar match for 64 chess players simultaneously; Each chessboard provides 8 kinds of step number time restriction parameters, is used for the row chess time limit to select (as fast chess etc.); Can real-time chronoscope step of realization and functions such as demonstration, note spectrum, time-out, overtime warning, the capable chess simulation of computing machine demonstration, match data storage and management.By means of general INTERNET platform (as CuteFTP etc.), data can be transferred to the internet.

This tournament system is made of three parts: monolithic processor controlled special-purpose match chessboard, communication cable and communication translation interface, universal PC (personal computer).Chinese chess, chess, go and four kinds of match chessboards of quintet game are arranged.

The special-purpose chessboard of competing is by single chip machine controlling circuit and each functional circuit collection row chess information and supplementary, uses the corresponding software program of special exploitation to realize real-time chronoscope step and demonstration, remembers functions such as spectrum, time-out, overtime warning, reel number setting, row chess time limit selection, data upload according to the going action rule of different chess.

Place, each chess position at chessboard is provided with a photodiode (see figure 5), and chess piece 1 picks up, when falling, and photodiode 3 has conducting, cut-off state.The output of each photodiode links to each other with the input of a triple gate, and the break-make of the control end of control triple gate can detect the output state of photodiode, and CPU reads in this output state also just can judge the situation that this chess piece is located in the chess position, sees Figure 11.Supposing has N chess position on the chessboard, needing n position binary condition to come this N chess position deciphered is 2 ⁿ〉=N has 90 chess positions as Chinese chess, needs 7 binary conditions to come these 90 chess position decodings, so just can confirm these 90 chess positions respectively by 7 output pin combinations of single-chip microcomputer.In like manner, chess need make up with 6 single-chip microcomputer output pins and decipher 64 chess positions, and go need be made up with 9 single-chip microcomputer output pins and be deciphered 361 chess positions, and quintet game need be made up with 8 single-chip microcomputer output pins and be deciphered 225 chess positions.Single-chip microcomputer scans the state of each chess position successively, and the state of twice chess position judges whether this chess position the chess piece variation of rising and falling has taken place relatively.According to going action rule, store storer into by the chess position that will change successively, reach the purpose of note spectrum; A timer by single-chip microcomputer is provided with a time slice, when side's begin column chess, begins the time slice that adds up, and reaches the purpose of timing; After judging that each side covers a step, step number is added 1, reach the meter purpose in step.By driving display circuit, with step number, time showing in the LCD liquid crystal on card side on the offensive right side not on the device.

Driving display circuit is a kind of character type LCD LCD of 5*8 dot matrix, is used to show step number, the time of match.8 data lines of LCD link to each other with 8 data lines of CPU by a SN74F245, are used to write data, instruction, and Enable Pin E and the register selecting side RS of two LCD are controlled in four outputs of a decoding scheme of employing respectively.Drive apparent not circuit and see U6A, the U7A of Figure 14.

Row chess switch is an open and shut valve that is arranged on chessboard surface side on the offensive left side, when it is closed, exports to the CPU high level, and expression is started the clock and carried out; When it disconnects, export to the CPU low level, the expression match enters time-out, and program is done respective handling.See the S1 of Figure 13.After a step finished, single-chip microcomputer used step number and time judged whether it has surpassed limiting parameter according to this side, if surpass, single-chip microcomputer is exported the red overtime alarm lamp of connecting this side by a decoding scheme, realizes overtime warning.

Be provided with 8 toggle switchs at disk body side's left surface on the offensive, preceding 55 pins that are linked into CPU, 32 combinations of states that it produced are determined the reel number of each chessboard, the reel number of each chessboard can be 0～31.Back 33 pins that are linked into CPU of toggle switch, 8 states that it produced are realized 8 capable chess time limit selection functions.See the S3 of Figure 13.Data upload is to realize by the RS485 driving circuit that a band photoelectricity is isolated, and is made up of three photoelectric isolated chip 6N136, a RS485 chip for driving, D type 9 pin plugs and necessary additional device.RTS exports by a decoding scheme and controls.See Figure 14.Add photoelectric isolating device and be in order to guarantee that the circuit in the chessboard avoids the interference of chessboard external signal, increased the reliability of system.

Because all there is ROM the single-chip microcomputer inside beyond 8031, thus generally do not need the ROM expansion, and only need the growth data memory RAM.The singlechip CPU of native system is selected the 89C52 of ATMEL for use, also optional 89S8252 etc.Expansion RAM selects HM6264, and extended address is 0000H ~ 1FFFH.Expansion RAM exports gating by decoding scheme, sees the U3 of Figure 12.

The used decoding schemes such as RTS control end of the E of single-chip microcomputer detection chess position, LCD LCD and RS, the overtime warning of control, gating expansion RAM, RS485 are to realize by the internal logic circuit of programmable logic device (PLD).See U4, the U5 of Figure 13.The I/O number of pin of programmable logic device (PLD) has determined four kinds of number of chips that chessboard is used.The utility model adopts the ATF1504AS/L chip of atmel corp, and Board of chess need be with 2, and the chess chessboard need be with 2, and the quintet game chessboard need be with 5, and chessboard of go need be with 7.

Power supply design adopted light every interior power supply and light every external power, come for light provides power supply every interior, light every outer circuit, disturb the operation of single-chip microcomputer internal program to prevent the outer factor of single-chip microcomputer, increase the reliability of system.

Because host computer PC be with the next a plurality of disk bodies in microcontroller communication, and the serial ports of PC is a RS232 interface, it has only two connections (TXD, RXD), be to satisfy a PC to many next microcontroller communication, the RS232 interface conversion of PC must be become the RS485 interface, could with the RS485 interface communication of the next single-chip microcomputer, so need between host computer PC and the next many single-chip microcomputers, increase a RS232/RS485 interface convertor.

The work that host computer PC is mainly finished comprises: show capable chess variation, match data storage and the management that each coils with the next many microcontroller communications, simulation.

The topological structure (see figure 1) of Ethernet (Ethernet) is adopted in communication between host computer PC and the next many single-chip microcomputers, and communication adopts self-defining communications protocol to finish.This communication program has an interface respectively and between simulation display routine, the database program; The simulation display routine is obtained data from communication program and is used for simulation and shows, puts into database with the chess manual form after the data processing that communication program will be obtained from slave computer.Program flow diagram between host computer PC and the next single-chip microcomputer is seen Fig. 1.The developing instrument of this communication program adopts Visual C++ 6.0, also can adopt Borland C++ or Delphi.

The simulation display routine is obtained chess position change information of each dish of slave computer from communication program, and these information are carried out chess position change modeling by corresponding reel number shows.The change-over switch of 0 ~ 31 reel number is arranged on the simulation display interface, can switch demonstration by the corresponding reel number in 0 ~ 31.The program flow diagram that simulation shows is seen Fig. 1.The developing instrument of this simulation display routine adopts visual c++ 6.0, also can adopt Visual Basic 5.0/6.0, Borland C++ or Delphi etc.

Match data storage and management realize that with a data base administrator it has stored various relevant informations such as each chess manual that coils of match, time spent, chess player's information, organization and administration respectively.Data base administrator also can adopt Visual Foxpro 5.0 exploitations such as grade with the ACCESS exploitation.

4. description of drawings

Fig. 1 is a Computer chessboard tournament system structural drawing.

Fig. 2 is chessboard surface figure.1 is defensive position side's meter step timing LCD, and 2 is side's meter step timing LCD on the offensive, and 3 is power switch, and 4 are row chess switch, and 5 is the overtime warning pilot lamp in defensive position side, and 6 is the overtime warning pilot lamp of side on the offensive, and 7 is the chessboard playing area, and 8 is chessboard surface.

Fig. 3 is disk body left surface figure.1 be 8 toggle switchs (5 for reel number select, 3 select for the row chess time limit), 2 be power light, 3 accept pilot lamp (RXD) for communication, 4 is communication transmission pilot lamp (TXD).

Fig. 4 is the disk body right hand view.1 is power interface, and 2 is RS485 9 pin D type communication interfaces.

Fig. 5 is the single chess of a chessboard position sectional view.1 is chess piece, and 2 is the chessboard upper cover body, and 3 is photodiode, and 4 is the single chip machine controlling circuit plate, and 5 is the chessboard base.

Fig. 6 is the Single-chip Controlling block diagram of chessboard.1 is CPU, and 2 is clock circuit, and 3 is expansion RAM, and 4 for reel number is provided with circuit, and 5 are row chess time limit selection circuit, and 6 are row chess on-off circuit, and 7 is chess position testing circuit, and 8 is LCD liquid crystal drive display circuit, and 9 is the RS485 driving circuit, and 10 is overtime acknowledge circuit.

Fig. 7 is a chessboard Single Chip Microcomputer (SCM) program main flow chart.

Fig. 8 is a chessboard singlechip interruption program flow diagram.

Fig. 9 host computer PC and the next chessboard microcontroller communication program flow diagram.

Figure 10 is the simulation display routine main flow chart of host computer PC.

Figure 11 is single chess position testing circuit figure.1 is photodiode, and 2 is stake resistance, and 3 is triple gate, and c is a decoding output of CPU output pin.

Figure 12～Figure 15 is a Single-chip Controlling chessboard schematic diagram.U1 is CPU, U2 is 74LS373, U3 is HM6264, U100 is SN74F245, the U98 power switch, U99 is a power module, U4, U5 is EPM7064SLC-84, and S3 is 8 toggle switchs, J3 is row's resistance, S1 is an open and shut valve, and CU1 ~ CU11 is for going to lotus root electric capacity, 1,2,3,4,5 circuit are respectively RTS, side's warning on the offensive, the warning of defensive position side, TXD, the RXD indicator light circuit, U6A, U7A is a first and second playing side LCD display circuit, OP4, OP5, OP6 is the photoelectric coupling chip, U8A is the RS485 chip for driving, and DB90 is 9 pin D type plugs, and U6 ~ U95 is the photodiode that is used for a testing circuit.

5. embodiment

The entire work process of accompanying drawings Computer chessboard tournament system with and various function how to realize.

The utility model is made up of host computer PC, communication cable and translation interface, monolithic processor controlled special-purpose match chessboard.See Fig. 1.

The side on the offensive right side of match chessboard is provided with two LCD LCD, shows both sides' fixture and step number respectively.Match the time, the minute, second display format is " XX:XX:XX ", can show 0 ~ 99 hour match time spent.Step number shows with three bit digital, can show for 0 ~ 999 step.Side on the offensive left side is provided with a power switch, a capable chess switch, two overtime warning pilot lamp, sees Fig. 2.Side's left surface on the offensive of disk body is provided with 8 toggle switchs, 3 pilot lamp.Preceding 5 of toggle switch are used for the reel number selection, and back 3 are used for the selection of row chess time limit, and 3 pilot lamp are respectively applied for display power supply, communication acceptance (RXD), communication transmission (TXD) situation, see Fig. 3.Side's right flank on the offensive of disk body is provided with a power interface, a RS4859 pin communication interface, sees Fig. 4.Chessboard body interior circuit board is provided with single-chip microcomputer and control circuit, functional circuit etc., and the application program of special exploitation is housed in the single-chip microcomputer.

Each place, chess position at chessboard is provided with a photodiode, and when chess piece rose and fell, photodiode was to having conducting, ending (1,0) two states.See Fig. 5.The output of each photodiode links to each other with the input of a triple gate, and the break-make of the control end of control triple gate can detect the output state of photodiode, and whether have the rising and falling of chess piece and chess piece, see Figure 11 if also just can judge place, chess position.Suppose N chess position on the chessboard, this N chess position deciphered in the available minimum binary combination in n position, and promptly 2 ⁿ〉=N.By this N chess position of n output pin decoding gating of CPU output, the control end of the triple gate that the corresponding control of each decoding output links to each other with the photodiode output terminal, like this, CPU provides a decoding output, the state of the chess position corresponding with it will be read in CPU.Just can judge the situation of chess piece on this chess position by the state of twice each chess position before and after comparing.If the state variation that front and back, a chess position are twice is: 1 → 0, illustrate that this chess position has chess piece to fall; If state variation is: 0 → 1, illustrate that this chess position has chess piece to pick up; If state is 0 always, illustrate that there is chess piece this chess position but there do not have to be moving; If state is 1 always, illustrate that this chess position do not have chess piece and do not have chess piece to fall yet.According to the board game rule, CPU provides each chess position decoding output successively, reads in corresponding chess position state, contrasts its front and back state, writes down the chess position that changes sequentially, reaches the purpose of meter spectrum.During beginning, the initial demonstration in the chronoscope of side on the offensive, defensive position side step is 00:00:00 and 000.The row chess at the beginning, side on the offensive picks up counting the meter step, produce the state that once interrupts each chess position of run-down by timer T0 every 50ms, two next states before and after the contrast are not if there is state variation, illustrating does not have chess piece to change, every interruption once, the time 50ms that adds up adds up when reaching 1 second, side's on the offensive LCD liquid crystal display displays increases by 1 second, adds up successively to show its time spent; If there is state variation front and back twice, at first determine the chess position of variation, and its variation chess position preserved that after a step, chess was covered (four kinds of chesses judge that it is different covering a program that goes on foot), step number adds 1 and also shows.Whether then, with the selected capable chess time limit parameter comparison of its cumulative time, step number and this chessboard, confirm overtimely, as overtime, CPU provides corresponding decoding output, connects this side's warning pilot lamp, realizes overtime warning.To add up the time again and change defensive position side over to.The time and the step number of defensive position side adds up, the time limit contrasts with side on the offensive.The rest may be inferred.See Fig. 7, Fig. 8.

Demonstration to time, step number is realized by two LCD driving display circuits, 8 data lines of LCD (7～14 pin) link to each other with 8 data lines D0 ~ D7 of CPU by a SN74F245, and Enable Pin E and register selecting side RS are exported respectively by two decoding schemes and control.When need showed a side time, step number, the Single-chip Controlling program provides decoding output made Enable Pin E for high point is effectively flat, provided RS decoding output simultaneously and controlled instruction and the data of this LCD and select.Drive display circuit and see U6A, the U7A of Figure 14.

Two light of the RS485 driving circuit in the single-chip microcomputer link to each other with the TXD of CPU, the RTS of programmable logic device (PLD) respectively every input end, and another output terminal links to each other with the RXD of CPU.RTS connects the RTS end of RS485.When single-chip microcomputer will be uploaded data or have data to accept, exchanges data was finished in the control of RTS end.RTS controls by a decoding output.Light every input, output connect respectively light every interior, light every outer power supply.Driving and D type interface connect light every outer power supply.See Figure 14.

Team match is by the closure of row chess switch, disconnects and determine to start the clock, suspend or finish.CPU reads beginning, time-out and the end of the state decision Single Chip Microcomputer (SCM) program of capable chess switch.See the S1 of Figure 13.When calling the time, Single Chip Microcomputer (SCM) program can stop chronoscope step automatically, and the state that reads capable chess switch all the time decides program whether to continue the chronoscope step.See Fig. 7,8.

Before starting the clock, preceding 5 reel numbers in accordance with regulations of 8 toggle switchs are provided with determining reel number, back 3 are provided with by the capable chess compulsory time for plays of selecting.As 8 toggle switchs be set to 01101001, the expression reel number is 13, row is chosen as parameter 1 in the chess game chess time limit.When single-chip microcomputer powered on, CPU can at first read the state of 8 toggle switchs, with reel number and the row chess compulsory time for play selection mode parameter of determining this dish.After this, program will be carried out routine processes with selected time limit parameter with this reel number and host computer PC communication, to realize the overtime warning in different time limits.

When host computer PC needed the data of slave computer dish, it sent an instruction that includes this disk address earlier, and this dish can send a response message to host computer when the communication success, and host computer PC is read in the data of this dish then.Other dish then can not respond this instruction.

After host computer PC obtains the data of the next single-chip microcomputer,, be presented on the PC with the capable chess change modeling of simulation display routine with each dish by the processing of corresponding program.The simulation display routine at first need be drawn the card of corresponding chess and the original state of chess piece, and variation is progressively upgraded chess position state and shown according to the row chess then.The simulation of each dish shows switches at any time by a reel number switching selection switch on the interface, sees Fig. 9, Figure 10.

Data base administrator at first need be set up with the next and respectively coil corresponding table, and with information-related various tables such as fixture, title, chess player, set up corresponding list again and conveniently inquire about.Put into corresponding table respectively from the data that the next each single-chip microcomputer is obtained, convenient inquiry later on.

Before starting the clock, the staff will compete earlier and be input to the PC database for information about, and chessboard, chess piece are put well, connect power supply and connection, 8 toggle switchs are pushed corresponding position, with the reel number of definite this dish and the capable chess time limit of selection, simultaneously, closed power switch.Judge one will go the chess switch closure, and match formally begins.In the middle of the match, suspend as need, then the judge will go the chess switch and disconnect, and after the EOT end of timeout, will go the chess switch closure again, and time in is carried out.After the end of match, disconnect row chess switch, cut off the electricity supply again.The match data can be transferred to the internet with data by means of Modem or LAN (Local Area Network) and INTERNET instrument such as CuteFTP etc.

With not changing chess player's row chess custom, application operating is simple surely for the utility model chess piece, and the reliability height is multiple functional, with high content of technology, and system cost control rationally is applicable to various large, medium and small board games, has adapted to the demand for development of current information society.

Claims (10)

1. a Computer chessboard tournament system is made up of general PC (personal computer), communication cable and communication translation interface, monolithic processor controlled special-purpose match chessboard; Be useful on four kinds of chessboards of Chinese chess, chess, go and quintet game match; This system has reel number and confirms, goes that the selection of chess time limit, real-time chronoscope go on foot and show, remember that spectrum, time-out, overtime warning, the capable chess of computing machine are simulated demonstration, the functions such as data management, storage of competing; It is characterized in that on PC, being equipped with the board game system software of special exploitation, the RS232/485 translation interface and the cable that are used for communication, the monolithic processor controlled Chinese chess that is used for, chess, four kinds of special-purpose chessboard and corresponding application software programs thereof of competing of go and quintet game match, locate to be provided with a photodiode in each chess position (position of beginning) on the special-purpose chessboard, (the go quintet game is a black side on the offensive on the chessboard surface, Chinese chess is red, chess is white side) left side is provided with power switch, row chess switch and two red light emitting diodes warning pilot lamp, card side on the offensive right side is provided with and is used for chronoscope two LCD in step, disk body side on the offensive left side is provided with and is used for determining 8 toggle switchs that reel number and row chess time limit are selected and being used for display power supply and three green LED pilot lamp of communication condition, disk body side on the offensive right side is provided with 9 pin communication interface and attaching plugs, is arranged on the single chip machine controlling circuit on the circuit version in the disk body, power module, chess position testing circuit, the communication driving circuit, the liquid crystal drive display circuit, overtime acknowledge circuit, reel number is provided with circuit, the row chess time limit is selected circuit, row chess on-off circuit and auxiliary circuit.

2. according to the said Computer chessboard tournament system of claim 1, (dominant frequency is not less than 450MHZ to it is characterized in that adopting common office computer by the PC hardware platform, internal memory is no less than 128M, hard disk is no less than 1.2G), WINDOWS 98/2000 during the system software platform adopts, what application software adopted is the board game system software that runs on the special development and Design of PC.

3. according to the said Computer chessboard tournament system of claim 1, it is characterized in that the single-chip microcomputer of controlling special-purpose chessboard adopts ATMEL 89C52 or 89S8252 single-chip microcomputer, application software adopts the corresponding software program of specialized designs exploitation.

4. according to the said Computer chessboard tournament system of claim 1, the light that it is characterized in that single chip machine controlling circuit CPU, the inside ROM that deposits control program, the expansion RAM of depositing routine data, coding chip 74LS373, the metadata cache chip SN74F245 on the circuit version in the disk body and be used to increase system reliability is formed every auxiliary circuits such as external power modular design every interior, light; The low order address of expansion RAM links to each other with 74LS373 and is used for decoding, and expansion RAM is by a decoding output gating of programmable logic device (PLD), and the data line of CPU links to each other with SN74F245 and is used for metadata cache.

5. according to the said Computer chessboard tournament system of claim 1, it is characterized in that the chess position testing circuit on the circuit version is formed with programmable logic device (PLD), photodiode and stake resistance in the disk body; Programmable logic device (PLD) is adopted the ATF1504AS/L chip of atmel corp, also can adopt the ATF1516AS/L of atmel corp and the programmable logic device (PLD) of companies such as ALTERA, Xilinx; E and the RS that the interior design of programmable logic device (PLD) is useful on the decoding of chess position, expansion RAM sheet gating, LCD LCD holds, the RTS of RS485 controls, the logical circuits such as decoding output of overtime warning; The chess tournament chessboard has adopted the stake resistance of two ATF1504AS/L chips, 90 photodiodes and 90 300R; The chess game chessboard has adopted the stake resistance of two ATF1504AS/L chips, 64 photodiodes and 64 300R; Quintet game match chessboard has adopted the stake resistance of five ATF1504AS/L chips, 225 photodiodes and 225 300R; Go match chessboard has adopted the stake resistance of seven ATF1504AS/L chips, 361 photodiodes and 361 300R; The output terminal of each photodiode links to each other with the input end of corresponding programmable logic device (PLD) and an end of stake resistance links to each other.

6. according to the said Computer chessboard tournament system of claim 1, it is characterized in that reel number is provided with circuit and selects circuit to be linked to each other with the P1 mouth by 8 toggle switchs with the row chess time limit, P1.0～P1.4 is used for the reel number setting, and P1.5～P1.7 is used for the selection of row chess time limit.

7. according to the said Computer chessboard tournament system of claim 1, it is characterized in that communication drives by three photoelectric isolated chips, RS485 chip for driving, D type 9 pin plugs and necessary additional device to form; The RTS control end of RS485 is by a decoding scheme output control of programmable logic device (PLD); Two light of RS485 driving circuit link to each other with the TXD of CPU, the RTS of programmable logic device (PLD) respectively every input end, and another output terminal links to each other with the RXD of CPU.

8. according to the said Computer chessboard tournament system of claim 1, it is characterized in that the liquid crystal drive display circuit comes gating and two LCD driving display spares of control by four decoding outputs of programmable logic device (PLD).

9. according to the said Computer chessboard tournament system of claim 1, it is characterized in that row chess on-off circuit links CPU by an open and shut valve, realize the function of row chess and time-out.

10. according to the said Computer chessboard tournament system of claim 1, it is characterized in that overtime acknowledge circuit controls two warning pilot lamp by two decoding outputs of programmable logic device (PLD).

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