CN2503597Y - Economic-type double-delay time relay - Google Patents

Economic-type double-delay time relay Download PDF

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Publication number
CN2503597Y
CN2503597Y CN 01215686 CN01215686U CN2503597Y CN 2503597 Y CN2503597 Y CN 2503597Y CN 01215686 CN01215686 CN 01215686 CN 01215686 U CN01215686 U CN 01215686U CN 2503597 Y CN2503597 Y CN 2503597Y
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China
Prior art keywords
microprocessor
setting module
input
delay time
dial
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Expired - Fee Related
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CN 01215686
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Chinese (zh)
Inventor
周松明
王武胜
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Individual
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Individual
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Priority to CN 01215686 priority Critical patent/CN2503597Y/en
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Publication of CN2503597Y publication Critical patent/CN2503597Y/en
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Expired - Fee Related legal-status Critical Current

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Abstract

The utility model provides an economical double time delay time relay which comprises a controlling module (1), a central timing counter, an input setting module, and a power source (5), wherein the central timing counter is a microprocessor (2), the input setting module is a shifting rider (3), in addition, the utility model also comprises a unit setting module (4), the output terminal of the microprocessor (2) is connected with the input terminal of the controlling module (1), the unit setting module (4) is connected with the microprocessor (2), the output terminal of the shifting rider (3) is connected with the input terminal of the microprocessor (2), the double timing delay is realized through a software method, to reach the purpose of time control, the accuracy is high, the intelligent control is realized, the stability is good, the interface is simple, the operation is easy, the volume is small, and the cost is low.

Description

The economical dual-delay time relay
The utility model relates to a kind of time relay.
At present, the time relay on the market is analog mostly, as shown in Figure 1, it is mainly by output control module, central authorities' timer and input setting module are formed, output control module is common relay, central authorities' timer is an analog timer, mainly there is following shortcoming in it: analog timer adopts the method for hardware to realize time set, usually adopt some oscillation frequency dividing circuits to finish, but the oscillation frequency dividing circuit precision is lower, often can only reach 0.1 second the order of magnitude, and setting range is limited, poor anti jamming capability makes troubles so for actual work; Import setting module in addition and realize with knob resistance usually, knob resistance operation control difficulty, the accuracy of time is difficult to control; A kind of digital time relay has just appearred now, adopt the input of liquid crystal display displays time to set, with keyboard as the input setting module, the interface complexity, volume is bigger, troublesome poeration, structure is comparatively complicated, and cost is higher, can only realize single time-delay, promptly can only control output control module and carry out the time-delay of action, and can not control the time-delay that output control module stops to carry out action.
The purpose of this utility model provides a kind of economical dual-delay time relay, and it realizes the plesichronous time-delay by the method for software, reaches the purpose of time control, the accuracy height, realize Based Intelligent Control, stability is better, and the interface is simple, processing ease, volume is little, and cost is low.
The utility model is achieved by the following technical solution: it comprises output control module, central timer, input setting module and power supply, this central authorities' timer is a microprocessor, the input setting module is a dial-up, it also comprises the unit setting module in addition, the output of microprocessor is connected with the input of output control module, the unit setting module is connected with microprocessor, and the output of dial-up is connected with the input of microprocessor.
Above-mentioned dial-up is divided into two groups, is respectively applied for to set the delay time that output control module is carried out action or stopped to carry out action.
The utility model compared with prior art has following advantage: 1) utilize the software of microprocessor to realize timing, reach the purpose of time set, complete Based Intelligent Control, because microprocessor native instructions execution speed is fast, so the minimum magnitude of the time of setting is 0.01 second, the precision height, the scope of setting is wide, can set the time delay by 0.01 second to 99.9 seconds, antijamming capability is strong, good stability; 2) carry out time set by dial-up, operation accurately, easily, objective interface, 3 dial-ups of last row are used to set the delay time that output control module disconnects, arrange the delay time that 3 dial-ups are used to set the output control module closure down, reach two purposes of setting, in addition the LCD of dial-up replacement, simplify product structure, reduced cost; 3) increased the unit setting module, by the unit of the unit of slide switch conversion time and light-emitting diode instruction time and the state of output, more directly perceived; 5) realize the output auto-reset function, use more convenient; When 6) 3 dial-ups settings of row delay time was zero down, relay output kept, up to reset pulse is arranged.
Below in conjunction with accompanying drawing the utility model is done detailed explanation:
Fig. 1 is the circuit block diagram that traditional time continues electrical equipment;
Fig. 2 is a circuit block diagram of the present utility model;
Fig. 3 is an interface of the present utility model schematic diagram;
Fig. 4 is the circuit diagram of Fig. 2 correspondence.
As shown in Figure 2, the utility model comprises output control module (1), central timer, input setting module and power supply (5), this central authorities' timer is microprocessor (2), the input setting module is dial-up (3), it also comprises unit setting module (4) in addition, the output of microprocessor (2) is connected with the input of output control module (1), and unit setting module (4) is connected with microprocessor (2), and the output of dial-up (3) is connected with the input of microprocessor (2).As shown in Figure 3, dial-up (3) is divided into two groups, is respectively applied for to set the delay time that output control module (1) is carried out action or stopped to carry out action.
As shown in Figure 4, microprocessor (2) is made of master chip IC1 and peripheral circuit thereof, and the external crystal-vibration-chip X1 of master chip IC1 is as oscillating circuit, for master chip IC1 provides basic frequency of oscillation; Output control module (1) mainly comprises triode Q1 and relay J DQ1, and the base stage of triode Q1 is connected with the 9th pin of master chip IC1, and triode Q1 is used to drive the adhesive of relay J DQ1, and dial-up (3) is made up of dial-up B1~B6; Unit setting module (4) mainly is made up of slide switch SW and 4 light-emitting diode D2~D5; Power supply (5) partly provides electric energy for electricity consumption.
As shown in Figure 3, Figure 4, principle of the present utility model is: stir slide switch SW, make corresponding unit for hour light-emitting diode glittering, then by dial-up (3) input value, stir slide switch SW again, make corresponding unit glittering for the light-emitting diode of minute, second, by dial-up (3) input value, collect data by microprocessor (2) then, master chip IC1 carries out timing by the internal processes control time, timing finishes and goes out signal by 9 human hair combing wastes immediately, and control triode Q1 drives adhesive or the disconnection of relay J DQ1.

Claims (2)

1, the economical dual-delay time relay, comprise output control module (1), central timer, input setting module and power supply (5), it is characterized in that this central authorities' timer is microprocessor (2), the input setting module is dial-up (3), it also comprises unit setting module (4) in addition, the output of microprocessor (2) is connected with the input of output control module (1), unit setting module (4) is connected with microprocessor (2), and the output of dial-up (3) is connected with the input of microprocessor (2).
2, the economical dual-delay time relay according to claim 1 is characterized in that dial-up (3) is divided into two groups, is respectively applied for to set the delay time that output control module (1) is carried out action or stopped to carry out action.
CN 01215686 2001-03-15 2001-03-15 Economic-type double-delay time relay Expired - Fee Related CN2503597Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 01215686 CN2503597Y (en) 2001-03-15 2001-03-15 Economic-type double-delay time relay

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 01215686 CN2503597Y (en) 2001-03-15 2001-03-15 Economic-type double-delay time relay

Publications (1)

Publication Number Publication Date
CN2503597Y true CN2503597Y (en) 2002-07-31

Family

ID=33634223

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 01215686 Expired - Fee Related CN2503597Y (en) 2001-03-15 2001-03-15 Economic-type double-delay time relay

Country Status (1)

Country Link
CN (1) CN2503597Y (en)

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GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee