CN2443553Y - Interface device for intelligent network telephone - Google Patents

Interface device for intelligent network telephone Download PDF

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Publication number
CN2443553Y
CN2443553Y CN 00254013 CN00254013U CN2443553Y CN 2443553 Y CN2443553 Y CN 2443553Y CN 00254013 CN00254013 CN 00254013 CN 00254013 U CN00254013 U CN 00254013U CN 2443553 Y CN2443553 Y CN 2443553Y
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China
Prior art keywords
pin
connect
ground connection
control circuit
cpu
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CN 00254013
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Chinese (zh)
Inventor
刘迎建
马梁
李黎
董博
张向忠
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HANWANG SCIENCE AND TECHNOLOGY Co Ltd BEIJING
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HANWANG SCIENCE AND TECHNOLOGY Co Ltd BEIJING
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Priority to CN 00254013 priority Critical patent/CN2443553Y/en
Application granted granted Critical
Publication of CN2443553Y publication Critical patent/CN2443553Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model relates to an interface device for an intelligent network telephone, which belongs to a communication and information circulation device. The utility model is a device which connects a telephone set, a facsimile apparatus, a modem and an electronic note as integration. The device also connects a display screen, a drawer type keyboard, a printer interface, an infrared interface, a serial interface and a memory card slot together for the convenience of printing and transmitting information with the PC, the palm computer and the handset. The interface device for an intelligent network telephone can help people process all kinds of information transferred on the telephone line, and make the intelligent network telephone combine multiple functions as integration. In this way, the utility model meets various needs of people in daily life and in the office work.

Description

The interface arrangement of intelligent network telephone
The utility model belongs to the servicing unit of communication and information interchange.
The device of original communication, information interchange is of a great variety, as plain old telephone, radio telephone, fax, Email, e-commerce or the like.Hands-free phone, cordless telephone, telegraphone, the phone that has caller identification and mobile phone or the like in the plain old telephone.Some integrating devices are also arranged, can make a phone call, can fax again as some facsimile machine.Email has been the mode of a kind of communication and cooperation more and more important during people live, usually people use desktop PC to be equipped with modulator-demodulator and insert Internet, and use corresponding mail transmission/reception software to realize sending, receiving Email, need to start PC in this process, the operation dialer software, the operation mail software, this is complicated loaded down with trivial details to domestic consumer.In information age today, these communication devices can not satisfy quick and easy, cheap, the requirement of using personal information processing such as simple, comprehensive contact of people to communication modes.
The purpose of this utility model is to design a with telephone set, facsimile machine, modulator-demodulator, electronic notebook (PDA), display screen, touch-screen, keyboard, also has printer interface in addition, the interface arrangement that infrared mouth, serial port and storage card slot are connected in one.
Technical essential of the present utility model is the interface arrangement circuit as shown in Figure 1: it is made of decoder, latch, buffer, backlight chip, register, diode, resistance, electric capacity, NAND gate NOR gate, contact pin etc.U22, U23 are decoders, 82,83,84 pin of processor CPU U6 in 1,2, the 3 pin difference map interlinking 2 of decoder U23,55 pin of U6 in the 4 pin map interlinkings 4 of U23,79 pin of U6 in the 5 pin map interlinkings 2 of U23,3 pin of U6 in the 6 pin map interlinkings 2,15 pin connect 19 pin of buffer U28,11 pin connect 19 pin of buffer U17, and 10 pin connect 17 pin of U17, and 9 pin connect 19 pin of data buffer U27,16 pin meet power supply VCC and connect capacitor C 82 back ground connection, and 8 pin connect digitally; 82,83,84 pin of processor U6 in 1,2, the 3 pin difference map interlinking 2 of decoder U22,55 pin of U6 in the 4 pin map interlinkings 2,80 pin of U6 in the 5 pin map interlinkings 2,3 pin of U6 in the 6 pin map interlinkings 2,15 pin connect 11 pin of U26,13 pin connect 21 pin of U17,12 pin connect 20 pin of U17, and 10 pin connect 18 pin of U17, and 16 pin meet power supply VCC, and connecing capacitor C 75 back ground connection, 8 pin connect digitally; U16, U17 are the buffers of convertible 3V and 5V level; 1 pin of U16 meets power supply VCC, and connects capacitor C 73 back ground connection; 23,24 pin and joining power VCC, and connect capacitor C 74 back ground connection; 11,12,13 pin connect digitally, 22 pin connect 6 pin of NAND gate U20,80 pin of U6 in the 2 pin map interlinkings 2,3 pin connect 3 pin of data latches U24 and 2 pin of data buffer U25, and 4 pin connect 4 pin of U24 and 3 pin of U25, and 5 pin connect 7 pin of U24 and 4 pin of U25,6 pin connect 8 pin of U24 and 5 pin of U25,7 pin connect 13 pin of U24 and 6 pin of U25, and 8 pin connect 14 pin of U24 and 7 pin of U25, and 9 pin connect 17 pin of U24 and 8 pin of U25,10 pin connect 18 pin of U24 and 9 pin of U25,1 pin of U17 connects power supply, and connects capacitor C 83 back ground connection, 23,24 pin and joining power, connect capacitor C 84 back ground connection again, 11,12,13 pin ground connection, 2,22 pin ground connection, 21 pin connect 13 pin of U22,20 pin connect 12 pin of U22,19 pin connect 11 pin of U23, and 18 pin connect 10 pin of U22, and 17 pin connect 10 pin of U23,14 pin of U6 in the 16 pin map interlinkings 2,6 pin connect 11 pin of U24, and 7 pin connect 19 pin of U25,3 pin of 8 pin order socket pin J6; U26 is a data latches, the 1 pin ground connection of U26,11 pin connect 15 pin of U22, and 20 pin connect power supply, 10 pin ground connection, 3, data wire D8 to D15 (66~59) pin of U6 in the map interlinking 2 of 4,7,8,13,14,17,18 pin difference, 2,5 pin connect this telephone functionality key control circuit, and 6 pin connect display screen, 9 pin connect the display backlight chip, 12,15,16, the 19 pin data buffer of panel control circuit of answering the call respectively, 20 pin connect power supply, and 10 pin connect digitally; U27 in the interface arrangement, U28 are data buffers, 19 pin of U28 connect 15 pin of U23,1 pin ground connection, 2,3,4,5,6,7,8,9 pin data wire D8 to D15 (66~59) pin of U6 in the map interlinking 2 respectively, 17, the 18 pin machine function key control circuit of answering the call, 16 pin connect power control circuit, 15 pin connect the backlight driver of display screen, 14,13,12,11, the pin machine side plate control circuit of answering the call, 20 pin connect power supply, 10 pin connect digitally; 19 pin of data buffer U27 connect 9 pin of U23,1 pin ground connection, and 2,3,4,5,6,7,8,9 pin are data wire D8 to D15 (66-59) pin of U6 in the map interlinking 2 respectively, 18,17,16,15,14,13,12, the 11 pin machine side plate control circuit of answering the call respectively; U24 is a data latches, 3,4,7,8,13,14,17,18 pin of U24 connect 3 to 10 pin of U16 respectively, 19,20,21 pin of double contact pin J1 in 2,5, the 6 pin difference map interlinking 3 of U24,13 pin of J1 in the 9 pin map interlinkings 3 of U24,26 pin of J1 in the 12 pin map interlinkings 3,9 pin of J1 in the 19 pin map interlinkings 3,20 pin meet power supply VCC, 10 pin ground connection; U25 is a data buffer, 2 to 9 pin of U25 connect 3 to 10 pin of U16 respectively, 18,19,20,21 pin of J1 in the map interlinking 3 of 17,16 pin difference, 13 pin of J1 in the 15 pin map interlinkings 3 of U25,26 pin of J1 in the 14 pin map interlinkings 3 of U25, the end of the 13 pin connecting resistance R1 of U25, another termination power of R1,9 pin of J1 in the 11 pin map interlinkings 3; 5 pin of one termination J6 of resistance R 149,13 pin of U6 among the positive pole of another terminating diode D32 of R149 and Fig. 2; 16 pin of one termination U24 of resistance R 151, the register gating pin of the positive pole of another terminating diode D17 and CF card, also 1 pin of J2 in the map interlinking 3; 15 pin of one termination U24 of resistance R 152, the positive pole of another terminating diode D6 and the resetting pin of CF card are 2 pin of J2 in the map interlinking 3 also; Diode D6, D17, D32, negative pole meet power supply VCC, and U19A, B, C, D are one group of NOR gate, 55 pin of U6 in 2, the 6 pin map interlinkings 2 of U19A, B, 3 pin of U6 in the 3 pin map interlinkings 2,1 pin of U19A connect 5 pin of U19B and 1,2 pin of U20A, 4 pin of U19B, connect 4 pin of U20B, 8 pin of U19C connect 8 pin of U20C, and 9 pin of U19C connect 11 pin of U20D, 10 pin of U19C connect 9 pin of U21C, 11 pin of U19D connect 3 pin of U21A, and 12 pin of U19D connect 6 pin of U21B, and 13 pin of U19D connect 10 pin of U21C; U20A, B, C, D, U21A, B, C, D are two groups of NAND gate, 1,2 pin of U20A connect 1 pin of 19A, and the chip select pin that 3 pin of U20A connect the CF card is 21 pin of J2 in the map interlinking 3 also, and 4 pin of U20B connect 4 pin of U19B, 5 pin of U20B connect 9 pin of U23,6 pin of U20B connect 22 pin of U16, and 8 pin of U20C connect 8 pin of U19C, 9,10 pin of the U20C machine side plate function key of answering the call, 11 pin of U20D connect 9 pin of U19C, U20D12, the 13 pin machine side plate function key of answering the call; 4 pin of 1 pin of U21A, 2 pin of U21A, U21B, 5 pin of the U21B machine side plate function key of also answering the call respectively, 3 pin of U21A connect 11 pin of U19D, 6 pin of U21B connect 12 pin of U19D, 9 pin of U21C connect 10 pin of U19C, 10 pin of U21C connect 13 pin of U19D, the IRQ3 of U6 is 29 pin in the 11 pin map interlinkings 2 of U21D, and 12,13 pin of U21D connect 8 pin of U21C; J6 is single contact pin, 1 pin of J6 connects power supply, the serial data that 2 pin connect modulator-demodulator receives also 18 pin of J1 in the map interlinking 3 of pin, the serial data that 4 pin connect modulator-demodulator sends also 15 pin of J1 in the map interlinking 3 of pin, 3 pin connect 8 pin of U17, and 5 pin connect 1 pin of R149,6 pin ground connection, the IRQ3 of U6 is 29 pin in the 7 pin map interlinkings 2, and the effective pin of data that 8 pin meet CPUU6 is 76 pin.
Advantage of the present utility model is that the interface arrangement of intelligent network telephone is a device that telephone set, facsimile machine, modulator-demodulator, PDA are connected in one.Make intelligent network telephone that the one-machine-multi-function advantage be arranged, as:
1. can make a phone call
2. can send a fax
3. can surf the Net
4. can do PDA(Personal Digital Assistant)
It has functions such as the visiting-card management of carrying out, prompting, notepaper, calendar, universal time, english Chinese dictionary, unit conversion, domestic postcode, trunk code, international long-distance area code.
Description of drawings:
Fig. 1 is the interface arrangement line map
Fig. 2 is a processor CPU line map
Fig. 3 is the interface card connection layout
Fig. 4 is the intelligent network telephone block diagram
Embodiment:
The utility model device is in the intelligent network telephone machine, and it can couple together the mainboard of intelligent network telephone shown in Figure 4, peripheral control circuit one interface, phone and modulator-demodulator three parts.
Display is connected with CPU processor shown in Figure 2 on mainboard, and touch-screen connects touch screen controller, and this three part and other couple together by connector shown in Figure 3.This controller also connects the CPU processor, and the CPU processor is connected with flash memory with flash memory, program with dynamic random access memory, memory, data respectively.
Contain address distributor connection input buffer and output latch on system circuit one interface board outside, and be connected drawer type keyboard under the telephone base, parallel port and CF card, serial ports and infrared mouth also are housed on interface board, and this serial ports is connected with CPU processor and modulator-demodulator by serial port with infrared mouthful.
On modulator-demodulator and telephone circuit plate, the dialing control circuit of phone, conversation control circuit, ring control circuit are connected with the off-hook control circuit respectively, also be connected with modulator-demodulator, and receive on the telephone wire by modulator-demodulator, the CPU processor in the mainboard also is connected transfer control signal with phone.Modulator-demodulator is connected with CPU processor, serial ports, infrared mouth by serial port.The concrete course of work is as follows:
(1) enters and show business card commonly used behind the visiting-card management
(2) can show business card commonly used (except among the editor) at any time
(3) tabulation: list name and ordinary phone, and a hurdle optional information (as unit), point
The phone hurdle can dial.Available " phonetic head " searched and found required name simultaneously.
(4) search: can import keyword, list all relevant business cards immediately
(5) check particulars, can put editor or deletion.
Any list items of point enters in detail to be browsed.
In the phone option, tap, then enter the interface of making a phone call, enter the automatic re-dialing function of making a phone call after determining.
At fax, tap among the E-mail, show and confirm picture, enter corresponding function after determining.
Business card provides: add business card, provide business card data, add tabulation automatically to, name has prompting when repeating.
(6) receive E-mail:
After the E-mail function is received in choosing,, harvest and whether point out off-line behind the E-mail if online is not then dialled up on the telephone.Enter browser then, display list can be by sender, theme, time-sequencing.With the pen point is selection, and drags the screen that can move up and down.This moment, new stamp existed among the RAM.Task E-mai1 adds travel schedule automatically, need call run-length management when browsing; Business card E-mail adds business card automatically, if there is conflict then can point out.Choose mail promptly to show detailed content, can look up the dictionary, also can enter editing mode.
FLASH (CF card) is then put in the some backup.If reception is pointed out and abandoned to Out of Memory.The user can remove partial document and receive again.
Enter information such as back show state, and can end at any time, except that cancellation, do not respond all information this moment, roll off the production line immediately after finishing receiving.When the new E-mail that does not read was arranged, " mail " lamp was glittering.Occur the E-mail tabulation then, not reading has " " mark before the E-mail, has read to be " V ", has slider bar to watch full detail.Details then by any one of the continuous point of this title row, are then checked in the dot leader hurdle, can edit and can save as account or deletion.
(7) send out E-mail:
Can publish E-mail and also can directly publish E-mail in business card, the some cards folder can be searched the address, also direct Input Address.Content can be discerned, and also can directly use person's handwriting.Optional subsidiary PC version read routine during transmission.Online when point sends sends the back that finishes and checks mailbox and off-line.Appended document can be account document, business card, task and any file.
(8) receive fax:
Receiving faxes can answer automatically, and 4 rings do not connect from dynamic response, and the judgement fax tone is then received fax automatically, and LCD shows termination selection button and facsimile message.Get back to screen protection after harvesting, the information lamp is glittering.Automatic-answering back device and the fax received all directly deposits FLASH in." receive fax " option is provided when making a phone call, but manual answering at any time.
1. receive fax origin electricity and show and call, or choosing fax when making a phone call, display message during reception manually received;
2. harvest and return host process after finishing, " fax " lamp is glittering;
3. after " fax ", selecting the fax display list to list incoming call company and time again;
4. enter the information of checking after clicking and to use mouse drag.
(9) send a fax:
Main menu is selected outbox down, publishes fax again.Perhaps in the business card option, publish fax.The available identifier word of faxing, also available original handwriting.And can be to receiving the forwarding of faxing.

Claims (1)

1. one kind with LCDs, touch-screen, touch screen controller, the CPU processor, memory, flash memory, peripheral control circuit, the interface arrangement of the intelligent network telephone that phone and modulator-demodulator couple together, it is characterized in that: this device is by decoder, latch, buffer, backlight chip, register, diode, resistance, electric capacity, NAND gate, NOR gate, compositions such as contact pin, its connected mode is as follows: 1 of decoder U23,2,3 pin meet 82 of processor CPU U6 respectively, 83,84 pin, 4 pin of U23 connect 55 pin of U6,5 pin of U23 connect 79 pin of U6,6 pin of U23 connect 3 pin of U6,15 pin of U23 connect 19 pin of buffer U28,11 pin of U23 connect 19 pin of buffer U17,10 pin of U23 connect 17 pin of U17,9 pin of U23 connect 19 pin of data buffer U27,16 pin of U23 meet power supply VCC, and connecing capacitor C 82 back ground connection, 8 pin of U23 connect digitally; 1,2,3 pin of decoder U22 connect 82,83,84 pin of processor U6 respectively, 4 pin of U22 connect 55 pin of U6,5 pin of U22 connect 80 pin of U6, and 6 pin of U22 connect 3 pin of U6, and 15 pin of U22 connect 11 pin of U26,13 pin of U22 connect 21 pin of U17,12 pin of U22 connect 20 pin of U17, and 10 pin of U22 connect 18 pin of U17, and 16 pin of U22 meet power supply VCC, and connecing capacitor C 75 back ground connection, 8 pin of U22 connect digitally; U16, U17 are the buffers of convertible 3V and 5V level; 1 pin of U16 meets power supply VCC, and connects capacitor C 73 back ground connection; 23,24 pin and the joining power VCC of U16, and connect capacitor C 74 back ground connection; 11,12,13 pin of U16 connect digitally, 22 pin of U16 connect 6 pin of NAND gate U20,2 pin of U16 connect 80 pin of U6,3 pin of U16 connect 3 pin of data latches U24 and 2 pin of data buffer U25,4 pin of U16 connect 4 pin of U24 and 3 pin of U25,5 pin of U16 connect 7 pin of U24 and 4 pin of U25,6 pin of U16 connect 8 pin of U24 and 5 pin of U25,7 pin of U16 connect 13 pin of U24 and 6 pin of U25,8 pin of U16 connect 14 pin of U24 and 7 pin of U25,9 pin of U16 connect 17 pin of U24 and 8 pin of U25, and 10 pin of U16 connect 18 pin of U24 and 9 pin of U25; 1 pin of U17 connects power supply, and connects capacitor C 83 back ground connection, 23,24 pin and the joining powers of U17, connect capacitor C 84 back ground connection again, 11,12, the 13 pin ground connection of U17,2, the 22 pin ground connection of U17,21 pin connect 13 pin of U22, and 20 pin connect 12 pin of U22, and 19 pin connect 11 pin of U23,18 pin connect 10 pin of U22,17 pin connect 10 pin of U23, and 16 pin connect 14 pin of CPU U6, and 6 pin connect 11 pin of U24,7 pin connect 19 pin of U25,3 pin of 8 pin order socket pin J6; U26 is a data latches, the 1 pin ground connection of U26,11 pin connect 15 pin of U22,20 pin connect power supply, 10 pin ground connection, 3,4,7,8,13,14,17,18 pin connect data wire D8 to D15 (66~59) pin of CPU processor U6 respectively, 2,5 pin of the U26 function key control circuit in the machine side plate control circuit of answering the call, 6 pin connect power control circuit, the answer the call backlight chip of machine display screen LCD of 9 pin, 12,15,16,19 pin of U26 connect the data buffer in the panel control circuit respectively, and 20 pin of U26 connect power supply, and 10 pin connect digitally; U27, U28 are data buffers, 19 pin of U28 connect 15 pin of U23, the 1 pin ground connection of U28,2,3,4,5,6,7,8,9 pin of U28 connect data wire D8 to D15 (66~59) pin of CPU U6 respectively, the answer the call function key of machine side plate of 17,18 pin of U28, and 16 pin connect power control circuit, the answer the call backlight chip of machine display screen of 15 pin, 14,13,12, the 11 pin data buffer in the machine side plate control circuit of answering the call, 20 pin connect power supply, and 10 pin connect digitally; 19 pin of data buffer U27 connect 9 pin of U23,1 pin ground connection, 2,3,4,5,6,7,8,9 pin connect data wire D8 to D15 (66~59) pin of CPU U6 respectively, and 18,17,16,15,14,13,12,11 pin of U27 connect the function key in the panel control circuit; U24 is a data latches, 3,4,7,8,13,14,17,18 pin of U24 connect 3 to 10 pin of U16 respectively, 2,5,6 pin of U24 connect 19,20,21 pin of double contact pin J1 respectively, 9 pin of U24 connect 13 pin of double contact pin J1,12 pin connect 26 pin of J1,19 pin connect 9 pin of J1, and 20 pin meet power supply VCC, 10 pin ground connection; U25 is a data buffer, and 2 to 9 pin of U25 connect 3 to 10 pin of U16 respectively, and 18,17,16 pin connect 19,20,21 pin of J1 respectively, 15 pin of U25 connect 13 pin of J1, and 14 pin of U25 connect 26 pin of J1, the end of the 13 pin connecting resistance R1 of U25, another termination power of R1,11 pin connect 9 pin of J1; 5 pin of one termination J6 of resistance R 149, the positive pole of another terminating diode D32 of R149 and 13 pin of CPUU6; 16 pin of one termination U24 of resistance R 151, the register gating pin of the positive pole of another terminating diode D17 and CF card, also 1 pin of connection interface plug-in unit J2; 15 pin of one termination U24 of resistance R 152, the positive pole of another terminating diode D6 and the resetting pin of CF card also connect 2 pin of J2; Diode D6, D17, D32, negative pole meet power supply VCC, and U19A, B, C, D are one group of NOR gate, 2,6 pin of U19A, B connect 55 pin of CPU U6, and 3 pin connect 3 pin of CPU U6, and 1 pin of U19A connects 5 pin of U19B and 1,2 pin of U20A, 4 pin of U19B, connect 4 pin of U20B, 8 pin of U19C connect 8 pin of U20C, and 9 pin of U19C connect 11 pin of U20D, 10 pin of U19C connect 9 pin of U21C, 11 pin of U19D connect 3 pin of U21A, and 12 pin of U19D connect 6 pin of U21B, and 13 pin of U19D connect 10 pin of U21C; U20A, B, C, D, U21A, B, C, D are two groups of NAND gate, 1,2 pin of U20A connect 1 pin of 19A, the chip select pin that 3 pin of U20A connect the CF card is 21 pin of connection interface plug-in unit J2 also, and 4 pin of U20B connect 4 pin of U19B, and 5 pin of U20B connect 9 pin of U23,6 pin of U20B connect 22 pin of U16,8 pin of U20C connect 8 pin of U19C, the answer the call function key control circuit of machine side plate of 9,10 pin of U20C, and 11 pin of U20D connect 9 pin of U19C; U20D12,13 pin, 1 pin of U21A, 2 of U21A, 4,5 pin of U21B all connect panel control circuit, and 3 pin of U21A connect 11 pin of U19D, and 6 pin of U21B connect 12 pin of U19D, 9 pin of U21C connect 10 pin of U19C, 10 pin of U21C connect 13 pin of U19D, and the IRQ3 that 11 pin of U21D meet CPU U6 is 29 pin, and 12,13 pin of U21D connect 8 pin of U21C; J6 is single contact pin, 1 pin of J6 connects power supply, the serial data that 2 pin connect modulator-demodulator receives 18 pin that pin also meets double contact pin J1, the serial data that 4 pin connect modulator-demodulator sends 15 pin that pin also meets J1,3 pin connect 8 pin of U17, and 5 pin connect 1 pin of R149,6 pin ground connection, the IRQ3 that 7 pin meet CPU U6 is 29 pin, and the effective pin of data that 8 pin meet CPU U6 is 76 pin.
CN 00254013 2000-09-27 2000-09-27 Interface device for intelligent network telephone Expired - Fee Related CN2443553Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 00254013 CN2443553Y (en) 2000-09-27 2000-09-27 Interface device for intelligent network telephone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 00254013 CN2443553Y (en) 2000-09-27 2000-09-27 Interface device for intelligent network telephone

Publications (1)

Publication Number Publication Date
CN2443553Y true CN2443553Y (en) 2001-08-15

Family

ID=33611360

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 00254013 Expired - Fee Related CN2443553Y (en) 2000-09-27 2000-09-27 Interface device for intelligent network telephone

Country Status (1)

Country Link
CN (1) CN2443553Y (en)

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