CN2432637Y - Contact logic enciphered card data analysis unit - Google Patents
Contact logic enciphered card data analysis unit Download PDFInfo
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- CN2432637Y CN2432637Y CN 00212670 CN00212670U CN2432637Y CN 2432637 Y CN2432637 Y CN 2432637Y CN 00212670 CN00212670 CN 00212670 CN 00212670 U CN00212670 U CN 00212670U CN 2432637 Y CN2432637 Y CN 2432637Y
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Abstract
The utility model relates to a contact logic enciphered card data analysis unit, which is composed of a main controller, a data memory, an interface circuit, a bilateral analog switch, a card seat, a feed circuit and an IC card analog board. The main controller with a clock oscillating circuit is connected with the data memory, and the output and input signals are respectively connected to the interface circuit, the bilateral analog switch, the card seat and the feed circuit. The card seat and the feed circuit are connected with the bilateral analog switch after connected with the IC card analog board in parallel. The utility model has the advantages of simple structure, low cost and power consumption and small size, can detect and analyse most types of logic enciphered card data and is used for the research and exploitation of the field of the IC card.
Description
The utility model relates to IC-card read-write product, specifically a kind of data analysis set-up of contact logic encryption card.
In the current Contact Type Ic Card type, because logic encryption card has cryptographic check mechanism, must check at first that password just can carry out next step operation in the correct card, so can prevent from data in the card are arbitrarily rewritten, thereby also obtain promotion and application more widely.This class IC-card generally all has an error counter, is used for writing down checking errors number, if mistake reaches stipulated number continuously, card is automatically locked and can not uses again.Though this cryptographic check mechanism can prevent illegal deciphering, also brings great inconvenience for normal scientific research and development, the read-write sequence of encrypted card password area there is mistake slightly, very easily cause the self-locking of IC-card.Usually use logic analyser or multichannel mixed signal storage oscilloscope to catch each contact logic signal of recording of encrypted card, calculate each interval data content of encrypted card according to the sequential relationship between the signal then.This method is subjected to the restriction of instrument sampling channel, sampling rate and storage depth, possibly can't catch and note a lot of complete pass logic signals; And analyzing when calculating, a lot of logical signal is cut apart converted to encrypted card operational order, address date, information data, need again through some complicated loaded down with trivial details calculating.
For solving above deficiency, the purpose of this utility model provides a kind of process of simplifying, and volume is little, the contact logic encryption card data analysis set-up that is easy to carry and uses.
The technical solution of the utility model is as described below: be made up of master controller, data-carrier store, interface circuit, bidirectional analog switch, deck and feed circuit, IC-card analog board, the master controller that has clock oscillation circuit links to each other with data-carrier store, its output input signal is connected to interface circuit, bidirectional analog switch, deck and feed circuit respectively, described deck and feed circuit be connected to the bidirectional analog switch after the IC-card analog board is in parallel, be specially:
Described master controller is connected with clock pin SCL, input pin SI, output pin SO, the chip select pin CS of data-carrier store respectively by input/output port, and described data-carrier store provides the function of initial electrification reset and data recording storage;
Master controller is in parallel with oscillator and first and second electric capacity in the clock oscillation circuit by input/output port XTAL1, XTAL2, and described clock circuit provides the concussion pulse for primary controller, guarantees that primary controller is according to characteristic frequency work;
Described interface circuit is made up of RS232 converter, interface element, the five～eight electric capacity, wherein the reception delivery outlet RD1 of RS232 converter, send input port TD1 and send mouthful RX, a TX with the reception of master controller respectively and is connected, its receive input port RS1, transmission delivery outlet TS1 respectively with the interface element of interface circuit the 4th, crus secunda is connected; The 5th electric capacity two ends are connected with the second positive presser feet C2+, the power supply VCC of RS232 converter, the 6th electric capacity two ends are connected with the first positive presser feet C1+, the first negative pressure pin C1-of RS232 converter, the 7th electric capacity two ends are connected with the 3rd positive presser feet C3+, the 3rd negative pressure pin C3-of RS232 converter, the 8th electric capacity is connected across respectively between the 4th negative pressure pin C4-and ground of RS232 converter, 3 pin ground connection of interface element, described interface circuit is in order to finish the conversion between Transistor-Transistor Logic level and the RS232 level, and master controller and the computing machine information of carrying out that guarantees transmits;
Go here and there respectively after the first～four control pin CTRL1～CTRL4 parallel connection of described bidirectional analog switch the first switch ground connection, the string the tenth resistance meet power supply VCC, its first～the 4th input and output pin IO1～IO4 is connected with the input/output port of master controller, in order to the break-make of data line between control master controller and the IC-card seat, master controller input and output pin state is to the interference of logic encryption card when preventing from normally to use;
Described deck and feed circuit are by first power tube, deck, the second～nine resistance, the 4th electric capacity is formed, wherein: the plug-in card of deck detects pin K1 and is connected with the input/output port of master controller, its clock pin CLK, resetting pin RST, data pin IO, programming pin PGM respectively with the clock pin CLK of IC-card analog board, resetting pin RST, data pin IO, the output input pin OI1～OI4 that connects the bidirectional analog switch after the programming pin PGM parallel connection, the supply pin VCC of deck is connected with the input/output port of master controller by the 3rd resistance after connecting the first power tube collector, the 4th resistance and the 4th electric capacity are parallel between the first power tube collector and the ground, the first power tube base stage is connected with the input/output port of master controller by second resistance, the five～nine resistance inserts the emitter of first power tube and the resetting pin RST of deck respectively, clock pin CLK, plug-in card detects pin K1, programming pin PGM, between the data pin IO, the first power tube emitter is connected with power supply, provides master controller and logic encryption card to carry out the passage of exchanges data;
Described IC-card analog board is mainly made by ultra-thin wiring board, carry out according to the universal standard of Contact Type Ic Card the width size of analog board and contact size, position, its power contact VCC is connected with the supply pin VCC of deck by diode, is used to provide the function of data in simulation Contact Type Ic Card, the detection card;
Described power supply adopts the powered battery mode.
The utlity model has following advantage:
1. simple in structure, with low cost.The utility model makes full use of logic encryption card cryptographic check characteristic, increases IC-card analog board part on the basis of common contact-type IC-card read-write equipment, can intercept data in the record logic encryption card fast.Because project organization is simple, its cost only is 1/tens of logic analyser or a multichannel mixed signal storage oscilloscope.
2. power consumption is humble, and volume is small and exquisite.The utility model is power consumption during use only, and the average power consumption under the normal operating conditions is lower than 20 milliamperes, so adopt cheap powered battery mode.Its size is according to the universal standard of Contact Type Ic Card, and integrated area is less than 100 square centimeters, the small and exquisite exquisiteness of volume.
3. easy and simple to handle, widely applicable.The utility model utilizes the IC-card analog board to replace logic encryption card to insert its normal read write device in use and gets final product, and it is with data in the Auto-Sensing card.This device can be detected the data of analyzing most type logic encryption cards, and adopts the powered battery mode, is widely used in the scientific research and development in IC-card field.
Description of drawings:
Fig. 1 is the utility model circuit theory diagrams.
Fig. 2 is the utility model IC-card analog board part print pattern.
Below in conjunction with accompanying drawing structure of the present utility model and principle of work are described in further detail.
As shown in Figure 1, comprise master controller U1, data-carrier store U2, interface circuit, bidirectional analog switch U4, deck and feed circuit, IC-card analog board U7, the master controller U1 that has clock oscillation circuit links to each other with data-carrier store U2, its output input signal is connected to interface circuit, bidirectional analog switch U4, deck and feed circuit respectively, described deck and feed circuit be connected to bidirectional analog switch U4 after IC-card analog board U7 is in parallel, be specially:
Described master controller U1 is connected with clock pin SCL, input pin SI, output pin SO, the chip select pin CS of data-carrier store U2 respectively by input/output port INT0, INT1, P3.4, P3.5;
Master controller U1 is in parallel with oscillator X1 and first and second capacitor C 1～C2 in the clock oscillation circuit by input/output port XTAL1, XTAL2;
Described interface circuit is made up of RS232 converter U3, interface element U5, the five～eight capacitor C 5～C8, wherein the reception delivery outlet RD1 of RS232 converter U3, send input port TD1 and send mouthful RX, a TX with the reception of master controller U1 respectively and is connected, its receive input port RS1, transmission delivery outlet TS1 respectively with the interface element U5 of interface circuit the 4th, crus secunda is connected; The 5th capacitor C 5 two ends are connected with the second positive presser feet C2+, the power supply VCC of RS232 converter U3, the 6th capacitor C 6 two ends are connected with the first positive presser feet C1+, the first negative pressure pin C1-of RS232 converter U3, the 7th capacitor C 7 two ends are connected with the 3rd positive presser feet C3+, the 3rd negative pressure pin C3-of RS232 converter U3, the 8th capacitor C 8 is connected across respectively between the 4th negative pressure pin C4-and ground GND of RS232 converter U3, the 3 pin ground connection of interface element U5;
Go here and there respectively after the first～four control pin CTRL1～CTRL4 parallel connection of described bidirectional analog switch U4 first switch S, 1 ground connection, the string the tenth resistance R 10 meet power supply VCC, its first～the 4th input and output pin IO1～IO4 is connected with input/output port P1.3, P1.2, P1.1, the P1.0 of master controller U1;
Described deck and feed circuit are by the first power tube P1, deck U6, the second～nine resistance R, 2～R9, the 4th capacitor C 4 is formed, wherein: the plug-in card of deck U6 detects pin K1 and is connected with the input/output port P1.4 of master controller U1, its clock pin CLK, resetting pin RST, data pin IO, programming pin PGM respectively with the clock pin CLK of IC-card analog board U7, resetting pin RST, data pin IO, the output input pin OI1～OI4 that connects bidirectional analog switch U4 after the programming pin PGM parallel connection, the supply pin VCC of deck U6 is connected with the input/output port P1.6 of master controller U1 by the 3rd resistance R 3 after connecting the first power tube P1 collector, the 4th resistance R 4 and the 4th capacitor C 4 are parallel between the first power tube P1 collector and the ground, the first power tube P1 base stage is connected with the input/output port P1.7 of master controller U1 by second resistance R 2, the five～nine resistance R 5～R9 inserts the emitter of the first power tube P1 and the resetting pin RST of deck U6 respectively, clock pin CLK, plug-in card detects pin K1, programming pin PGM, between the data pin IO, the first power tube P1 emitter is connected with power supply;
The power contact VCC of described IC-card analog board U7 is connected with the supply pin VCC of deck U6 by diode D1.
As shown in Figure 2, described IC-card analog board U7 is mainly made by ultra-thin wiring board, and carry out according to the universal standard of Contact Type Ic Card the width size of analog board and contact size, position;
Described power supply adopts the powered battery mode.
Described master controller U1 adopts AT89C2051; Data-carrier store U2 adopts X25045; RS232 converter U3 adopts ICL232; Bidirectional analog switch U4 adopts CD4066.
The utility model principle of work is as follows:
The logic encryption card that at first will need to analyze data inserts IC-card seat U6 of the present utility model, connect the data channel between switch S 1 control bidirectional analog switch U4 cut-out primary controller U1 and the IC-card seat U6, prevent of the interference of the input and output pin state of primary controller U1 logic encryption card; Utilize IC-card analog board U7 to replace logic encryption card to insert its normal read write device then, read-write equipment thereupon by IC-card analog board U7 to logic encryption card power on, sequence of operations such as cryptographic check, reading and writing data; After operating process is finished, extract IC-card analog board U7, at this moment, though the utility model is in disengaged position with read-write equipment, the logic encryption card in the IC-card seat U6 still keeps cryptographic check to pass through state; Last cut-off switch S1 control bidirectional analog switch U4 connects the data channel between primary controller U1 and the IC-card seat U6, primary controller U1 can skip the cryptographic check step, directly the data in the logic encryption card be read and write analysis, and can as required critical data be stored among the data-carrier store U2.
Described master controller U1 also can adopt LG97C2051; Described data-carrier store U2 also can adopt X25165, X25325 or X25645; Described RS232 converter U3 also can adopt MAX232.
Claims (4)
1. contact logic encryption card data analysis set-up, form by master controller (U1), data-carrier store (U2), interface circuit, bidirectional analog switch (U4), deck and feed circuit, IC-card analog board (U7), it is characterized in that: the master controller (U1) that has clock oscillation circuit links to each other with data-carrier store (U2), its output input signal is connected to interface circuit, bidirectional analog switch (U4), deck and feed circuit respectively, described deck and feed circuit be connected to bidirectional analog switch (U4) after IC-card analog board (U7) is in parallel, be specially:
Described master controller (U1) is connected with clock pin SCL, input pin SI, output pin SO, the chip select pin CS of data-carrier store (U2) respectively by input/output port, and described data-carrier store provides the function of initial electrification reset and data recording storage;
Master controller (U1) by the oscillator X1 in input/output port XTAL1, XTAL2 and the clock oscillation circuit and first and second electric capacity (C1～C2) in parallel, described clock circuit provides the concussion pulse for primary controller, the assurance primary controller is according to characteristic frequency work;
Described interface circuit is by RS232 converter (U3), interface element (U5), the five～eight electric capacity (C5～C8) form, wherein the reception delivery outlet RD1 of RS232 converter (U3), send input port TD1 and send mouthful RX, a TX with the reception of master controller (U1) respectively and is connected, its receive input port RS1, transmission delivery outlet TS1 respectively with the interface element (U5) of interface circuit the 4th, crus secunda is connected; The second positive presser feet C2+ of the 5th electric capacity (C5) two ends and RS232 converter (U3), power supply VCC connects, the first positive presser feet C1+ of the 6th electric capacity (C6) two ends and RS232 converter (U3), the first negative pressure pin C1-connects, the 3rd positive presser feet C3+ of the 7th electric capacity (C7) two ends and RS232 converter (U3), the 3rd negative pressure pin C3-connects, the 8th electric capacity (C8) is connected across between the 4th negative pressure pin C4-and ground GND of RS232 converter (U3), 3 pin ground connection of interface element (U5), in order to finish the conversion between Transistor-Transistor Logic level and the RS232 level, master controller (U1) and the computing machine information of carrying out that guarantees transmits;
Go here and there respectively after the first～four control pin CTRL1～CTRL4 parallel connection of described bidirectional analog switch (U4) first switch (S1) ground connection, the string the tenth resistance (R10) meet power supply VCC, its first～the 4th input and output pin IO1～IO4 is connected with the input/output port of master controller (U1), in order to the break-make of data line between control master controller (U1) and the IC-card seat (U6), master controller when preventing from normally to use (U1) input and output pin state is to the interference of logic encryption card;
Described deck and feed circuit are by first power tube (P1), deck (U6), the second～nine resistance (R2～R9), the 4th electric capacity (C4) is formed, wherein: the plug-in card of deck (U6) detects pin K1 and is connected with the input/output port of master controller (U1), its clock pin CLK, resetting pin RST, data pin IO, programming pin PGM respectively with the clock pin CLK of IC-card analog board (U7), resetting pin RST, data pin IO, the output input pin OI1～OI4 that connects bidirectional analog switch (U4) after the programming pin PGM parallel connection, the supply pin VCC of deck (U6) is connected with the input/output port of master controller (U1) by the 3rd resistance (R3) after connecting first power tube (P1) collector, the 4th resistance (R4) and the 4th electric capacity (C4) are parallel between first power tube (P1) collector and the ground, first power tube (P1) base stage is connected with the input/output port of master controller (U1) by second resistance (R2), (R5～R9) inserts the emitter of first power tube (P1) and the resetting pin RST of deck (U6) respectively to the five～nine resistance, clock pin CLK, plug-in card detects pin K1, programming pin PGM, between the data pin IO, first power tube (P1) emitter is connected with power supply, provides master controller and logic encryption card to carry out the passage of exchanges data;
The power contact VCC of described IC-card analog board (U7) is connected with the supply pin VCC of deck (U6) by diode (D1).
2. by the described contact logic encryption card of claim 1 data analysis set-up, it is characterized in that: IC-card analog board (U7) is mainly made by ultra-thin wiring board, carry out according to the universal standard of Contact Type Ic Card the width size of analog board and contact size, position, be used for simulating Contact Type Ic Card, data in the detecting analyzing card;
3. by the described contact logic encryption card of claim 1 data analysis set-up, it is characterized in that: described power supply adopts the powered battery mode.
4. by the described contact logic encryption card of claim 1 data analysis set-up, it is characterized in that: described master controller (U1) adopts AT89C2051 or LG97C2051; Described data-carrier store U2 adopts X25045, X25165, X25325 or X25645; Described RS232 converter (U3) adopts ICL232 or MAX232; Bidirectional analog switch (U4) adopts CD4066.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 00212670 CN2432637Y (en) | 2000-07-19 | 2000-07-19 | Contact logic enciphered card data analysis unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 00212670 CN2432637Y (en) | 2000-07-19 | 2000-07-19 | Contact logic enciphered card data analysis unit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2432637Y true CN2432637Y (en) | 2001-05-30 |
Family
ID=33579135
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 00212670 Expired - Fee Related CN2432637Y (en) | 2000-07-19 | 2000-07-19 | Contact logic enciphered card data analysis unit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2432637Y (en) |
-
2000
- 2000-07-19 CN CN 00212670 patent/CN2432637Y/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: FAMTOM HEGIMA CO., LTD. Free format text: FORMER NAME OR ADDRESS: SHENYANG INST OF AUTOMATION, CHINESE ACADEMY OF SCIENCES |
|
| CP03 | Change of name, title or address |
Address after: South Street in Dongling District of Shenyang city of Liaoning Province, No. 114 110006 Patentee after: Shenyang Xinsong Robert Automation Co., Ltd. Address before: 100003 No. 90, Miyoshi Road, Heping District, Liaoning, Shenyang Patentee before: Shen Yang Automation Inst., Chinese Academy of Sciences |
|
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |