CN2372847Y - Digital TV coding-and-decoding equipment - Google Patents
Digital TV coding-and-decoding equipment Download PDFInfo
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- CN2372847Y CN2372847Y CN 99211502 CN99211502U CN2372847Y CN 2372847 Y CN2372847 Y CN 2372847Y CN 99211502 CN99211502 CN 99211502 CN 99211502 U CN99211502 U CN 99211502U CN 2372847 Y CN2372847 Y CN 2372847Y
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Abstract
The utility model discloses a coding /decoding device for a digital TV, composed of a video coding/decoding unit, an audio coding / decoding unit, a multiplexing unit, a line interface unit, a control unit, etc. The utility model adopts a special chip to realize the video coding/decoding unit and the line interface unit, adopts a digital signal processor DSP to realize the audio coding / decoding unit and the control unit, and adopts a programmable multiplexer to realize the multiplexing connecting unit. The utility model has the advantages of high intellectualized and integrated degree, small size, light weight, convenient application, etc. The utility model is suitable for coding /decoding devices which make images and sounds in communication system.
Description
The utility model relates to the Digital Television coding/decoding apparatus in a kind of communications field, is specially adapted to do in the communication equipment image, sound compression coding and decoding device.
Traditional image transmission means is to adopt analogue transmission in the communication equipment, although the existing at present digital form transmission image communication apparatus that adopts, image data amount is big, and the busy channel bandwidth is big, bring certain difficulty for the manufacturing of communication equipment, and improved the cost and the volume of communication equipment.
The purpose of this utility model is to avoid the weak point in the above-mentioned background technology and a kind of Digital Television coding/decoding apparatus with image, sound compression coding and decoding is provided, and video/audio compressed encoding stream is 64kb/s～2048kb/s.And the utility model also to have an intellectuality, integrated degree height, volume little, in light weight, use characteristics such as convenient.
The purpose of this utility model is achieved in that the coding and decoding video unit 1 that it is made of Video Controller 10 and Video Codec 11, the audio coding decoding unit 2 that Audio Controller 16 and audio codec 17 constitute, Multiplexing Unit 3, line interface unit 4, control unit 5 and power supply 6 are formed, wherein external image signal is come in and gone out and is held A1, A2 comes in and goes out with coding and decoding video unit 1 and holds 1 pin to be connected, external image signal is come in and gone out and is held B1, B2 comes in and goes out with coding and decoding video unit 1 and holds 2 pin to be connected, external image signal is come in and gone out and is held C1 to C8 and coding and decoding video unit 1 discrepancy end, 3 pin to be connected, external image signal is come in and gone out and is held D1 to D4 and coding and decoding video unit 1 discrepancy end, 4 pin to be connected, coding and decoding video unit 1 data/address bus is come in and gone out and is held 5 pin to be connected by data/address bus discrepancy end 1 pin of data/address bus and Multiplexing Unit 3, and coding and decoding video unit 1 control bus discrepancy end 6 pin are held 5 pin with the discrepancy of audio coding decoding unit 2 control buss respectively by control bus, Multiplexing Unit 3 control buss are come in and gone out and are held 4 pin, line interface unit 4 control buss are come in and gone out and are held 4 pin, control unit 5 control buss are come in and gone out and are held 1 pin to be connected in parallel; Wherein the external audio frequency signal is come in and gone out and is held E1, E2 and audio coding decoding unit 2 discrepancy ends, 1 pin to be connected, the external audio frequency signal is come in and gone out and is held F1, F2 and audio coding decoding unit 2 discrepancy ends, 2 pin to be connected, the external audio frequency signal is come in and gone out and is held G1, G2 and audio coding decoding unit 2 discrepancy ends, 3 pin to be connected, and audio coding decoding unit 2 data/address buss discrepancy end 4 pin hold 2 pin to be connected by the data/address bus discrepancy of data/address bus and Multiplexing Unit 3; Multiplexing Unit 3 data/address buss are come in and gone out and are held 3 pin to be connected by data/address bus and line interface unit 4 data/address buss discrepancy end 1 pin; Line interface unit 4 data are come in and gone out and are held 2 pin and external data discrepancy end H1 to H10 to link to each other, and line interface unit 4 data discrepancy end 3 pin hold I1, I2 to link to each other with external data discrepancy; Control unit 5 data are come in and gone out and are held 2 pin and external data discrepancy end J1, J2 to link to each other; Power supply 6 goes out to hold V1, V2, V3, V4 voltage end to go into end with each parts power supply to be connected.
The purpose of this utility model can also reach by following measure:
The utility model Multiplexing Unit 3 by multiplex controller 14 and multiplexer-demultiplexer 15 constitute, line interface unit 4 by line interface controller 12 and line interface 13 constitute, control unit 5 is made of controller 18 and communication interface 19.Wherein the controller 18 in the control unit 5, the Video Controller 10 in the coding and decoding video unit 1, the line controller 12 in the line interface unit 4, the multiplex controller 14 in the Multiplexing Unit 3 and the Audio Controller in the audio coding decoding unit 2 16 constitute Digital Television coding/decoding apparatus control system; The information processing system that constitutes the Digital Television coding/decoding apparatus by the line interface 13 in the Video Codec in the coding and decoding video unit 1 11, the line interface unit 4, multiplexer-demultiplexer 15, audio codec 17 in the audio coding decoding unit 2 and the communication interface 19 in the control unit 5 in the Multiplexing Unit 3; Digital Television coding/decoding apparatus control system middle controller eighteen data bus come in and go out end C2 to C9 pin respectively with Video Controller 10, line controller 12, the data/address bus of multiplex controller 14 and Audio Controller 16 is come in and gone out and is held C2 to C9 pin to be connected in parallel, controller 18 address buss go out to hold C12 to C31 pin respectively with Video Controller 10, line controller 12, the address bus of multiplex controller 14 and Audio Controller 16 goes into to hold C12 to C31 pin to be connected in parallel, controller 18 enable out end C11 pin respectively with Video Controller 10, line controller 12, the enabling of multiplex controller 14 and Audio Controller 16 is connected in parallel into end C11 pin, controller eighteen data read-write control end A13 to A14 pin respectively with Video Controller 10, line controller 12, data read-write control end A13 to the A14 pin of multiplex controller 14 and Audio Controller 16 is connected in parallel, controller 18 control datas are come in and gone out and are held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and communication interface 19, controller 18 control data clocks go out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of communication interface 19, controller 18 goes into to hold the A3 pin, the A5 pin, A7 pin and A9 pin go out to hold V1 with power supply 6 respectively, V2, V3 and V4 voltage end are connected in parallel, and go into to hold A31, the A32 pin is connected with the ground end; Video Controller 10 control datas are come in and gone out and are held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and Video Codec 11, Video Controller 10 control data clocks go out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of Video Codec 11, Video Controller 10 goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected with power supply 6 respectively, goes into to hold A31, A32 pin to be connected with the ground end; Line interface controller 12 control datas are come in and gone out and are held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and line interface 13, line interface controller 12 control data clocks go out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of line interface 13, line controller 12 goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected in parallel with power supply 6 respectively, goes into to hold A31 pin, A32 pin with the ground end and connect; Multiplex controller 14 control datas are come in and gone out and are held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and multiplexer-demultiplexer 15, multiplex controller 14 control data clocks go out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of multiplexer-demultiplexer 15, multiplex controller 14 goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected in parallel with power supply 6 respectively, goes into to hold A31 pin, A32 pin with the ground end and connect; Audio Controller 16 control datas are come in and gone out and are held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and audio codec 17, Audio Controller 16 control data clocks go out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of audio codec 17, Audio Controller 16 goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected in parallel with power supply 6 respectively, goes into to hold A31 pin, A32 pin with the ground end and connect; Video Codec 11 goes into to hold the C9 pin to go out to hold the A9 pin to be connected with multiplexer-demultiplexer 15 in the Digital Television coding/decoding apparatus information processing system, Video Codec 11 goes out to hold the C8 pin to go into to hold the A8 pin to be connected with multiplexer-demultiplexer 15, Video Codec 11 goes into to hold C14, the C15 pin goes out to hold C14 with multiplexer-demultiplexer 15 respectively, the C15 pin connects, Video Codec 11 goes into to hold A11, the A13 pin goes into to hold A1 with external video respectively, B1 connects, Video Codec 11 goes into to hold A15, the A17 pin goes into to hold D1 with external video respectively, D2 connects, Video Codec 11 goes into to hold A19, A21, A23, the A25 pin goes into to hold C1 with external video respectively, C2, C3, C4 connects, Video Codec 11 goes out to hold A30, the A29 pin goes out to hold A2 with external video respectively, B2 connects, Video Codec 11 goes out to hold A9, the A27 pin goes out to hold D3 with external video respectively, D4 connects, Video Codec 11 goes out to hold A7, A3, A1, the A5 pin goes out to hold C8 with external video respectively, C6, C5, C7 connects, and goes into to hold A31, the A32 pin is held with ground and is connect; Line interface 13 clocks go into to hold the C2 pin to go out to hold the A2 pin to be connected with multiplexer-demultiplexer 15 clocks, line interface 13 data go into to hold the C1 pin to go out to hold the A1 pin to be connected with multiplexer-demultiplexer 15 data, line interface 13 clocks go out to hold the C15 pin, the C16 pin goes into to hold the A15 pin with multiplexer-demultiplexer 15 clocks respectively, the A16 pin connects, line interface 13 data go out to hold the C14 pin to go into to hold the A14 pin to be connected with multiplexer-demultiplexer 15 data, line interface 13 data go out to hold the A1 pin, the A2 pin goes out to hold H1 with external data respectively, H2 connects, line interface 13 clocks go out to hold the A3 pin, the A4 pin goes out to hold H3 with external clock respectively, H4 connects, line interface 13 regularly goes into to hold the A5 pin, the A6 pin goes into to hold H5 with external timing respectively, H6 connects, line interface 13 data go into to hold the A7 pin, the A8 pin goes into to hold H7 with external data respectively, H8 connects, line interface 13 clocks go into to hold the A9 pin, the A10 pin goes into to hold H9 with external clock respectively, H10 connects, line interface 13 data go into to hold A19 pin and external data to go into to hold I1 to be connected, line interface 13 data go out to hold A21 pin and external data to go out to hold I2 to be connected, and go into to hold the A31 pin, the A32 pin is held with ground and is connect; Multiplexer-demultiplexer 15 data go into to hold the C1 pin, the C2 pin goes out to hold the A1 pin with audio codec (17) data respectively, the A2 pin connects, multiplexer-demultiplexer 15 regularly goes out to hold the C3 pin, the C4 pin, the C5 pin regularly goes into to hold the A3 pin with audio codec 17 respectively, the A4 pin, the A5 pin connects, multiplexer-demultiplexer 15 clocks go out to hold the C6 pin, the C7 pin goes into to hold the A6 pin with audio codec 17 clocks respectively, the A7 pin connects, multiplexer-demultiplexer 15 data go out to hold the C8 pin, the C9 pin goes into to hold the A8 pin with audio codec 17 data respectively, the A9 pin connects, multiplexer-demultiplexer 15 regularly goes out to hold the C10 pin, the C11 pin, the C12 pin regularly goes into to hold the A10 pin with audio codec 17 respectively, the A11 pin, the A12 pin connects, and goes into to hold the A31 pin, the A32 pin is held with ground and is connect; Audio codec 17 audio frequency go into to hold C14 pin and external audio frequency to go into to hold E1 to be connected, audio codec 17 audio frequency go into to hold C16 pin and external audio frequency to go into to hold F1 to be connected, audio codec 17 audio frequency go into to hold C18 pin and external audio frequency to go into to hold G1 to be connected, audio codec 17 audio frequency go out to hold C19 pin and external audio frequency to go out to hold G2 to be connected, audio codec 17 audio frequency go out to hold A21 pin and external audio frequency to go out to hold E2 to be connected, audio codec 17 audio frequency go out to hold A23 and external audio frequency to go out to hold F2 to be connected, and go into to hold A31 pin, A32 pin with the ground end and connect; Communication interface 19 data of control unit 5 go out to hold C2 pin and external data to go out to hold J2 to be connected, and communication interface 19 data go into to hold C1 pin and external data to go into to hold J1 to be connected, and go into to hold A31 pin, A32 pin with the ground end and connect.
The utility model has been compared following advantage with background technology:
1. the utility model adopts scale programmable logic device in a large number, and therefore integrated degree height has been realized image, sound compression coding and decoding technology, and composite bit stream is 64kb/s～2048kb/s behind the video/audio compressed encoding.
2. the utility model adopts digital signal processing technique in a large number, so intelligent degree height, and volume is little, and is in light weight.
3. the utility model adopts surface mounting technology, and is therefore stable and reliable for performance, easy to use.
4. the utility model is owing to adopt Digital Signal Processing DSP and programming device, and flexible, code stream is that 64kb/s～2048kb/s is variable behind its compressed encoding.
Below in conjunction with accompanying drawing the utility model is described in further detail.
Fig. 1 is an electric functional-block diagram of the present utility model.
Fig. 2 is the electrical schematic diagram of the utility model coding and decoding video unit 1, audio coding decoding unit 2, Multiplexing Unit 3, line interface unit 4, control unit 5.
With reference to Fig. 1, Fig. 2, the utility model is made up of coding and decoding video unit 1, audio coding decoding unit 2, Multiplexing Unit 3, line interface unit 4, control unit 5 and power supply 6.Wherein coding and decoding video unit 1 is made of Video Controller 10 and Video Codec 11, audio coding decoding unit 2 is made of Audio Controller 16 and audio codec 17, Multiplexing Unit 3 is made of multiplex controller 14 and multiplexer-demultiplexer 15, line interface unit 4 is made of line controller 12 and line interface 13, and control unit 5 is made of controller 18 and communication interface 19.Fig. 2 is the embodiment electricity principle connection line figure of the utility model coding and decoding video unit 1, audio coding decoding unit 2, Multiplexing Unit 3, line interface unit 4, control unit 5, and embodiment presses Fig. 2 connection line.
The present embodiment external image signal is come in and gone out and is held A1, A2, B1, B2 is connected to Video Codec 11 discrepancy end A11 to the two-way composite video signal respectively, A30, A13, the A29 pin, external image signal is come in and gone out and is held C1 to C8 respectively the S-VIDEO vision signal to be connected to Video Codec 11 discrepancy end A19, A21, A23, A25, A1, A3, A5, the A7 pin, external image signal is come in and gone out and is held D1 to D4 respectively the RGB component video signal to be connected to Video Codec 11 discrepancy end A15, A17, A9, the A27 pin, Video Codec 11 its effects are converted into digital video signal to analog video signal, then digital video signal is carried out compressed encoding and decoding, again the digital video signal of encoding and decoding is come in and gone out by it and hold C8, C9, C14, the discrepancy end A8 of C15 pin and multiplexer-demultiplexer 15, A9, C14, the C15 pin connects, and the encoding and decoding digital video signal is carried out multiple connection and tap.Embodiment Video Codec 11 adopts VP2611 to VP2614 type integrated package to make, the compression coding and decoding of Video Codec 11 is subjected to Video Controller 10 controls, Video Controller 10 its effect control figure video video signal compression encoding and decoding, control signal are come in and gone out by Video Controller 10 and are held A20, A21 pin to be connected to Video Codec 11 discrepancy end C20, C21 pin.Embodiment Video Controller 10 adopts commercially available TMS320C25 type integrated package to make.
Embodiment the utility model external audio frequency signal is come in and gone out and is held E1, E2 is connected to audio codec 17 discrepancy end C14 to the analogue audio frequency line signal, the A21 pin, the external audio frequency signal is come in and gone out and is held F1, F2 is connected to audio codec 17 discrepancy end C16 to the analogue audio frequency microphone signal, the A23 pin, the external audio frequency signal is come in and gone out and is held G1, G2 is connected to audio codec 17 discrepancy end C18 to the analogue audio frequency telephone signal, the C19 pin, audio codec 17 its effects are that simulated audio signal is converted into digital audio and video signals, then to digital coding audio signal and decoding, again the encoding and decoding digital audio and video signals is connected with discrepancy end C1 to the C12 pin of multiplexer-demultiplexer 15 by its end A1 to A12 pin of coming in and going out, the encoding and decoding digital audio and video signals is carried out subdivision connect, embodiment audio codec 17 adopts commercially available MC145557, NC145532 and TMS320C31 type integrated package are made.The encoding and decoding of audio codec 17 are subjected to Audio Controller 16 controls, Audio Controller 16 its effects are that audio codec is controlled, audio control signal is come in and gone out by Audio Controller 16 and is held A20, A21 pin to be connected to audio codec 17 discrepancy end C20, C21 pin, and embodiment Audio Controller 16 adopts commercially available EPM7132 type programmable logic device to make.
Multiplexer-demultiplexer 15 in the utility model Multiplexing Unit 3 adopts commercially available TMS320C50 integrated package and EPM9320 programmable logic device to make, its effect is multiplexed to a composite bit stream to video and the audio coding signal after compressing, simultaneously the composite bit stream that receives is divided and be connected into video codes, audio code input video codec 11 and audio codec 17, the A8 of multiplexer-demultiplexer 15 wherein, the C8 of A9 pin and Video Codec 11, the C9 pin connects delivers to the multiplexer multiple connection with video data encoder, the C14 of multiplexer-demultiplexer 15, the C14 of C15 pin and Video Codec 11, the C15 pin connects the video code flow that tap is obtained and delivers to Video Decoder, multiplexer-demultiplexer 15 data go into to hold C1, the C2 pin goes out to hold A1 with audio codec 17 data respectively, the A2 pin connects, multiplexer-demultiplexer 15 regularly goes out to hold C3, C4, the C5 pin regularly goes into to hold A3 with audio codec 17 respectively, A4, the A5 pin connects, multiplexer-demultiplexer 15 clocks go out to hold C6, the C7 pin goes into to hold A6 with the clock of audio codec 17 respectively, the A7 pin connects, the data of multiplexer-demultiplexer 15 go out to hold C8, the C9 pin goes into to hold A8 with the data of audio codec 17 respectively, the A9 pin connects, multiplexer-demultiplexer 15 regularly goes out to hold C10, C11, the C12 pin goes into to hold A10 with the timing of audio codec 17 respectively, A11, the A12 pin connects, audio frequency after will encoding by above-mentioned connection is delivered to multiplexer, the audio frequency that tap is obtained is delivered to audio decoder simultaneously, multiplexer-demultiplexer 15 clock signals go out to hold the A2 pin to go into to hold the C2 pin to be connected with line interface 13 clocks, multiplexer-demultiplexer 15 clocks go into to hold A15, A16 pin and line interface 13 clocks go out to hold C15, the C16 pin connects, multiplexer-demultiplexer 15 data go out to hold the A1 pin to go into to hold the C1 pin to be connected with line interface 13 data, data go into to hold the A14 pin to go out to hold the C14 pin to be connected with line interface 13 data, make clock and data-signal input and output multiplexer-demultiplexer 15.Multiplex controller 14 in the Multiplexing Unit 3 adopts commercially available EPM9320 programmable logic device to make, and its effect taps into row control to subdivision of multiplexer-demultiplexer 15, and subdivision connects control signal come in and go out end A20, A21 pin input multiplexer-demultiplexer 15 come in and go out end C20, C21 pin.
Line interface 13 embodiment in the utility model line interface unit 4 adopt commercially available BT8510 type integrated package to make, its effect converts the E1 interface of standard or the RS422 interface output of standard to the Voice ﹠ Video code stream after multiplexer-demultiplexer 15 multiple connections, and the Voice ﹠ Video code stream that E1 interface or RS422 interface from standard are received converts tap code stream input multiplexer-demultiplexer 15 to simultaneously.Voice ﹠ Video code stream after multiplexer-demultiplexer 15 multiple connections goes out to hold A1 pin incoming line interface 13 data to go into to hold the C1 pin by data, and line interface 13 converts the E1 interface to by the output of A21 pin, converts the RS422 interface to by A1, A2, A3, A4, A5 and the output of A6 pin.Line interface 13 standard E1 interface Voice ﹠ Videos input A19 pin, the input of standard RS422 interface Voice ﹠ Video code stream A7, A8, A9, A10 pin, the Voice ﹠ Video composite bit stream after line interface 13 interface conversion is by the A14 pin of C14 input multiplexer-demultiplexer 15.Line interface 13 carries out interface conversion by line controller 12 controls, line controller 12 its effects are controlled line interface 13 interface conversion, embodiment adopts commercially available 89C51 type integrated package to make, and control signal is by its A20, A21 pin incoming line interface 13 interface control end C20, C21 pin.
Communication interface 19 embodiment in the utility model control unit 5 adopt commercially available MC1488, MC1489 type integrated package to make, and its effect communicates with external webmaster, and network management communication is from C1, the input and output of C2 pin.Controller 18 embodiment in the utility model unit 5 adopt commercially available TMS320C50 type integrated package to make, its effect is that the operating process of entire equipment is controlled, controller eighteen data control signal is by C2 to C9 pin difference input video controller 10, line controller 12, the data-signal of multiplex controller 14 and Audio Controller 16 is come in and gone out and is held C2 to C9 pin, controller 18 address control signals are by C12 to C31 pin difference input video controller 10, line controller 12, the address signal of multiplex controller 14 and Audio Controller 16 is come in and gone out and is held C12 to C31 pin, the control signal that enables of controller 18 is distinguished input video controller 10 by the C11 pin, line controller 12, multiplex controller 14 and Audio Controller 16 enable pin into end C11, the data read-write control signal of controller 18 is by A13, the A14 pin is input video controller 10 respectively, line controller 12, the data read-write control end A13 of multiplex controller 14 and Audio Controller 16, the A14 pin.
The utility model power supply 6 embodiment adopt the self-control of general D.C. regulated power supply circuit to form, and its output V1 voltage be+5V, V2 voltage be-12V for-5V, V3 voltage for+12V, V4 voltage, and each road circuit is gone into to hold with each step voltage accordingly and is connected.
The utility model embodiment constitutes Digital Television coding/decoding apparatus control system by multiplex controller 14 in line controller 12, the Multiplexing Unit 3 in Video Controller 10, the line interface unit 4 in control unit 5 middle controllers 18, the coding and decoding video unit 1 and audio coding decoding unit 2 sound intermediate frequency controllers 16.Control unit 5 is central processing units of Digital Television coding/decoding apparatus, it is sent to Video Controller 10, line controller 12, multiplex controller 14 and Audio Controller 16 by controller 18 with control information, with status messages control unit 5, finish the configuration of Digital Television coding/decoding apparatus, initialization, process control, failure diagnosis and communication protocol and handle simultaneously.
The utility model embodiment constitutes Digital Television coding/decoding apparatus information processing system by communication interface 19 in multiplexer-demultiplexer 15, the control unit 5 in line interface 13, the Multiplexing Unit 3 in Video Codec 11, audio coding decoding unit 2 sound intermediate frequency codecs 17, the line interface unit 4 in the coding and decoding video unit 1.The subdivision that this information system is finished image compression encoding and decoding, sound encoding and decoding, video/audio digital code stream connects and interface conversion.Video Codec 11 is finished video source selection, video a/d, format conversion, video compression coding and inverse process thereof; Line interface 13 is finished the TTL code stream and is converted RS422 interface or E1 interface and inverse process thereof to; Multiplexer-demultiplexer 15 is finished information multiple connection and taps such as video data, voice data; G.711 audio codec 17 is finished and the audio coding decoding of standard G.728; Communication interface 19 is finished and outside network management communication.
The concise and to the point operation principle of the utility model is as follows: in the time will communicating the signal transmission, each road analog video signal is passed through input A1, B1, C1 to C4 or D1 to D2 input video codec 11, Video Codec 11 converts analog video signal to digital video signal, and carries out compressed encoding.Simulated audio signal is by input E1, F1 or G1 input audio codec 17, and audio codec 17 converts simulated audio signal to digital audio and video signals, and carries out audio coding.Video after encoded, audio code stream input multiplexer-demultiplexer 15 carry out video code flow, audio code stream multiple connection.Be multiplexed to composite bit stream incoming line interface 13, convert the E1 interface or the RS422 interface of standard to, send finishing signal in this code stream input transmission line by line interface 13.In the time will carrying out the signal reception, the composite audio that receives from transmission line, video code flow pass through the E1 interface or the RS422 interface incoming line interface 13 of standard, composite bit stream was imported multiplexer-demultiplexer 15 after via line interface 13 carried out interface conversion, tap audio frequency character code stream and digital video code stream, digital audio code stream input audio codec 17 is carried out audio decoder, obtain simulated audio signal input external loudspeaker.Digital video bit stream input video codec 11 is carried out video decode, obtain analog video signal input external connection monitors and show, finish the communication process of this equipment.
The utility model mounting structure is as follows: the utility model Fig. 1, all components and parts among Fig. 2 are installed in the printed board of 5 block lengths * wide 400 * 320mm of being, connection line between 5 printed boards connects by a motherboard, then printed board and motherboard are installed in the cabinet that wide * height * length is 482 * 177 * 500mm, the LCDs of installation and control device 18 on the front panel of cabinet, control operation keyboard and mains switch, the power input socket of power supply 6 is installed on the cabinet rear board, the audio interface socket, video interface socket and line interface socket, the input and output audio frequency, vision signal, the assembly cost utility model.
Claims (2)
1. coding and decoding video unit (1) that constitutes by Video Controller (10) and Video Codec (11), the audio coding decoding unit (2) that Audio Controller (16) and audio codec (17) constitute, the Digital Television coding/decoding apparatus that power supply (6) is formed, it is characterized in that Multiplexing Unit (3) in addition, line interface unit (4), control unit (5) is formed, wherein external image signal is come in and gone out and is held A1, A2 comes in and goes out with coding and decoding video unit (1) and holds 1 pin to be connected, external image signal is come in and gone out and is held B1, B2 comes in and goes out with coding and decoding video unit (1) and holds 2 pin to be connected, external image signal is come in and gone out and is held C1 to C8 and coding and decoding video unit (1) discrepancy end 3 pin to be connected, external image signal is come in and gone out and is held D1 to D4 and coding and decoding video unit (1) discrepancy end 4 pin to be connected, coding and decoding video unit (1) data/address bus is come in and gone out and is held 5 pin to be connected by data/address bus discrepancy end 1 pin of data/address bus and Multiplexing Unit (3), and coding and decoding video unit (1) control bus discrepancy end 6 pin are held 5 pin with the discrepancy of audio coding decoding unit (2) control bus respectively by control bus, Multiplexing Unit (3) control bus is come in and gone out and is held 4 pin, line interface unit (4) control bus is come in and gone out and is held 4 pin, control unit (5) control bus is come in and gone out and is held 1 pin to be connected in parallel; Wherein the external audio frequency signal is come in and gone out and is held E1, E2 and audio coding decoding unit (2) discrepancy end 1 pin to be connected, the external audio frequency signal is come in and gone out and is held F1, F2 and audio coding decoding unit (2) discrepancy end 2 pin to be connected, the external audio frequency signal is come in and gone out and is held G1, G2 and audio coding decoding unit (2) discrepancy end 3 pin to be connected, and audio coding decoding unit (2) data/address bus discrepancy end 4 pin hold 2 pin to be connected by the data/address bus discrepancy of data/address bus and Multiplexing Unit (3); Multiplexing Unit (3) data/address bus is come in and gone out and is held 3 pin to be connected by data/address bus and line interface unit (4) data/address bus discrepancy end 1 pin; Line interface unit (4) data are come in and gone out and are held 2 pin and external data discrepancy end H1 to H10 to link to each other, and line interface unit (4) data discrepancy end 3 pin hold I1, I2 to link to each other with external data discrepancy; Control unit (5) data are come in and gone out and are held 2 pin and external data discrepancy end J1, J2 to link to each other; Power supply (6) goes out to hold V1, V2, V3, V4 voltage end to go into end with each parts power supply to be connected.
2. a kind of Digital Television coding/decoding apparatus according to claim 1 is characterized in that Multiplexing Unit (3) is made of multiplex controller (14) and multiplexer-demultiplexer (15); Line interface unit (4) is made of line controller (12) and line interface (13); Control unit (5) is made of controller (18) and communication interface (19), wherein constitutes Digital Television coding/decoding apparatus control system by the controller (18) in the control unit (5), the Video Controller (10) in coding and decoding video unit (1), the line controller (12) in the line interface unit (4), multiplex controller (14) and the Audio Controller (16) in audio coding decoding unit (2) in the Multiplexing Unit (3); Constitute Digital Television coding/decoding apparatus information processing system by the Video Codec (11) in coding and decoding video unit (1), the line interface (13) in the line interface unit (4), the multiplexer-demultiplexer (15) in the Multiplexing Unit (3), audio codec (17) and the communication interface (19) in the control unit (5) in audio coding decoding unit (2); Digital Television coding/decoding apparatus control system middle controller (18) data/address bus come in and go out end C2 to C9 pin respectively with Video Controller (10), line controller (12), the data/address bus of multiplex controller (14) and Audio Controller (16) is come in and gone out and is held C2 to C9 pin to be connected in parallel, controller (18) address bus go out to hold C12 to C31 pin respectively with Video Controller (10), line controller (12), the address bus of multiplex controller (14) and Audio Controller (16) goes into to hold C12 to C31 pin to be connected in parallel, controller (18) enable out end C11 pin respectively with Video Controller (10), line controller (12), the enabling of multiplex controller (14) and Audio Controller (16) is connected in parallel into end C11 pin, controller (18) data read-write control end A13 to A14 pin respectively with Video Controller (10), line controller (12), data read-write control end A13 to the A14 pin of multiplex controller (14) and Audio Controller (16) is connected in parallel, controller (18) control data is come in and gone out and is held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and communication interface (19), controller (18) control data clock goes out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of communication interface (19), controller (18) goes into to hold the A3 pin, the A5 pin, A7 pin and A9 pin go out to hold V1 with power supply (6) respectively, V2, V3 and V4 voltage end are connected in parallel, and go into to hold A31, the A32 pin is connected with the ground end; Video Controller (10) control data is come in and gone out and is held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and Video Codec (11), Video Controller (10) control data clock goes out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of Video Codec (11), Video Controller (10) goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected with power supply (6) respectively, goes into to hold A31, A32 pin to be connected with the ground end; Line interface controller (12) control data is come in and gone out and is held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and line interface (13), line interface controller (12) control data clock goes out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of line interface (13), line controller (12) goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected in parallel with power supply (6) respectively, goes into to hold A31 pin, A32 pin with the ground end and connect; Multiplex controller (14) control data is come in and gone out and is held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and multiplexer-demultiplexer (15), multiplex controller (14) control data clock goes out to hold A2 1 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of multiplexer-demultiplexer (15), multiplex controller (14) goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected in parallel with power supply (6) respectively, goes into to hold A31 pin, A32 pin with the ground end and connect; Audio Controller (16) control data is come in and gone out and is held the A20 pin to be connected by the data discrepancy end C20 pin of control data line and audio codec (17), Audio Controller (16) control data clock goes out to hold the A21 pin to go into to hold the C21 pin to be connected by the control data clock line with the control data clock of audio codec (17), Audio Controller (16) goes into to hold A3 pin, A5 pin, A7 pin and A9 pin to go out to hold V1, V2, V3 and V4 voltage end to be connected in parallel with power supply (6) respectively, goes into to hold A31 pin, A32 pin with the ground end and connect; Video Codec (11) goes into to hold the C9 pin to go out to hold the A9 pin to be connected with multiplexer-demultiplexer (15) in the Digital Television coding/decoding apparatus information processing system, Video Codec (11) goes out to hold the C8 pin to go into to hold the A8 pin to be connected with multiplexer-demultiplexer (15), Video Codec (11) goes into to hold C14, the C15 pin goes out to hold C14 with multiplexer-demultiplexer (15) respectively, the C15 pin connects, Video Codec (11) goes into to hold A11, the A13 pin goes into to hold A1 with external video respectively, B1 connects, Video Codec (11) goes into to hold A15, the A17 pin goes into to hold D1 with external video respectively, D2 connects, Video Codec (11) goes into to hold A19, A21, A23, the A25 pin goes into to hold C1 with external video respectively, C2, C3, C4 connects, Video Codec (11) goes out to hold A30, the A29 pin goes out to hold A2 with external video respectively, B2 connects, Video Codec (11) goes out to hold A9, the A27 pin goes out to hold D3 with external video respectively, D4 connects, Video Codec (11) goes out to hold A7, A3, A1, the A5 pin goes out to hold C8 with external video respectively, C6, C5, C7 connects, and goes into to hold A31, the A32 pin is held with ground and is connect; Line interface (13) clock goes into to hold the C2 pin to go out to hold the A2 pin to be connected with multiplexer-demultiplexer (15) clock, line interface (13) data go into to hold the C1 pin to go out to hold the A1 pin to be connected with multiplexer-demultiplexer (15) data, line interface (13) clock goes out to hold the C15 pin, the C16 pin goes into to hold the A15 pin with multiplexer-demultiplexer (15) clock respectively, the A16 pin connects, line interface (13) data go out to hold the C14 pin to go into to hold the A14 pin to be connected with multiplexer-demultiplexer (15) data, line interface (13) data go out to hold the A1 pin, the A2 pin goes out to hold H1 with external data respectively, H2 connects, line interface (13) clock goes out to hold the A3 pin, the A4 pin goes out to hold H3 with external clock respectively, H4 connects, line interface (13) regularly goes into to hold the A5 pin, the A6 pin goes into to hold H5 with external timing respectively, H6 connects, line interface (13) data go into to hold the A7 pin, the A8 pin goes into to hold H7 with external data respectively, H8 connects, line interface (13) clock goes into to hold the A9 pin, the A10 pin goes into to hold H9 with external clock respectively, H10 connects, line interface (13) data go into to hold A19 pin and external data to go into to hold I1 to be connected, line interface (13) data go out to hold A21 pin and external data to go out to hold I2 to be connected, and go into to hold the A31 pin, the A32 pin is held with ground and is connect; Multiplexer-demultiplexer (15) data go into to hold the C1 pin, the C2 pin goes out to hold the A1 pin with audio codec (17) data respectively, the A2 pin connects, multiplexer-demultiplexer (15) regularly goes out to hold the C3 pin, the C4 pin, the C5 pin regularly goes into to hold the A3 pin with audio codec (17) respectively, the A4 pin, the A5 pin connects, multiplexer-demultiplexer (15) clock goes out to hold the C6 pin, the C7 pin goes into to hold the A6 pin with audio codec (17) clock respectively, the A7 pin connects, multiplexer-demultiplexer (15) data go out to hold the C8 pin, the C9 pin goes into to hold the A8 pin with audio codec (17) data respectively, the A9 pin connects, multiplexer-demultiplexer (15) regularly goes out to hold the C10 pin, the C11 pin, the C12 pin regularly goes into to hold the A10 pin with audio codec (17) respectively, the A11 pin, the A12 pin connects, and goes into to hold the A31 pin, the A32 pin is held with ground and is connect; Audio codec (17) audio frequency goes into to hold C14 pin and external audio frequency to go into to hold E1 to be connected, audio codec (17) audio frequency goes into to hold C16 pin and external audio frequency to go into to hold F1 to be connected, audio codec (17) audio frequency goes into to hold C18 pin and external audio frequency to go into to hold G1 to be connected, audio codec (17) audio frequency goes out to hold C19 pin and external audio frequency to go out to hold G2 to be connected, audio codec (17) audio frequency goes out to hold A21 pin and external audio frequency to go out to hold E2 to be connected, audio codec (17) audio frequency goes out to hold A23 and external audio frequency to go out to hold F2 to be connected, and goes into to hold A31 pin, A32 pin with the ground end and connect; Communication interface (19) data of control unit (5) go out to hold C2 pin and external data to go out to hold J2 to be connected, and communication interface (19) data go into to hold C1 pin and external data to go into to hold J1 to be connected, and go into to hold A31 pin, A32 pin with the ground end and connect.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99211502 CN2372847Y (en) | 1999-05-28 | 1999-05-28 | Digital TV coding-and-decoding equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99211502 CN2372847Y (en) | 1999-05-28 | 1999-05-28 | Digital TV coding-and-decoding equipment |
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| Publication Number | Publication Date |
|---|---|
| CN2372847Y true CN2372847Y (en) | 2000-04-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 99211502 Expired - Fee Related CN2372847Y (en) | 1999-05-28 | 1999-05-28 | Digital TV coding-and-decoding equipment |
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| CN (1) | CN2372847Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101601283B (en) * | 2007-01-10 | 2012-06-06 | Lg电子株式会社 | Image signal processing apparatus for detaching a plurality of modules and control method thereof |
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1999
- 1999-05-28 CN CN 99211502 patent/CN2372847Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101601283B (en) * | 2007-01-10 | 2012-06-06 | Lg电子株式会社 | Image signal processing apparatus for detaching a plurality of modules and control method thereof |
| US8842224B2 (en) | 2007-01-10 | 2014-09-23 | Lg Electronics Inc. | Image signal processing apparatus for detaching a plurality of modules and control method thereof |
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