CN2361834Y - Storage depth measuring apparatus - Google Patents

Storage depth measuring apparatus Download PDF

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Publication number
CN2361834Y
CN2361834Y CN99201305U CN99201305U CN2361834Y CN 2361834 Y CN2361834 Y CN 2361834Y CN 99201305 U CN99201305 U CN 99201305U CN 99201305 U CN99201305 U CN 99201305U CN 2361834 Y CN2361834 Y CN 2361834Y
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China
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pin
meet
circuit
ground connection
termination
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CN99201305U
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Chinese (zh)
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杨景海
刘得军
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No2 Oil Production Factory Daqing Petroleum Administration
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No2 Oil Production Factory Daqing Petroleum Administration
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Abstract

The utility model relates to a storage depth measuring apparatus. The output ends of a pulse shaping circuit and a direction identifying circuit are connected with 1, 2, and 3 feet of CPU. The output end of a controlling circuit 2 of a single-chip computer is connected with a keyboard interface circuit 4. The input end of a driving circuit for a liquid crystal display is respectively connected with an LCD, a WR, and an RD. The output end of the driving circuit for a liquid crystal display is connected with a liquid crystal display 12. The input end of the keyboard interface circuit 4 is connected with a data bus line of a U2. The output end of the keyboard interface circuit 4 is connected with a keyboard 9. The output end of a serial communication interface circuit 5 is connected with the CPU. The input end of the serial communication interface circuit 5 is connected with a PC. The output end of a data storage card 6 is connected with the CPU. The utility model can automatically and accurately store and display test well depth and closing time of a well.

Description

The memory-type depth calibrator
The utility model belongs to the measuring apparatus of oil well depth.
At present, it mostly is following to the down-hole desired depth mechanical manometer enrolling well test data at the scene, then shut-in pressure survey power recovery curve.Calculate by pressure build-up curve being carried out quantitative analysis, thereby obtain formation pressure data.This shows that stratum dynamic parameters such as record strata pressure have significance to the explanation precision that improves well test data.For this reason, construction must be accomplished 2 points at the scene: 1, operating personnel must arrive desired depth down with mechanical manometer exactly.Want accurately when 2, the mechanical pressure timing clock is walked.Yet, in the test because artificial factor, make that well depth and the actual depth of setting filled in are inconsistent, bring very mistake for the calculating of strata pressure, simultaneously, winch tachometer fault, mechanical pressure timing clock are inaccurate etc. all multifactor when walking, and all will the calculating of strata pressure be produced a very large impact.
The purpose of this utility model is a kind of memory-type depth calibrator of development, this measuring instrument should be able to be automatically, store, show the well testing degree of depth and closed-in time exactly, this measuring instrument should be able to guarantee that also operating personnel are lowered into desired depth with pressure gauge simultaneously, and the playback degree of depth at any time---time curve.
The utility model is made up of shaping pulse and sensing circuit 1, single chip machine controlling circuit 2, the drive circuit 3 of LCD, keyboard interface circuit 4, serial interface circuit 5, data storage card 6, warning circuit 7, housing 8, film touch keyboard 9, depth transducer 10, LCD 12.Depth transducer 10 is a kind of photoelectric encoders, its output is connected on the input of shaping pulse and sensing circuit 1, an output of shaping pulse and sensing circuit connects 2 pin and 3 pin of CPU in the single chip machine controlling circuit 2,1 pin of another output termination CPU, single chip machine controlling circuit 2 is formed the output termination keyboard interface circuit 4 of single chip machine controlling circuit 2 by the real-time clock data memory of CPU, address latch, memory under program, self-contained battery, automatic electrification reset chip.The drive circuit 3 of LCD is by four NAND gate drivers, plug-in unit J 1Form, three inputs of four NAND gates connect the LCD chip selection signal respectively, write gate signal, read strobe signal, plug-in unit J 1Output termination LCD LCD 12.Keyboard interface circuit 4 is by keyboard interface integrated chip, two decoder chip, plug-in unit J 2Form.Plug-in unit J 2Output termination film touch keyboard 9, the input of keyboard interface integrated chip connects the data/address bus of single chip machine controlling circuit 2.Serial interface circuit 5 is served as by the RS-232 interface chip, and its output meets the CPU of single chip machine controlling circuit 2, its input termination PC.Data-storing card 6 is made up of a storage chip and a bayonet socket, and the output of bayonet socket is connected with CPU, and the core devices of storage card is a serial E 2The PROM chip.Warning circuit is made up of an amplifier and a buzzer.Amplifier input terminal is connected with CPU.The drive circuit 3 of shaping pulse and sensing circuit 1, single chip machine controlling circuit 2, LCD, keyboard interface circuit 4, serial interface circuit 5, warning circuit 7 are all adorned solid in housing 8.LCD 12 is fixed on the front panel 14 of housing 8, and data storage card is plugged on 15 the socket 16 of going to the bottom of housing 8.
The utility model energy real time record, the storage well testing degree of depth be rule over time, so that the well testing operation is monitored in real time, for the explanation precision that improves well test data provides the necessary base data.Also can preset and store important informations such as well testing pound sign, testDate, well testing teams and groups, the warning degree of depth in real time, simultaneously also can be by presetting the pulley girth, so that eliminate the depth error that the invar silk causes the wearing and tearing of pulley.Serial line interface and PC are online, and this instrument is the playback degree of depth at any time just---time curve.Playback interfaces adopts the menu in Chinese prompting, thereby can make things convenient for execute-in-place.Can answer deceleration-operation with alert at some important interval at the 50m that presets the warning degree of depth with interior warning.The liquid crystal display window adopts wide temperature, backlight type design, thereby is convenient to measure at low temperature environment and night.This instrument has plug-in storage card again, stores data simultaneously inside and outside can realizing, after the examination of a bite well surveying finished, the card storage of replacing external memory just can realize the test assignment to another mouthful well, thereby has improved operating efficiency.This instrument carries real-time clock, continuously-running about 10 years under powering-off state, and data such as year, month, day, hour, min, second are provided at any time, but thereby the buildup time of this closing well of accurate recording between driving a well to next time.This instrument environment for use temperature is-20 ℃～+ 70 ℃, and measurement category is 0～5000m, and resolution ratio is ± 0.1m, and the degree of depth is modified to ± 1 ‰～± 9 ‰, and memory capacity is 4000 groups of data, and clock device error is less than 1 second, time in sampling interval 1-99 second.
Fig. 1 is the whole theory diagram of the utility model, and Fig. 2 is the utility model housing outline drawing, and Fig. 3 is the utility model electrical block diagram.
Embodiment: present embodiment is made up of shaping pulse and sensing circuit 1, single chip machine controlling circuit 2, the drive circuit 3 of LCD, keyboard interface circuit 4, serial interface circuit 5, data storage card 6, warning circuit 7, housing 8, film touch keyboard 9, depth transducer 10, LCD 12.Depth transducer 10 is a kind of photoelectric encoders, and its output is connected on the input of shaping pulse and sensing circuit 1, and shaping pulse and sensing circuit 1 are by the pulse orientation identification circuit U of forming with door A, B 11, also have the pulse shaper U that forms by d type flip flop 13Form.With the A phase output terminal of the input termination photoelectric encoder 10 of door A, with the CLK end of the output termination d type flip flop of door A, i.e. 3 pin, B phase output terminal with the input termination photoelectric encoder 10 of door B, with the D input of the output termination d type flip flop of door B, i.e. 5 pin meet the U of single chip machine controlling circuit 2 simultaneously again 1P 1.0End, i.e. 1 pin.Select the CD405D model for use with door A, B, the Q end of d type flip flop, promptly 2 pin meet U 1P 1.1And P 1.2End, i.e. 2 pin and 3 pin.D type flip flop is selected 4013 models for use.Single chip machine controlling circuit 2 is by U 1Serve as CPU, U 2Serve as address latch, U 3Serve as memory under program EPROM, U 4Serve as data memory, U 10Serve as automatic electrification reset device and form.U 10Select the TL7705CP model for use, U 102,7,8 pin meet power supply V Cc, 4 pin ground connection are connected in series capacitor C between 1 pin and the ground 8, be connected in series capacitor C between 3 pin and the ground 1, 6 pin meet U 1RST end, i.e. 9 pin, U 106 pin and ground between be in series with resistance R 4U 1Select 8032 models for use, U 1X 1, X 2(promptly between 18 pin and 19 pin) are serially connected with crystal oscillator J between the end, and the two ends of crystal oscillator J are to being serially connected with capacitor C between the ground respectively 2, C 3, U 18 P 00～P 07End (i.e. 32～39 pin) connects data/address bus, U 18 P 20～P 27End (i.e. 21～28 pin) ground connection location bus, U 1ALE/ P end (i.e. 30 pin) meet U 2LE end (i.e. 11 pin), U 1PSEM end (i.e. 29 pin) meet U 3OE end (i.e. 22 pin).U 2Select the 74HC373 model for use, U 28 D 0～D 7End (i.e. 3,4,7,8,13,14,17,18 pin) connects data/address bus, U 28 Q 0～Q 7End (i.e. 2,5,6,9,12,15,16,19 pin) ground connection location bus, U 2The i.e. 1 pin ground connection of OE end.U 3Select the 27C128/256 model, U 314 A 0～A 13End (i.e. 2～10 pin, 21 pin, 23～26 pin) ground connection location bus, U 38 D 0～D 7End (i.e. 11～18 pin) connects data/address bus.U 3The i.e. 20 pin ground connection of CE end, U 3PQR, VPP the end, promptly 27 pin, 1 pin meet power supply V CcU 4Select the 6264/D1216 model for use, U 413 A 0～A 12End (i.e. 2～10 pin, 21 pin, 23～25 pin) ground connection location bus, U 48 D 0～D 7End (i.e. 11～18 pin) connects data/address bus.U 4CS 1, CS 2End, (i.e. 20,26 pin) meet the U of keyboard interface circuit 4 62CS6264 end, i.e. its 11 pin.The drive circuit 3 of LCD is by four NAND gate C, D, E, F, plug-in unit J 1, socket J11 forms, four NAND gate C, D, E, F select the 74H00 model for use, two inputs of NAND gate E all meet the U of keyboard interface circuit 4 62CSLCD end (i.e. 10 pin), import termination U for one of NAND gate F 1, U 4WR end (write gate) be U 116 pin, U 427 pin, another input termination U of NAND gate F 1, U 4RD end (read gate) be U 117 pin, U 422 pin.The input of the output termination NAND gate D of NAND gate E, the output of another input termination F of D, two inputs of the output termination C of D, the output connector J of C 1E end, i.e. 6 pin.J 18 D 0～D 7End (7～14 pin) connects data/address bus, J 1A 1, A 0End (i.e. 5,4 pin) ground connection location bus, 1 pin ground connection, potentiometer W 1Fixedly termination 2 pin and a power supply V Cc, another fixed end ground connection, it adjusts termination 3 pin.Socket J 118 D 0～7 ends (i.e. 7～14 pin) connect data/address bus, J 111～6 pin all connect LCD 12.Keyboard interface circuit 4 is by keyboard interface circuit chip U 12, two coding chip U 61, U 62, plug-in unit J 2Form U 12Select 8279 models for use, U 61, U 62Select the 74HC139 model for use, U 12The row, column sweep signal that is used for supervisory keyboard 9, U 61Be used to provide the sweep signal of keyboard 9, U 62Be used to provide the chip selection signal of peripheral interface circuit.J 2Link to each other with film touch keyboard 9.U 128 DB 0～DB 7End (i.e. 12～19 pin) connects data/address bus, and 10 pin meet U 1, U 4RD end, i.e. U 117 pin, U 422 pin, U 1211 pin meet U 1, U 4WR end, i.e. U 116 pin, U 427 pin, U 1221 pin ground connection location buses, U 123 pin meet U 1ALE/ P, i.e. U 130 pin, U 129 pin meet U 1RST end, i.e. U 19 pin.U 12R L0～R L3Four terminal difference connector J 21～4 pin, U 12SL 0Termination U 612 pin, U 12SL 1Termination U 613 pin, U 1236 pin connector J 210 pin, U 61Y 0～Y 3Four terminal difference connector J 25～8 pin, J 29 pin ground connection.U 62A 13, A 14, A 15The termination address bus, U 6210 pin meet the input CSLCD of the NAND gate E of liquid crystal display drive circuit 3, i.e. 4 of E, 5 pin, U 6212 pin meet U 12CS8279, i.e. U 1222 pin.Serial interface circuit 5 is by chip U 5, plug-in unit J 4Form U 5Select the ICL232 model for use, U 516 pin meet V Cc, connect capacitor C between 2 pin and 16 pin 7, be connected in series capacitor C between 6 pin and the ground 6, 13 pin connector J 41 pin, 14 pin meet J 42 pin, J 43 pin ground connection.U 512 pin meet U 110 pin, U 511 pin meet U 111 pin.U 5The indirect capacitor C of 1,3 pin 4, U 5The indirect capacitor C of 4,5 pin 5 Data storage card 6 is by E 2PROM chip U 14, plug-in unit J 8, socket J 8-1Form U 14Select the 24LC65 model for use, R 1An end and light emitting diode D 2Positive pole link to each other R 1Another termination U 148 pin, D 2Negative pole meet U 141,2,3,4 pin, connector J again simultaneously 84 pin, U 146 pin meet J 82 pin, U 145 pin meet J 83 pin, J 8-11 pin meet V Cc, V CcAnd be connected to resistance R between 2 pin 3, V CcAnd be connected to R between 3 pin 5, 4 pin ground connection.2 pin of J8-1 meet U 1P 1.4End, J 8-13 pin meet U 1P 1.5 End.Warning circuit 7 is by triode Q 1, plug-in unit J 3, J 3-1, buzzer BELL forms Q 1Emitter stage meet V Cc, its base stage meets R 2An end, R 2Another termination U 1P 1.7End, Q 1Colelctor electrode meets J 31 pin, J 33 pin ground connection, J 3-11 pin connect BELL "+" end, J 3-13 pin connect BELL "-" end.The drive circuit 3 of pulse shaper 1, single chip machine controlling circuit 2, LCD, keyboard interface circuit 4, serial interface circuit 5, warning circuit 7 are all adorned solid in housing 8, LCD 12 is fixed on the front panel 14 of housing 8, and data storage card 6 is plugged on the socket 16 of lower shoe 15 of housing 8.
The operating principle of this measuring instrument is as follows: when the device of going into the well moves up and down in well, the photoelectric encoder that is connected with degree of depth pulley coaxle will be exported A, B two-phase pulse, and this two-phase pulse is through U 11Send into U after the driving 13Carry out shaping, debate to counting controling signal so that produce.When going deep into downhole probe, depth value increases, A phase pulse advance B phase pulse this moment, thereby through U 13After the processing, by U 132 pin output high level " 1 ", this high level signal is admitted to U 13 pin, with control U 1Internal counter adds the counting computing, thereby the depth value of record is strengthened.When carrying on the instrument, depth value reduces, and B phase pulse advance A phase pulse this moment is through U 13After the processing, its 2 pin is output as low level " 0 ", and this low level signal is then controlled U 1Internal counter subtracts computing, thereby the depth value of record is reduced.Degree of depth counting pulse signal is then by U 114 pin directly deliver to U 11 pin.This signal is T among the 80C32 2The enabling signal of counter.Conversion relation between the degree of depth and the overall pulse counting is:
This instrument carries out the sampling of depth signal sample mode when waiting, and the interval of sampling is set by keyboard.When depth signal was sampled, single-chip microcomputer was under the control of program, with T 2Count value in the counter converts depth value to by following formula, and delivers to data/address bus, when WR is low level, the data on the bus is write U 4In.When needs read U 4In data the time, then under the control of program, produce " reading to allow " signal (being RD=0) by 8032 thus with U 4In data be sent to data/address bus, and etc. deliver in storage card or the LCD.When the chip selection signal CSLCD of LCD is low level " 0 ", i.e. U 1When the address signal that sends is 1FFF, LCD is selected, this moment is if any one low level occurs in WR or the RD holding wire, the capital makes 8 pin of NAND gate C high level " 1 " occur, this high level signal is the driving signal of LCD, this moment system data bus will with the data wire D of LCD 0～D 7Connect, promptly LCD is sent to data/address bus with the data on the video data bus or with the data on the LCD, potentiometer W 1The briliancy of adjustable liquid crystal display.When chip selection signal CS8279 is selected, when promptly CS8279 is low level, U 1The beginning keyboard scan, when confirming that a certain key is closed, then the row, column address of this key and additional displacement, state of a control form the push-up storage that keyboard data is sent into CS8279 inside together, and then by U 1Send and read (RD) or write (WR) control signal and read.The plug-in storage card core parts of this instrument are Serial E 2PROM (U 14), its 6 pin and 5 pin are respectively serial clock control signal (SCL) and serial data input/output signal (SDA), and are connected to U respectively 1P 1.4～P 1.5Pin inserts memory card socket as long as should block, then should card just and the effect of machine built-in storage identical, promptly under the control of the inner read/write procedure of single-chip microcomputer the realization data read and write work.

Claims (2)

1, memory-type depth calibrator, it is made up of shaping pulse and sensing circuit (1), single chip machine controlling circuit (2), the drive circuit (3) of LCD, keyboard interface circuit (4), serial interface circuit (5), data storage card (6), warning circuit (7), housing (8), film touch keyboard (9), depth transducer (10), LCD (12); It is characterized in that:
A, shaping pulse and sensing circuit (1) are by the pulse orientation identification circuit U of forming with door A, B 11, also have the pulse shaper U that forms by d type flip flop 13Form, A phase output terminal with the input termination photoelectric encoder (10) of door A, with i.e. 3 pin of the CLK end of the output termination d type flip flop of door A, B phase output terminal with the input termination photoelectric encoder (10) of door B, D input with the output termination d type flip flop of door B, i.e. 5 pin meet the U of single chip machine controlling circuit (2) simultaneously again 1P 1.0End, i.e. 1 pin, the Q end of d type flip flop i.e. 2 pin meets U 1P 1.1And P 1.2End, i.e. 2 pin and 3 pin;
B, single chip machine controlling circuit (2) are by U 1Serve as CPU, U 2Serve as address latch, U 3Serve as memory under program EP ROM, U 4Serve as data memory, U 10Serve as automatic electrification reset device and form U 102,7,8 pin meet power supply V Cc, 4 pin ground connection are connected in series capacitor C between 1 pin and the ground 8, be connected in series capacitor C between 3 pin and the ground 1, 6 pin meet U 1RST end, i.e. 9 pin, U 106 pin and ground between be in series with resistance R 4, U 1X 1, X 2Between the end, promptly be serially connected with crystal oscillator J between 18 pin and 19 pin, the two ends of crystal oscillator J are to being serially connected with capacitor C between the ground respectively 2, C 3, U 18 P 00～P 07End, promptly 32～39 pin connect data/address bus, U 18 P 20～P 27End, i.e. 21～28 pin ground connection location buses, U 1ALE/ P end, promptly 30 pin meet U 2LE end, i.e. 11 pin, U 1PSEM end, promptly 29 pin meet U 3OE end, i.e. 22 pin, U 28 D 0～D 7End, promptly 3,4,7,8,13,14,17,18 pin connect data/address bus, U 28 Q 0～Q 7End, i.e. 2,5,6,9,12,15,16,19 pin ground connection location buses, U 2The i.e. 1 pin ground connection of OE end, U 314 A 0～A 13End, i.e. 2～10 pin, 21 pin, 23～26 pin ground connection location buses, U 38 D 0～D 7End, promptly 11～18 pin connect data/address bus, U 3The i.e. 20 pin ground connection of CE end, U 3PQR, VPP the end, promptly 27 pin, 1 pin meet power supply V Cc, U 413 A 0～A 12End, i.e. 2～10 pin, 21 pin, 23～25 pin ground connection location buses, U 48 D 0～D 7End, promptly 11～18 pin connect data/address bus; U 4CS 1, CS 2End, promptly 20,26 pin meet the U of keyboard interface circuit (4) 62CS6264 end, i.e. its 11 pin;
The drive circuit of c, LCD (3) is by four NAND gate C, D, E, F, plug-in unit J 1, socket J 11Form, two inputs of NAND gate E all meet the U of keyboard interface circuit (4) 62CSLCD end, i.e. 10 pin, the input termination U of NAND gate F 1, U 4WR end, i.e. U 116 pin, U 427 pin, another input termination U of NAND gate F 1, U 4RD end, i.e. U 117 pin, U 422 pin; The input of the output termination NAND gate D of NAND gate E, the output of another input termination F of D, two inputs of the output termination C of D, the output connector J of C 1E end, i.e. 6 pin, J 18 D 0～D 7End, promptly 7～14 pin connect data/address bus, J 1A 1, A 0End, i.e. 5,4 pin ground connection location buses, 1 pin ground connection, potentiometer W 1Fixedly termination 2 pin and a power supply V Cc, another fixed end ground connection, it adjusts termination 3 pin; Socket J 118 D 0～D 7End, promptly 7～14 pin connect data/address bus, J 111～6 pin all connect LCD (12);
D, keyboard interface circuit (4) are by keyboard interface circuit chip U 12, two coding chip U 61, U 62, plug-in unit J 2Form J 2Link to each other with film touch keyboard (9); U 128 DB 0～DB 7End, promptly 12～19 pin connect data/address bus, and 10 pin meet U 1, U 4RD end, i.e. U 117 pin, U 422 pin, U 1211 pin meet U 1, U 4WR end, i.e. U 116 pin, U 427 pin, U 1221 pin ground connection location buses, U 123 pin meet U 1ALE/ P, i.e. U 130 pin, U 129 pin meet U 1RST, i.e. U 19 pin, U 12R L0～R L3Four end difference connector J 21～4 pin, U 12SL 0Termination U 612 pin, U 12SL 1Termination U 613 pin, U 1236 pin connector J 210 pin, U 61Y 0～Y 3Four terminal difference connector J 25～8 pin, J 29 pin ground connection, U 62A 13, A 14, A 15The termination address bus, U 6210 pin meet the input CSLCD of the NAND gate E of liquid crystal display drive circuit 3, i.e. 4 of E, 5 pin, U 6212 pin meet U 12CS8279, i.e. U 1222 pin;
E, serial interface circuit (5) are by chip U 5, plug-in unit J 4Form U 516 pin meet V Cc, connect capacitor C between 2 pin and 16 pin 7, be connected in series capacitor C between 6 pin and the ground 6, 13 pin connector J 41 pin, 14 pin meet J 42 pin, J 43 pin ground connection; U 512 pin meet U 110 pin, U 511 pin meet U 111 pin; U 5The indirect capacitor C of 1,3 pin 4, U 5The indirect capacitor C of 4,5 pin 5
F, data storage card (6) are by E 2PROM chip U 14, plug-in unit J 8, socket J 8-1Form R 1An end and light emitting diode D 2Positive pole link to each other R 1Another termination U 148 pin, D 2Negative pole meet U 141,2,3,4 pin, connector J again simultaneously 84 pin, U 146 pin meet J 82 pin, U 145 pin meet J 83 pin, J 8-11 pin meet V Cc, V CcAnd be connected to resistance R between 2 pin 3, V CcAnd be connected to R between 3 pin 5, 4 pin ground connection; J 8-12 pin meet U 1P 1.4End, J 8-13 pin meet U 1P 1.5End;
J, warning circuit (7) are by triode Q 1, plug-in unit J 3, J 3-1, buzzer BELL forms Q 1Emitter stage meet V Cc, its base stage meets R 2An end, R 2Another termination U 1P 1.7End, Q 1Colelctor electrode meets J 31 pin, J 33 pin ground connection, J 3-11 pin connect BELL "+" end, J 3-13 pin connect BELL "-" end.
2, memory-type depth calibrator according to claim 1, the drive circuit (3), keyboard interface circuit (4), serial interface circuit (5), the warning circuit (7) that it is characterized in that pulse shaper (1), single chip machine controlling circuit (2), LCD are all adorned solid in housing (8), LCD (12) is fixed on the front panel (14) of housing (8), and data storage card (6) is plugged on the socket (16) of lower shoe (15) of housing (8).
CN99201305U 1999-02-08 1999-02-08 Storage depth measuring apparatus Expired - Fee Related CN2361834Y (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
CN99201305U CN2361834Y (en) 1999-02-08 1999-02-08 Storage depth measuring apparatus

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103541726A (en) * 2013-11-07 2014-01-29 中国人民解放军重庆通信学院 Well depth measuring device
CN109458177A (en) * 2019-01-17 2019-03-12 西南石油大学 A kind of umbrella motor-driven downhole intelligent sampler
CN109538202A (en) * 2019-01-17 2019-03-29 西南石油大学 A kind of intelligence umbrella rocker slider supporting leg suction-type sampling device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103541726A (en) * 2013-11-07 2014-01-29 中国人民解放军重庆通信学院 Well depth measuring device
CN109458177A (en) * 2019-01-17 2019-03-12 西南石油大学 A kind of umbrella motor-driven downhole intelligent sampler
CN109538202A (en) * 2019-01-17 2019-03-29 西南石油大学 A kind of intelligence umbrella rocker slider supporting leg suction-type sampling device
CN109458177B (en) * 2019-01-17 2022-02-01 西南石油大学 Umbrella-shaped motor-driven underground intelligent sampler
CN109538202B (en) * 2019-01-17 2022-02-01 西南石油大学 Umbrella-shaped landing leg suction formula sampler of intelligence

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