CN2329029Y - Post timer - Google Patents
Post timer Download PDFInfo
- Publication number
- CN2329029Y CN2329029Y CN 98237263 CN98237263U CN2329029Y CN 2329029 Y CN2329029 Y CN 2329029Y CN 98237263 CN98237263 CN 98237263 CN 98237263 U CN98237263 U CN 98237263U CN 2329029 Y CN2329029 Y CN 2329029Y
- Authority
- CN
- China
- Prior art keywords
- chips
- chip microcomputer
- cake cores
- interface circuit
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model relates to a periodical recording device which can record personnel watching situation according to setting time for standby and checking. The utility model is characterized in that the utility model adopts a monolithic computer control system and is connected with a clock circuit by an interface circuit, and the monolithic computer control system comprises a latch, an extender memory and a data memory. The utility model can read and write distributed data on a clock which is displayed on a display by operating programs, and the utility model has the advantages of reasonable design and convenient use and can reduce accidents.
Description
It is clock log, the inquiry unit of core with the single-chip microcomputer that the utility model belongs to a kind of.
Whether adhere to the post after the staff is on duty, the situation of time on duty can't be examined or check for a long time, and Just because of this, the staff leaves post, leaks the hilllock, excessive drinking is slept and led to major accident, causes happening occasionally of personal injury and heavy economic losses.The current way that addresses this problem is the disciplinary education of strengthening the worker, there is not a kind of better suited instrument to detect, supervise worker's situation on duty, pen recorder than widespread usage is a punched-card machine, and this machine can only write down the upper and lower class of worker constantly, see whether be late, leave early, can't record as for situation on duty, and the card of punched-card machine carries by the individual, can't check in case lose; More advanced continuous recording instrument is that the video camera sensing writes down a class device, but the equipment price costliness requires the quality height to operating personnel, uses funds too high throughout the year, and general unit is difficult to bear, and is difficult for generally applying.
The purpose of this utility model is to design a kind of to be core with the single-chip microcomputer, can to write down and inquire about the Post timer of worker's situation on duty rapidly, exactly.
The utility model Post timer, adopted following technical proposals: comprise housing, LCD and power supply, characteristics are that this calculagraph is to link to each other with clock circuit by Single Chip Microcomputer (SCM) system, through interface circuit to constitute.
Single Chip Microcomputer (SCM) system is to be core with the single-chip microcomputer, and link address latch, extender storer and data-carrier store constitute.
Describe embodiment of the present utility model in detail below in conjunction with accompanying drawing:
Fig. 1 is a profile synoptic diagram of the present utility model;
Fig. 2 is circuit theory diagrams of the present utility model;
Fig. 3 is power principle figure.
The detailed circuit of the utility model Post timer is: single-chip microcomputer IC
18031 cake cores have been adopted, its crystal oscillator frequency 6MHZ, coupled address latch IC
2Adopt 373 cake cores, this latch IC
2Be eight bit memories with ternary buffering output; The extender memory IC
3It is the programmable read only memory that adopts 2764 cake cores; The growth data memory IC
4Adopt the static RAM of 6264 cake cores; Interface circuit IC
5Adopt 8155 cake cores, coupled clock circuit IC
6Adopt 5832 cake cores; Seven terminals of the B mouth of interface circuit 8155 cake cores are connected with the data line end of clock circuit 5832 chips, and interface circuit 8155 is also as function key K
2-K
5Connecting interface with clock 5832.
Single-chip microcomputer 8031 chips and interface circuit 8155 chips are about to the least-significant byte address of the P0 mouth output of 8031 chips for directly to be connected, do not add latch directly with the AD of 8155 chips
0-AD
7Link to each other, both made address bus, make the data bus again, address latch is controlled on 8155 chips with ale signal and latchs.
Linear selection system is adopted in the 1/0 port address decoding of system, promptly the independent address wire of 8031 chips, receives the sheet choosing end of peripheral chip, as long as this address wire is that low level is just chosen this sheet.
Clock 5832 chip crystal oscillator frequency 32.768KHZ, have second, branch, the time, week, day, the moon, year seven kinds of tally functions, the 9-12 pin is a data line, the 1-7 pin is an address wire, and reading and writing, maintenance and chip selection signal are arranged.
Numeral shows employing 16 * 4 character pattern LCD16465 LCD, by interface with 8031 chips, be connected with storer, controller, decoder driver and the display screen of LCD16465 display, by the defeated people's instruction of button, by the dynamic demonstration of single-chip microcomputer 8031 chip controls data.
Power supply is made up of commonly used and standby power supply, and power supply commonly used becomes interchange 12V by mains-supplied by transformer, and behind rectifying and wave-filtering, the one tunnel through 7806 regulator blocks, diode D
3Send+5V, another road is through diode D
4And resistance R
17Give reserve battery E charging; During mains failure, relay J discharges, and its contact J1 is by a → b, and the 6V standby power supply is through triode GB and D
2Reduce to+5V operational amplifier LM393 triode BG, stabilivolt DW and resistance R among the figure
11-R
16Constitute and prevent overcharging or the over circuit of reserve battery E.
The following describes working condition: earlier program is deposited in the programmable read only memory 2764, single-chip microcomputer just can be finished various set-up functions by reading command, is provided with multiple button in the accompanying drawings: preset key K
3Being function selecting key, is to be used with other key; Key K is set
2Be to use interior a kind of setting of machine and adjustment standard time, press preset key earlier during operation, by key is set, promptly reset the standard time again; Time keeping key K
1, for employed personnel use key writing time, press this key, the hummer in the machine rings, and shows the look-at-me that provides single-chip microcomputer 8031, and interrupt service routine starts, and the relevant data at that time of clock 5832 is read be sent to data-carrier store 6264 and preserve, and looks into after preparing against; Query key K
4Be the inquiry time keeping key on the same day, during operation, press preset key earlier, the liquid crystal display calendar, can consult the input record on the same day by query key again, as the same day record more than 8 times, can carry out page turning by query key again; Calendar key K
5Be to consult, during operation, press preset key earlier, press the calendar key again, just can select the date that will consult, press query key again toward the day entry key, the time keeping on selected date before can consulting, ZT is a power light, 1 is casing.
The utility model has the following advantages:
Owing to used new and high technology, adopted the read-write control electricity of SCM system as clock data The road, and link to each other with clock with interface circuit, so the automated procedures height, the storage data volume is big, can be very Record easily, inquire about the multiple time data of a period of time, the record, the inquiry all more convenient, this The calculagraph reasonable in design, cheap, be easy to grasp, easy to operate, be fit to China's national situation, Be easy to popularize. The inventor has manufactured experimently one, is spaced apart 10 minutes Post timer writing time, Through probationary certificate, record is inquired about sensitive and accurately, and under the constraint of this calculagraph, the staff leaves post The sleep phenomenon obviously reduce, also just avoided the generation of some liability accidents, produced economic benefit and Social benefit.
Claims (5)
1, a kind of Post timer comprises housing (1), LCD and power supply, it is characterized in that this calculagraph is by Single Chip Microcomputer (SCM) system, through interface circuit IC
5With clock circuit IC
6The formation that links to each other.
2,, it is characterized in that Single Chip Microcomputer (SCM) system is with single-chip microcomputer IC according to the described calculagraph of claim 1
1Be core, link address latch IC
2, the extender memory IC
3With data-carrier store IC
4Constitute.
3, according to the described calculagraph of claim 1, it is characterized in that single-chip microcomputer IC
18031 cake cores have been adopted, its crystal oscillator frequency 6MHZ; Coupled address latch IC
2Adopt 373 cake cores, this latch IC
2Be eight bit memories with ternary buffering output; The extender memory IC
3It is the programmable read only memory that adopts 2764 cake cores; The growth data memory IC
4Adopt the static RAM of 6264 cake cores, interface circuit IC
5What adopt is 8155 cake cores, coupled clock circuit IC
6What adopt is 5832 cake cores.
4, according to claim 1,3 described calculagraphs, it is characterized in that seven terminals of B mouth of interface circuit 8155 cake cores, be connected with the data line end of clock circuit 5832 chips, interface circuit 8155 chips are also as function key K
2-K
5Connecting interface with clock circuit 5832.
5, according to the described calculagraph of claim 1, it is characterized in that single-chip microcomputer 8031 chips and interface circuit 8155 chips for directly to be connected, be about to the P of 8031 chips
0The least-significant byte address of mouthful output, do not add latch directly with the AD of 8155 chips
0-AD
7Link to each other, address latch is controlled on 8155 chips with ale signal and latchs.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 98237263 CN2329029Y (en) | 1998-04-11 | 1998-04-11 | Post timer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 98237263 CN2329029Y (en) | 1998-04-11 | 1998-04-11 | Post timer |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2329029Y true CN2329029Y (en) | 1999-07-14 |
Family
ID=33985123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 98237263 Expired - Fee Related CN2329029Y (en) | 1998-04-11 | 1998-04-11 | Post timer |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN2329029Y (en) |
-
1998
- 1998-04-11 CN CN 98237263 patent/CN2329029Y/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |