CN2325854Y - Intelligent card type reading and writing device - Google Patents
Intelligent card type reading and writing device Download PDFInfo
- Publication number
- CN2325854Y CN2325854Y CN 98213906 CN98213906U CN2325854Y CN 2325854 Y CN2325854 Y CN 2325854Y CN 98213906 CN98213906 CN 98213906 CN 98213906 U CN98213906 U CN 98213906U CN 2325854 Y CN2325854 Y CN 2325854Y
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- CN
- China
- Prior art keywords
- card
- order
- cpu
- ide
- read
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model relates to an intelligent card reading and writing device, composed of an interface part for the reading and writing device and an IDE, and a CPU and control logic part for reading and writing an IC card; the interface part for the reading and writing device and an IDE comprises a register group and an address decode logic for selecting registers; the CPU and control logic part for reading and writing an IC card comprises a single chip microcontroller, a memory, an IC generating circuit, an IC card power-up circuit and a clock circuit. The utility model has the advantages of speed data processing rate, Chinese display, button actions, direct viewing, convenience, etc.
Description
The utility model relates to a kind of IC-card read write line, and it is associated in the read-write and the data processing function of intact paired card with PC series microcomputer.
The IC-card read write line has universal and tailored version two big classes by the function branch, external at present existing how tame manufacturers produce IC-card and IC-card read write line.Domestic also have some manufacturers that this kind equipment is arranged, as magnificent rising sun gold card group; The Beijing Watch Data System Co., Ltd, computer group of Star etc., the function of these IC-card read write lines is identical substantially, and its basic logic block diagram is as shown in Figure 1.
From the logic diagram of Fig. 1, these IC-card read write lines all use serial line interface with being connected of main frame, with 9 cores or 25 core connectors.Using the benefit of serial port is that interface is simple, also exists the shortcoming of following several respects:
1, take a serial line interface: generally provide dual serial mouth Com1 and Com2 on the computer motherboard at present, oneself takies one mouse, if IC-card takies one again, just must increase the serial expansion card when the user wants to re-use serial port, and this makes troubles to the user.
2, operating system (DOS or Windows) supports that mouse is the standard peripherals configuration of microcomputer at present, if want the IC-card read write line that uses serial ports is made again the standard peripherals configuration of microcomputer, difficulty is bigger.
3, present IC-card read write line all is placed on read write line inside to the identification and the handling procedure of different types of card, and owing to the restriction of innernal CPU and ROM size, the kind of the card that it can be discerned and handle is limited like this.
The purpose of this utility model is a kind of IC-card read write line of design, uses ide interface, and makes it become a kind of standard peripherals configuration of microcomputer.
The intelligent card read/write device of the utility model design mainly comprises two parts, and a part is the interface section of read write line and IDE, the address decoding logic that includes a registers group and register is selected.Another part is to the CPU and the steering logic of IC-card read-write, comprises single chip microcontroller, storer, and IC-card seat and IC-card power up and clock circuit,
Wherein the interface section comprises:
(1) ide interface socket;
(2) send to the order of card reader and the registers group U of data in order to deposit main frame
0, U
1, U
2And U
3
(3) address decoding logic U
8
(4) interrupt producing logic U
4
(5) in order to deposit the memory of data U that from card, reads or write
9
Wherein read write line CPU and steering logic comprise:
(6) internal storage has the single chip microcontroller U to the powering up of card, identification and handling procedure
10
(7) in order to choose the address decoder U of storer or ide interface registers group
11
(8) in order at the clear circuit U that powers up or give during the host software zero clearing quenching pulse of CPU
12
(9) the gang socket U of IC-card and card reader
13
(10) power control circuit and clock generating circuit.
The ide interface that the utility model adopts is the standard interface that hard disk and CD-ROM drive use in the present PC series microcomputer (586 or above type), two ide interface sockets are generally all arranged on the computer motherboard, insert a cable on each socket and just can be with two IDE equipment, be called master and from coiling.Such machine intimate can have four IDE equipment.And in fact the general user uses a hard disk drive, and a CD-ROM drive is just much of that, seldom uses second hard disk, and the user who had both just had has used second hard disk, also also has an ide interface to use, and does not so just take user's serial port resource.Besides because operating system (DOS or Windows) to the support of ide interface, is just made the IC-card read write line standard peripherals configuration of a microcomputer easily.
In addition in the utility model, the identification and the handling procedure of IC-card only is placed on the handling procedure of several cards commonly used in the IC-card read write line great majority card, IC-card particularly newly developed from now on and have the handling procedure of the card of specific (special) requirements to be placed on main frame inside.When needs are handled a certain card, handle in the read write line of can automatically the handling procedure of this card being packed into.The utility model is exactly a universal I C card reader truly like this.
Brief Description Of Drawings:
Fig. 1 is the logic diagram of prior art.
Fig. 2 is the IC-card read write line logic diagram of the utility model design.
Fig. 3 is an ide interface partial circuit schematic diagram.
Fig. 4 is card reader CPU and steering logic partial circuit schematic diagram.
Below in conjunction with accompanying drawing, introduce content of the present utility model in detail.The IC-card read write line is made up of following two parts:
(1) ide interface part, as shown in Figure 3.
1, ide interface socket: this is one 40 core ide interface socket, and all signals and ide interface require compatible.
2, registers group: in order to deposit order and the data that main frame sends to card reader, wherein U0 is 8 order of the bit registers, deposits the order that sends over by ide interface from main frame.Card reader whenever receives an order of main frame, just passes through U
4(interrupting producing logic) sent out to CPU and interrupted application, so that carry out the operation that reads and writes data.
U
1, U
2Be 8 bit data register, wherein U
1Deposit the data of sending, U from main frame
2Deposit the data that send to main frame.
U
3Be status register, duty and error message that it preserves card reader supply host query.
3, address decoding logic U
8:
This address decoding logic can satisfy following the requirement: (1) command register U0 should be selected when " magnetic head selection " register write data in ide interface of main frame.(2) selection of other register only could be selected main frame writes corresponding data in command register after.(3) the register main frame in the registers group can be visited by ide interface, and the CPU in the card reader also can visit, and only ide interface is chosen the register of " writing ", is " reading " when card reader CPU chooses.Ide interface is chosen the register of " reading ", is " writing " when card reader CPU chooses.
4, interrupt producing logic U
4:
This logic is just once interrupted to the CPU application when card reader writes data or order by ide interface at main frame, so that these data or order are taken away.
5, storer U
9:
This storer is the static RAM (SRAM) of a 32K, in order to deposit the data of reading or writing from card, also can deposit the handling procedure of card.
(2) card reader CPU and steering logic, as shown in Figure 4.
1, single chip microcontroller U
10:
The control maincenter of card reader, internal storage have powering up of blocking, identification and handling procedure.Function is: (1) powers up and discerns card.(2) read data or Xiang Kazhong write data from card.(3) interrupt request of response ide interface is read in or is write data to ide interface from ide interface.
2, address decoder U
11: still choose the registers group of ide interface in order to choose storer.
3, clear circuit U
12: in order to power up or can both give quenching pulse of CPU during the host software zero clearing.
4, IC-card seat U
13: the gang socket of IC-card and card reader, so that the IC-card power supply to be provided, time clock and read and write data etc.
5, remainder is IC-card power control circuit and clock generator circuit etc.
The IC-card read write line major advantage of the utility model design is:
1, used ide interface to be connected with main frame, data processing speed is fast, has saved the serial port resource Be user-friendly to, main is main frame hardware and software can resemble card reader to the support of ide interface Hard disk or CD-ROM drive equally are easy to become a standard interface configuration of microcomputer. So just can greatly expand The range of application of exhibition IC-card. Such as: the authentication of start or networking; The protection of software copyright can Effectively prevent piracy or infringement; Shopping online etc. is easy to from the commercial neck of present finance IC-card The territory enters into family of entity and individual.
2, the utility model card reader is to the identification of card and the read-write handling procedure of data, and a part is placed on In the card reader, in order to the processing to IC-card commonly used, to locating of card commonly used or that specific (special) requirements is arranged not too The reason program is placed on main frame inside. On main frame, tap with mouse when needing, can be downloaded to card reader, Data in the card are read and write and are processed, like this utility model to the identification of chattering type IC-card with Processing can be unconfined, and the card of new issue or the card of specific (special) requirements is arranged after comprising is as long as write A program is placed in the main frame and gets final product, and need not change card reader. From this point, the utility model is A universal card reader truly.
3, the utility model card reader can adapt to the various types that ide interface is arranged, user interface close friend, The host process program can be operated under the operating systems such as DOS, Windows, XNIX, Chinese display, Push-botton operation, the operation intuitive and convenient.
Claims (1)
- A kind of intelligent card read/write device is characterized in that this read write line is by the interface section of read write line and IDE, partly form the CPU and the steering logic of smart card read-write;Wherein the interface section comprises:(1) ide interface socket;(2) send to the order of card reader and the registers group U of data in order to deposit main frame 0, U 1, U 2And U 3(3) address decoding logic U 8(4) interrupt producing logic U 4(5) in order to deposit the memory of data U that from card, reads or write 9Wherein read write line CPU and steering logic comprise:(6) internal storage has the single chip microcontroller U to the powering up of card, identification and handling procedure 10(7) in order to choose the address decoder U of storer or ide interface registers group 11(8) in order at the clear circuit U that powers up or give during the host software zero clearing quenching pulse of CPU 12(9) the deck U of IC-card read write line 13(10) power control circuit and clock generating circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 98213906 CN2325854Y (en) | 1998-05-15 | 1998-05-15 | Intelligent card type reading and writing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 98213906 CN2325854Y (en) | 1998-05-15 | 1998-05-15 | Intelligent card type reading and writing device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2325854Y true CN2325854Y (en) | 1999-06-23 |
Family
ID=33967703
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 98213906 Expired - Fee Related CN2325854Y (en) | 1998-05-15 | 1998-05-15 | Intelligent card type reading and writing device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN2325854Y (en) |
-
1998
- 1998-05-15 CN CN 98213906 patent/CN2325854Y/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |