CN2319315Y - Buoy light synchronous flasher - Google Patents
Buoy light synchronous flasher Download PDFInfo
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- CN2319315Y CN2319315Y CN 97204998 CN97204998U CN2319315Y CN 2319315 Y CN2319315 Y CN 2319315Y CN 97204998 CN97204998 CN 97204998 CN 97204998 U CN97204998 U CN 97204998U CN 2319315 Y CN2319315 Y CN 2319315Y
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Abstract
The utility model relates to a buoy light synchronous flasher which is composed of an antenna, a GPS receiver, a buoy light, an interface circuit, a processing circuit, an output circuit and a power-managing circuit, wherein, the antenna is connected with the GPS receiver which is respectively connected with the interface circuit and the power-managing circuit. The processing circuit is respectively connected with the interface circuit, the output circuit and the power-managing circuit. The output circuit is connected with the buoy light. The power-managing circuit is also connected with the interface circuit and the buoy light. The utility model is free from the signal shielding and the electromagnetic interference of intercourse ships. The synchronous flashing of the light buoys of the whole navigation channel can be achieved. Furthermore, the utility model has low cost, good functional reliability and strong practicability.
Description
The utility model relates to a kind of floating lamp synchronizer.
Light buoy is the important component part of navigation mark, provides principal security for safety of ship navigates by water smoothly.But the light buoy on the navigation channel is nonsynchronous flash of light at present, light fragmentarily, and also unintelligible to the indication in navigation channel, when having powerful connections light on the bank, then effect is poorer.The ship of the electromagnetic interference of the wireless telecommunications at harbour and radio equipment, and dealing in addition blocks electromagnetic, also is difficult to realize synchronization flash.
The purpose of this utility model is to provide a kind of all floating lamps of laying along the border, navigation channel that can make to glisten jointly in the identical time, reaches whole channel indicating lights buoy and presents with the floating lamp synchronizer that dodges purpose.
The purpose of this utility model is achieved in that it also is provided with interface circuit and treatment circuit except that being provided with GPS receiving wire, GPS receiver, floating lamp, output circuit, electric power management circuit.The GPS receiving wire is connected with the GPS receiver, the GPS receiver is connected with interface circuit, interface circuit is connected with treatment circuit, treatment circuit connects output circuit and electric power management circuit again respectively, output circuit also is connected with floating lamp, and electric power management circuit also is connected with GPS receiver, interface circuit and floating lamp.
The utility model be owing to can carry out programmed process to the content of its serial delivery port, obtains anyly when whole or the information of whole branch, thereby have each buoy glistened jointly in the identical time, reaches whole channel indicating lights buoy and presents with the characteristics of dodging purpose.The received signal of this device is not subjected to the dealing ship to the blocking of signal, and has overcome the interference of electromagnetism in the harbour yet.And this apparatus cost is low, and functional reliability is strong, and is practical.
Provide specific embodiment below in conjunction with accompanying drawing, further specify the utility model and how to realize.
Fig. 1. the utility model entire block diagram
Wherein: 1.GPS receiving wire, 2.GPS receiver, 3. interface circuit, 4. treatment circuit, 5. electric power management circuit, 6. output circuit, 7. floating lamp.
Fig. 2. the interface circuit principle assumption diagram
Fig. 3. the treatment circuit principle assumption diagram
Fig. 4. the output circuit principle assumption diagram
Fig. 5. the electric power management circuit principle assumption diagram
As shown in Figure 1, this device also is provided with interface circuit (3) and treatment circuit (4) except that being provided with GPS receiving wire (1), GPS receiver (2), floating lamp (7), output circuit (5), electric power management circuit (6).GPS receiving wire (1) is connected with GPS receiver (2), GPS receiver (2) is connected with interface circuit (3), interface circuit (3) is connected with treatment circuit (4), treatment circuit (4) connects output circuit (5) and electric power management circuit (6) again respectively, output circuit (5) also is connected with floating lamp (7), and electric power management circuit (6) also is connected with GPS receiver (2), interface circuit (3) and floating lamp (7).
As shown in Figure 2, interface circuit (3) is made up of sun valve and interface two parts, sun valve includes interface P2, adjustable resistance VR1, resistance R 1, R2, R3, R10, comparator IC3, not gate IC1: D, the interface section includes interface P1, P7, not gate IC1: A, IC1: B, IC1: C, switch W2, resistance R 9, chemical capacitor C10, C11, C12, C13, ic chip 5 is formed, pin 2 with the 6th termination switch W2 of door IC1: C, the pin 1 of the 7th termination switch W2, pin 1 with the 4th termination switch W2 of door IC1: B, the 5th end connects respectively and the 3rd end of door IC1: A and the pin 3 of switch W2, pin 4 with the 2nd termination switch W2 of door IC1: A, the 3rd end of IC1: A also is connected with the pin 1 of interface P1, the pin 5 of switch W2,6,7,8 is that output A end is connected with the A end of treatment circuit (4), the pin 2 of interface P1 is the pin 2 of connecting interface P2 respectively, the pin 1 of interface P7, pin 8 is common to G end ground connection, the pin 1 of interface P2 is connected with 1 end of comparator IC3, the two ends of adjustable resistance VR1 connect 2 ends and 4 ends of comparator IC3 respectively, 4 ends of comparator IC3 are to the P end of P termination power management circuit (6), 3 ends of IC3 are to G end ground connection, 5 ends of comparator IC3 are connected with the B end of treatment circuit (4) to mouth B by not gate IC1: D, one end of resistance R 1 connects 2 ends of comparator IC3, the other end connects ground terminal G, the two ends of resistance R 3 connect 2 ends and 5 ends of comparator IC3 respectively, one end of resistance R 2 connects 5 ends of comparator IC3, the other end is connected with the P end of electric power management circuit (6) to the P end, the pin 2 of interface P7, pin 3, pin 9 connects the pin 14 of ic chip 5 respectively, pin 13, pin 8, pin 7 to the Y ends of interface P7, the Y end of power connection management circuit (6), chemical capacitor C10 two ends connect the pin 3 of ic chip 5 respectively, pin 1, chemical capacitor C11 two ends connect the pin 5 of ic chip 5 respectively, pin 4, the pin 6 of the termination ic chip 5 of chemical capacitor C12, the other end is to G end ground connection, the two ends of chemical capacitor C13 connect the pin 2 of ic chip 5 respectively, pin 16, the pin 9 of ic chip 5 is the E end of output E end connection processing circuit (4), the pin 11 of IC5 is the D end of output D end connection processing circuit (4), the pin 12 of IC5 is the C end of output C end connection processing circuit (4), pin 15 to the G end ground connection of IC5, the pin 16 of IC5 is to the P end of P termination power management circuit (6), the one termination output A end of resistance R 9, the P end of other end power connection management circuit (6), the P end of one termination power management circuit (6) of resistance R 10, another termination output E end.
As shown in Figure 3, treatment circuit (4) is handled by CPU and flash period two parts are formed, they include the ic chip 2 as CPU, switch W1, group row's resistance R ES1, chemical capacitor C3, capacitor C 1, C2, crystal OSC1, resistance R 4, the pin 1 of ic chip 2,2,3,4,5,6,7, the 8 corresponding pin 8 that connect switch W1,7,6,5,4,3,2,1, and the pin 16 of corresponding connection group row resistance R ES1,15,14,13,12,11,10,9, the pin 9 of switch W1,10,11,12,13,14,15,16 all hold the P end that connects electric power management circuit (6) to P, the pin 1 of group row's resistance R ES1,2,3,4,5,6,7,8 all to G end ground connection, the pin 13 of ic chip 2,12,14,10,11 are the A end of the corresponding connecting interface circuit of signal input output end (3), the E end, the B end, the C end, the D end, the pin 17 of IC2 is connected with the F end of output circuit (5) to output F end, pin 16 to the H ends of IC2, the H end of power connection management circuit (6), pin 31 is to the P end of P termination power management circuit (6), the pin 19 of IC2, pin 18 connects the two ends of crystal OSC1 respectively, the pin 9 of IC2 is by resistance R 4 to G end ground connection, the two ends of chemical capacitor C3 connect the pin 31 and the pin 9 of ic chip 2 respectively, the pin 19 of one termination ic chip 2 of capacitor C 1, one end of the other end and capacitor C 2 arrives G end ground connection, the pin 18 of another termination IC2 of capacitor C 2 jointly.
As shown in Figure 4, output circuit (5) is made up of resistance R 7, R8, photoelectronic coupler U3, interface P6, the pin 1 of photoelectronic coupler U3 is the F end of F termination treatment circuit (4), 2 pin of U3 are by resistance R 7 to G end ground connection, the pin 1 of the 3rd pin connection interface P6 of U3, the pin 2 of the 4th pin connection interface P6 of U3, pin 2, the pin 3 of interface P6 are connected by resistance R 8.
As shown in Figure 5, electric power management circuit (6) is made up of resistance R 5, R6, chemical capacitor C4, C5, C6, voltage stabilizing chip 7805, diode D1, aerotron Q1, relay R E1, interface P3, P4.The pin 1 of voltage stabilizing chip 7805 is by chemical capacitor C6 ground connection, this pin 1 also with the pin 1 of interface P3, pin 2 connects, pin 2 ground connection of voltage stabilizing chip 7805, pin 3 connects relay R E1 respectively and passes through chemical capacitor C5 ground connection, and also be that power supply output P holds, the pin 1 of interface P3, pin 2 also connects relay R E1, the pin 3 of interface P3, pin 4 ground connection, diode D1, chemical capacitor C4, relay R E1 is for being connected in parallel, one end connects the pin 3 of voltage stabilizing chip 7805, the other end connects the collecting electrode of aerotron Q1, the grounded emitter of aerotron Q1, and base stage is by resistance R 6 ground connection, also by the H end of resistance R 5 to H termination treatment circuit (4), provide signal for aerotron Q1 by CPU in the treatment circuit (4), make it saturated or end, come the opening and closing of control relay RE1.The pin 1 of interface P4, pin 2 are power supply Y end, the Y end of connecting interface circuit (3), and the pin 1 of P4, pin 2, pin 3, pin 4 all connect relay R E1, pin 5,6,7, the 8 equal ground connection of P4.
Ic chip 5 in the utility model adopts the ICL232 type, and IC2 adopts 8751 types, and the P end is+the SV power supply that Y holds and is+the 12V power supply, group row's resistance R ES1 employing RESPACK4 type, switch W1 employing SW-DIP8 type, switch W2 employing SW-DIP4 type.
Claims (3)
1. floating lamp synchronizer, include the GPS receiving wire, GPS receiver; floating lamp; output circuit; electric power management circuit; it is characterized in that this device also has interface circuit, treatment circuit to form jointly; the GPS receiving wire is connected with the GPS receiver; the GPS receiver is connected with interface circuit, and interface circuit is connected with treatment circuit, and treatment circuit connects output circuit and electric power management circuit again respectively; output circuit also is connected with floating lamp, and electric power management circuit also is connected with GPS receiver, interface circuit and floating lamp.
2. floating lamp synchronizer according to claim 1, it is characterized in that described interface circuit is made up of sun valve and interface two parts, sun valve includes interface P2, adjustable resistance VR1, resistance R 1, R2, R3, R10, comparator IC3, not gate IC1: D, the interface section includes interface P1, P7, not gate IC1: A, IC1: B, IC1: C, switch W2, resistance R 9, chemical capacitor C10, C11, C12, C13, ic chip 5 is formed, pin 2 with the 6th termination switch W2 of door IC1: C, the pin 1 of the 7th termination switch W2, pin 1 with the 4th termination switch W2 of door IC1: B, the 5th end connects respectively and the 3rd end of door IC1: A and the pin 3 of switch W2, pin 4 with the 2nd termination switch W2 of door IC1: A, the 3rd end of IC1: A also is connected with the pin 1 of interface P1, the pin 5 of switch W2,6,7,8 is that output A end is connected with the A end of treatment circuit, the pin 2 of interface P1 is the pin 2 of connecting interface P2 respectively, the pin 1 of interface P7, pin 8 is common to G end ground connection, the pin 1 of interface P2 is connected with 1 end of comparator IC3, the two ends of adjustable resistance VR1 connect 2 ends and 4 ends of comparator IC3 respectively, 4 ends of comparator IC3 are to the P end of P termination power management circuit, 3 ends of IC3 are to G end ground connection, 5 ends of comparator IC3 are connected with the B end of treatment circuit to mouth B by not gate IC1: D, one end of resistance R 1 connects 2 ends of comparator IC3, the other end connects ground terminal G, the two ends of resistance R 3 connect 2 ends and 5 ends of comparator IC3 respectively, one end of resistance R 2 connects 5 ends of comparator IC3, the other end is connected with the P end of electric power management circuit to the P end, the pin 2 of interface P7, pin 3, pin 9 connects the pin 14 of ic chip 5 respectively, pin 13, pin 8, pin 7 to the Y ends of interface P7, the Y end of power connection management circuit, chemical capacitor C10 two ends connect the pin 3 of ic chip 5 respectively, pin 1, chemical capacitor C11 two ends connect the pin 5 of ic chip 5 respectively, pin 4, the pin 6 of the termination ic chip 5 of chemical capacitor C12, the other end is to G end ground connection, the two ends of chemical capacitor C13 connect the pin 2 of ic chip 5 respectively, pin 16, the pin 9 of ic chip 5 is the E end of output E end connection processing circuit, the pin 11 of IC5 is the D end of output D end connection processing circuit, the pin 12 of IC5 is the C end of output C end connection processing circuit, pin 15 to the G end ground connection of IC5, the pin 16 of IC5 is to the P end of P termination power management circuit, the one termination output A end of resistance R 9, the P end of other end power connection management circuit, the P end of one termination power management circuit of resistance R 10, another termination output E end.
3. floating lamp synchronizer according to claim 1, it is characterized in that described treatment circuit is handled by CPU and flash period two parts are formed, they include the ic chip 2 as CPU, switch W1, group row's resistance R ES1, chemical capacitor C3, capacitor C 1, C2, crystal OSC1, resistance R 4, the pin 1 of ic chip 2,2,3,4,5,6,7, the 8 corresponding pin 8 that connect switch W1,7,6,5,4,3,2,1, and the pin 16 of corresponding connection group row resistance R ES1,15,14,13,12,11,10,9, the pin 9 of switch W1,10,11,12,13,14,15,16 all hold the P end that connects electric power management circuit to P, the pin 1 of group row's resistance R ES1,2,3,4,5,6,7,8 all to G end ground connection, the pin 13 of ic chip 2,12,14,10,11 are the A end of the corresponding connecting interface circuit of signal input output end, the E end, the B end, the C end, the D end, the pin 17 of IC2 is connected with the F end of output circuit to output F end, pin 16 to the H ends of IC2, the H end of power connection management circuit, pin 31 is to the P end of P termination power management circuit, the pin 19 of IC2, pin 18 connects the two ends of crystal OSC1 respectively, the pin 9 of IC2 is by resistance R 4 to G end ground connection, the two ends of chemical capacitor C3 connect the pin 31 and the pin 9 of ic chip 2 respectively, the pin 19 of one termination ic chip 2 of capacitor C 1, one end of the other end and capacitor C 2 arrives G end ground connection, the pin 18 of another termination IC2 of capacitor C 2 jointly.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 97204998 CN2319315Y (en) | 1997-04-28 | 1997-04-28 | Buoy light synchronous flasher |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 97204998 CN2319315Y (en) | 1997-04-28 | 1997-04-28 | Buoy light synchronous flasher |
Publications (1)
Publication Number | Publication Date |
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CN2319315Y true CN2319315Y (en) | 1999-05-19 |
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ID=33925334
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 97204998 Expired - Fee Related CN2319315Y (en) | 1997-04-28 | 1997-04-28 | Buoy light synchronous flasher |
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Country | Link |
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CN (1) | CN2319315Y (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100425131C (en) * | 2005-04-28 | 2008-10-15 | 嘉藤电气股份有限公司 | Calling electric buoy |
CN106163030A (en) * | 2015-04-07 | 2016-11-23 | 福建吉星智能科技股份有限公司 | A kind of method for realizing low power consumption synchronizing flashing light device |
-
1997
- 1997-04-28 CN CN 97204998 patent/CN2319315Y/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100425131C (en) * | 2005-04-28 | 2008-10-15 | 嘉藤电气股份有限公司 | Calling electric buoy |
CN106163030A (en) * | 2015-04-07 | 2016-11-23 | 福建吉星智能科技股份有限公司 | A kind of method for realizing low power consumption synchronizing flashing light device |
CN106163030B (en) * | 2015-04-07 | 2018-07-10 | 福建吉星智能科技股份有限公司 | A kind of method for realizing low power consumption of synchronous flashing light device |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |