CN2303411Y - Switching-over arrangement for video frequency matrix - Google Patents

Switching-over arrangement for video frequency matrix Download PDF

Info

Publication number
CN2303411Y
CN2303411Y CN 97250700 CN97250700U CN2303411Y CN 2303411 Y CN2303411 Y CN 2303411Y CN 97250700 CN97250700 CN 97250700 CN 97250700 U CN97250700 U CN 97250700U CN 2303411 Y CN2303411 Y CN 2303411Y
Authority
CN
China
Prior art keywords
pin
resistance
integrated package
power supply
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 97250700
Other languages
Chinese (zh)
Inventor
王东江
李秀云
谢承彬
都恂
王春光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianjin Institute Of Tv Technology
Original Assignee
Tianjin Institute Of Tv Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianjin Institute Of Tv Technology filed Critical Tianjin Institute Of Tv Technology
Priority to CN 97250700 priority Critical patent/CN2303411Y/en
Application granted granted Critical
Publication of CN2303411Y publication Critical patent/CN2303411Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Abstract

The utility model relates to a switching-over arrangement for a video frequency matrix. The combination is that the signal of a video input circuit can reach the unite circuit of each matrix switch by an input bus. The unite circuit signal of the matrix switch reaches a video output circuit through an output bus forming circuit, an output bus, and a character graphics superimposing circuit. The signal of a communication bus can reach a control circuit by a microprocessor control circuit. The signal of the control circuit can respectively reach the matrix switch, the unite circuit, the character graphics superimposing circuit, and the video output circuit. The device is provided with an M-type switch structure. The circuit performance is high, the internal resistance of the output bus can reach 0.01% ohm, the output channel can reach 16 channels, and the interference among signals is small, and the use and the maintenance are convenient.

Description

Video matrix switcher
The utility model relates to a kind of video matrix switcher.
Domestic and international used matrix switcher has various structures at present, the employing T type switching device that has, but construction of switch is not too reliable; The employing low-resistance matching bus circuit that has has used the low-resistance matched operational amplifier as U.S. AD company, but this can reduce the circuit performance index because of overall size strengthens; Look like U.S. Vicon Co., Ltd. output circuit plate at supplier of electricity and often adopt the output of four road circuit, reduce interference between circuit with reduce the output way as far as possible, can be in case increase the output way, it disturbs with regard to corresponding increase.
The purpose of this utility model is to provide a kind of circuit performance index height, reliable in structure, and the output way is many, disturbs little video matrix switcher.
The purpose of this utility model is to realize like this, video matrix switcher is by input, matrix switch, controlling and export this four part forms, its importation is to be made of video input circuit and input bus, matrix switch partly is by the matrix switch element circuit, output bus forms circuit and constitutes jointly, control section is by control circuit, microcomputer control circuit and communication bus constitute jointly, output is by output bus, character graphics superposition circuit and video output circuit constitute jointly, their connection is: the signal of video input circuit is clipped to each matrix switch element circuit by the input bus branch, the signal of each matrix switch element circuit forms circuit to output bus by output bus, the signal of output bus passes through character graphics superposition circuit to video output circuit, to control circuit, the signal of control circuit divides again and is clipped to the matrix switch element circuit signal of communication bus by microcomputer control circuit, character graphics superposition circuit and video output circuit.
The utility model is owing to adopt said structure, form the highly reliable construction of switch of M type, improved circuit performance, owing to adopt overall distribution electric current loop active circuit, make circuit output impedance be reduced to enough little degree, the output bus internal resistance can reach ten thousand/ohm, and the output way can reach 16 the tunnel more than, also reduced simultaneously the noise jamming between the signal,, thereby made working service very convenient because the working condition of circuit adopts light-emitting diode to monitor.
Providing specific embodiment below in conjunction with accompanying drawing further specifies the utility model and how to realize.
Fig. 1 the utility model integrated circuit block diagram
Wherein: 1. video input circuit, 2. input bus, 3. the matrix switch element circuit, 4. output bus forms circuit, 5. output bus, 6. character graphics superposition circuit, 7. video output circuit, 8. control circuit, 9. microcomputer control circuit, 10. communication bus.
Fig. 2 the utility model importation circuit structure diagram
Fig. 3 the utility model matrix switch partial circuit structure chart
Fig. 4 the utility model control section circuit structure diagram
Fig. 5 the utility model video output circuit structure chart
As shown in Figure 1, video matrix switcher is by input, matrix switch, controlling and export this four part forms, its importation is to be made of video input circuit (1) and input bus (2), matrix switch partly is by matrix switch element circuit (3), output bus forms the common formation of circuit (4), control section is by control circuit (8), microcomputer control circuit (9) and communication bus (10) are common to be constituted, output is by output bus (5), character graphics superposition circuit (6) and video output circuit (7) are common to be constituted, their connection is: the signal of video input circuit (1) is clipped to each matrix switch element circuit (3) by input bus (2) branch, the signal of each matrix switch element circuit (3) forms circuit (4) to output bus (5) by output bus, the signal of output bus (5) arrives video output circuit (7) by character graphics superposition circuit (6), to control circuit (8), the signal of control circuit (8) divides again and is clipped to matrix switch element circuit (3) signal of communication bus (10) by microcomputer control circuit (9), character graphics superposition circuit (6) and video output circuit (7).
As shown in Figure 2, the video importation includes resistance R 37, R 38, R 39, R 40, R 41, R 42, R 43, R 44, socket A 1, A 11, A 12, A 13, A 14, A 15, A 16, A 17, triode V 101, V 102, V 103, V 104, V 105, V 106, V 107, V 108And input bus A constitutes resistance R 37, R 44, R 43, R 42, R 41, R 40, R 39, R 38An end corresponding gang socket A respectively 17, A 16, A 15, A 14, A 13, A 12, A 11, A 1Positive pole, the negative pole common ground of the other end of each resistance and each socket, triode V 101~V 108The respectively corresponding resistance R that connects of base stage 38, R 39, R 40, R 41, R 42, R 43, R 44, R 37That end that links to each other with socket, the collector electrode of each triode all connect-the 5V power supply, and emitter all meets input bus A.
As shown in Figure 3, matrix switch partly is by integrated package D-4, group row's resistance S 1, S 2, triode V 2~V 9, V 10, V 13~V 18, V 20~V 24, stabilized voltage power supply V 1, V 12, V 25, V 19, V 11, diode D 1, D 2, D 3, light-emitting diode RED 13, RED 14, RED 15, RED 16, resistance R S 3-1, RS 3-2, RS 3-3, RS 3-4, RS 4-1, RS 4-2, RS 4-3, RS 4-4, R 237, R 238, R 239, R 240, R 10, R 2, R 3, R 4, R 5, capacitor C 4, C 5, C 6, C 7, C 23, C 24, not gate U 10:B, U 10:A, U 10:C, U 10:DForm its group row resistance S 1Pin 1~8 all connect+the 5V power supply pin 9~16 and triode V 2~V 9Base stage meet input bus A jointly, triode V 2~V 9Grounded collector, emitter and group row's resistance S 2The corresponding together pin 19,17,15,13,11,9,7,5 that connects integrated package D-4, group row's resistance S 2Opposite side and pin 1,3,4,6,8,10,12,14,16,18,20 common grounds of integrated package D-4, diode D 1, D 2, D 3, resistance R 10For being connected in series diode D 1The other end pass through capacitor C 4Ground connection, resistance R 10The pin 21 of another termination integrated package D-4, the corresponding respectively triode V that connect of the pin 22,23,24,25 of integrated package D-4 20, V 21, V 22, V 23Base stage, this base stage is also respectively corresponding to resistance S 3-1, S 3-2, S 3-3, S 3-4Meet+the 5V power supply triode V 20~V 23The equal ground connection of emitter, collector electrode is all corresponding to resistance S 4-1, S 4-2, S 4-3, S 4-4Meet stabilized voltage power supply V 25The 3rd end, V 20~V 23Collector electrode also connect not gate U respectively 10:B, U 10:A, U 10:C, U 10:DThe 3rd, 1,5,7 ends, the pin 26 of integrated package D-4 connects+the 15V power supply, pin 27~39 all connects control bus B, the corresponding respectively triode V that connect of pin 2,44,42,40 10, V 13, V 15, V 17Emitter, pin 43,41 ground connection, triode V 10, V 13, V 15, V 17The respectively corresponding triode V that connects of collector electrode 24, V 14, V 16, V 18Base stage, V 10, V 13, V 15, V 17Base stage pass through resistance R respectively 2, R 3, R 4, R 5The corresponding not gate U that connects 10:B, U 10:A, U 10:C, U 10:DThe 4th, 2,6,8 ends, triode V 24, V 14, V 16, V 18The equal ground connection of collector electrode, emitter is all to output bus C, not gate U 10:B, U 10:A, U 10:C, U 10:DThe 4th, 2,6,8 ends also respectively correspondence pass through resistance R 237With light-emitting diode RED 13, resistance R 238With light-emitting diode RED 14, resistance R 239With light-emitting diode RED 15, resistance R 240With light-emitting diode RED 16To ground, stabilized voltage power supply V 1The 1st termination-12V power supply, the 3rd end passes through capacitor C respectively 4Ground connection is passed through capacitor C 5Meet stabilized voltage power supply V 25The 2nd end, stabilized voltage power supply V 1The 2nd end ground connection, stabilized voltage power supply V 12, V 25, V 11The 1st end all meet+the 18V power supply V 12The 3rd end be output+15V power supply, this 3rd end also passes through capacitor C 6, C 7Parallel connection with the 2nd end ground connection, V 25The 3rd end pass through capacitor C 24, C 23Parallel connection be connected stabilized voltage power supply V with its 2nd end 19The 3rd end be output+5V power supply, the 1st end and stabilized voltage power supply V 11The 3rd end be connected V 19, V 11The equal ground connection of the 2nd end.
As shown in Figure 4, control section is by integrated package D-1, D-2, D-3, D-13, D-14, D-15, group row switch SW, resistance R 56-1, R 56-2, R 56-3, R 56-4, R 6, R 7, R 30, NAND gate D-18:A, D-18:B, D-18:C, D-18:D, with a door D-17:A, capacitor C 1, C 2, C 3, C 8, quartz crystal Y, photoisolator D-16, communication bus socket B 1, control bus B forms, the pin 14 of integrated package D-15 connects+the 5V power supply, pin 1,7 to communication bus socket B 1, pin 7 also is connected with ground, and pin 3 passes through resistance R 6The 1st end that connects photoisolator D-16, the 2nd end of D-16 and the 4th end ground connection, the 5th end passes through resistance R 7Connect the pin 10 of integrated package D-1 with the 3rd end, the pin 1 of integrated package D-13 passes through capacitor C 3Ground connection, pin 2 passes through resistance R 30Connect jointly+the 5V power supply with pin 7,8, pin 3 passes through capacitor C 8Ground connection, pin 4 ground connection, pin 6 connects the pin 9 of integrated package D-1, as the pin 1,2,3,4 of the integrated package D-1 of CPU pin 8,7,6,5 and the resistance R of corresponding connection group row switch SW respectively 56-1, R 56-2, R 56-3, R 56-4, pin 1,2,3, the 4 equal ground connection of group row switch SW, resistance R 56-1, R 56-2, R 56-3, R 56-4The other end all connect+the 5V power supply, the pin 5,6,7 of integrated package D-1 connects the pin 1,3,2 of integrated package D-14 respectively, and the pin 4,5,6,7 of D-14 all meets control bus B, and the pin 8 of D-1 connects the 2nd end with door D-17:A, pin 12 meets control bus B, and pin 19 passes through capacitor C 1Ground connection, pin 18 passes through capacitor C 2Ground connection, pin 18,19 also are connected by quartz crystal Y, the pin 16 of integrated package D-1 meets 12 of NAND gate D-18:D, 13 two ends, 11 ends of D-18:D connect the 1st end with door D-17:A, the 10th end of the 3rd termination NAND gate D-18:C of D-17:A, the 4th end of the 10th end of D-18:C and the 2nd end of D-18:A and D-18:B interconnects, the pin 39 of integrated package D-1,38,37,36 all meet control bus B, pin 39,38,37,36,35,34,33,32 again with the pin 3 of integrated package D-2,4,7,8,13,14,17,18 connect the pin 11 of integrated package D-3 together, 12,13,15,16,17,18,19, the pin 35 of integrated package D-1,34, the 33 corresponding respectively NAND gate D-18:B that connect, D-18:A, the 5th of D-18:C, 1,9 ends, the pin 21 of integrated package D-1,22,23,24,25 all connect the pin 25 of integrated package D-3,24,21,23,2, the pin 10 of integrated package D-1 connects the 3rd end of photoisolator D-16, pin 30 connects the pin 11 of integrated package D-2, pin 29 connects the pin 22 of integrated package D-3, pin 1 ground connection of integrated package D-2, pin 6,9,12,15,16,19 connect the pin 8 of integrated package D-3 respectively, 7,6,5,4,3, the pin 2 of integrated package D-2,5 and the pin 10 of integrated package D-3,9 meet control bus B jointly, pin 20 ground connection of integrated package D-3, pin 22 connects the pin 29 of integrated package D-1, the pin 27 of integrated package D-3, pin 1 all connects+the 5V power supply, NAND gate D-18:A, D-18:B, the 3rd of D-18:C, 6,8 ends all meet control bus B.
As shown in Figure 5, the video output circuit of video output (7) is by stabilized voltage power supply V 26, V 27, V 28, integrated package E 1, resistance R 8, R 9, R 10, R 11, R 12, R 13, adjustable resistance R 14, capacitor C 9, C 10, C 11, C 25, video accessory power outlet B 2Form stabilized voltage power supply V 28The 1st termination-12V power supply, the 2nd end ground connection, the 3rd end and integrated package E 1Pin 4 pass through capacitor C together 9Ground connection, resistance R 9, adjustable resistance R 14For being connected in series R 14Other end ground connection, R 9Another termination integrated package E 1Pin 2, E 1Pin 2 also pass through resistance R 10Be connected with pin 6, pin 6 also passes through resistance R 12Meet video accessory power outlet B 2, E 1Pin 8 connect the control bus B of control circuits, E 1Pin 8 also pass through resistance R 13With pin 7 and stabilized voltage power supply V 26The 3rd end pass through capacitor C together jointly 10Ground connection, stabilized voltage power supply V 26The 2nd end ground connection, the 1st termination power V Cc, integrated package E 1Pin 3 pass through capacitor C respectively 11To video output bus C, pass through resistance R 11Ground connection, stabilized voltage power supply V 27The 1st termination power V Cc, the 2nd end ground connection, the 3rd end passes through resistance R respectively 8Meet output bus C, pass through capacitor C 25Ground connection.

Claims (5)

1, a kind of video matrix switcher, be by input, matrix switch, controlling and export this four part forms, it is characterized in that the importation is to be made of video input circuit and input bus, matrix switch partly is by the matrix switch element circuit, output bus forms circuit and constitutes jointly, control section is by control circuit, microcomputer control circuit and communication bus constitute jointly, output is by output bus, character graphics superposition circuit and video output circuit constitute jointly, their connection is: the signal of video input circuit is clipped to each matrix switch element circuit by the input bus branch, the signal of each matrix switch element circuit forms circuit to output bus by output bus, the signal of output bus passes through character graphics superposition circuit to video output circuit, to control circuit, the signal of control circuit divides again and is clipped to the matrix switch element circuit signal of communication bus by microcomputer control circuit, character graphics superposition circuit and video output circuit.
2, video matrix switcher according to claim 1 is characterized in that described video importation includes resistance R 37, R 38, R 39, R 40, R 41, R 42, R 43, R 44, socket A 1, A 11, A 12, A 13, A 14, A 15, A 16, A 17, triode V 101, V 102, V 103, V 104, V 105, V 106, V 107, V 108And input bus A constitutes resistance R 37, R 44, R 43, R 42, R 41, R 40, R 39, R 38An end corresponding gang socket A respectively 17, A 16, A 15, A 14, A 13, A 12, A 11, A 1Positive pole, the negative pole common ground of the other end of each resistance and each socket, triode V 101~V 108The respectively corresponding resistance R that connects of base stage 38, R 39, R 40, R 41, R 42, R 43, R 44, R 37That end that links to each other with socket, the collector electrode of each triode all connect a 5V power supply, and emitter all meets input bus A.
3, video matrix switcher according to claim 1 is characterized in that described matrix switch partly is by integrated package D-4, group row's resistance S 1, S 2, triode V 2~V 9, V 10, V 13~V 18, V 20~V 24, stabilized voltage power supply V 1, V 12, V 25, V 19, V 11, diode D 1, D 2, D 3, light-emitting diode RED 13, RED 14, RED 15, RED 16, resistance R S 3-1, RS 3-2, RS 3-3, RS 3-4, RS 4-1, RS 4-2, RS 4-3, RS 4-4, R 237, R 238, R 239, R 240, R 10, R 2, R 3, R 4, R 5, capacitor C 4, C 5, C 6, C 7, C 23, C 24, not gate U 10:B, U 10:A, U 10:C, U 10:DForm its group row resistance S 1Pin 1~8 all connect+the 5V power supply pin 9~16 and triode V 2~V 9Base stage meet input bus A jointly, triode V 2~V 9Grounded collector, emitter and group row's resistance S 2The corresponding together pin 19,17,15,13,11,9,7,5 that connects integrated package D-4, group row's resistance S 2Opposite side and pin 1,3,4,6,8,10,12,14,16,18,20 common grounds of integrated package D-4, diode D 1, D 2, D 3, resistance R 10For being connected in series diode D 1The other end pass through capacitor C 4Ground connection, resistance R 10The pin 21 of another termination integrated package D-4, the corresponding respectively triode V that connect of the pin 22,23,24,25 of integrated package D-4 20, V 21, V 22, V 23Base stage, this base stage is also respectively corresponding to resistance S 3-1, S 3-2, S 3-3, S 3-4Meet+the 5V power supply triode V 20~V 23The equal ground connection of emitter, collector electrode is all corresponding to resistance S 4-1, S 4-2, S 4-3, S 4-4Meet stabilized voltage power supply V 25The 3rd end, V 20~V 23Collector electrode also connect not gate U respectively 10:B, U 10:A, U 10:C, U 10:DThe 3rd, 1,5,7 ends, the pin 26 of integrated package D-4 connects+the 15V power supply, pin 27~39 all connects control bus B, the corresponding respectively triode V that connect of pin 2,44,42,40 10, V 13, V 15, V 17Emitter, pin 43,41 ground connection, triode V 10, V 13, V 15, V 17The respectively corresponding triode V that connects of collector electrode 24, V 14, V 16, V 18Base stage, V 10, V 13, V 15, V 17Base stage pass through resistance R respectively 2, R 3, R 4, R 5The corresponding not gate U that connects 10:B, U 10:A, U 10:C, U 10:DThe 4th, 2,6,8 ends, triode V 24, V 14, V 16, V 18The equal ground connection of collector electrode, emitter is all to output bus C, not gate U 10:B, U 10:A, U 10:C, U 10:DThe 4th, 2,6,8 ends also respectively correspondence pass through resistance R 237With light-emitting diode RED 13, resistance R 238With light-emitting diode RED 14, resistance R 239With light-emitting diode RED 15, resistance R 240With light-emitting diode RED 16To ground, stabilized voltage power supply V 1The 1st termination-12V power supply, the 3rd end passes through capacitor C respectively 4Ground connection is passed through capacitor C 5Meet stabilized voltage power supply V 25The 2nd end, stabilized voltage power supply V 1The 2nd end ground connection, stabilized voltage power supply V 12, V 25, V 11The 1st end all meet+the 18V power supply V 12The 3rd end be output+15V power supply, this 3rd end also passes through capacitor C 6, C 7Parallel connection with the 2nd end ground connection, V 25The 3rd end pass through capacitor C 24, C 23Parallel connection be connected stabilized voltage power supply V with its 2nd end 19The 3rd end be output+5V power supply, the 1st end and stabilized voltage power supply V 11The 3rd end be connected V 19, V 11The equal ground connection of the 2nd end.
4, video matrix switcher according to claim 1 is characterized in that described control section is by integrated package D-1, D-2, D-3, D-13, D-14, D-15, group row switch SW, resistance R 56-1, R 56-2, R 56-3, R 56-4, R 6, R 7, R 30, NAND gate D-18:A, D-18:B, D-18:C, D-18:D, with a door D-17:A, capacitor C 1, C 2, C 3, C 8, quartz crystal Y, photoisolator D-16, communication bus socket B 1, control bus B forms, the pin 14 of integrated package D-15 connects+the 5V power supply, pin 1,7 to communication bus socket B 1, pin 7 also is connected with ground, and pin 3 passes through resistance R 6The 1st end that connects photoisolator D-16, the 2nd end of D-16 and the 4th end ground connection, the 5th end passes through resistance R 7Connect the pin 10 of integrated package D-1 with the 3rd end, the pin 1 of integrated package D-13 passes through capacitor C 3Ground connection, pin 2 passes through resistance R 30Connect jointly+the 5V power supply with pin 7,8, pin 3 passes through capacitor C 8Ground connection, pin 4 ground connection, pin 6 connects the pin 9 of integrated package D-1, as the pin 1,2,3,4 of the integrated package D-1 of CPU pin 8,7,6,5 and the resistance R of corresponding connection group row switch SW respectively 56-1, R 56-2, R 56-3, R 56-4, pin 1,2,3, the 4 equal ground connection of group row switch SW, resistance R 56-1, R 56-2, R 56-3, R 56-4The other end all connect+the 5V power supply, the pin 5,6,7 of integrated package D-1 connects the pin 1,3,2 of integrated package D-14 respectively, and the pin 4,5,6,7 of D-14 all meets control bus B, and the pin 8 of D-1 connects the 2nd end with door D-17:A, pin 12 meets control bus B, and pin 19 passes through capacitor C 1Ground connection, pin 18 passes through capacitor C 2Ground connection, pin 18,19 also are connected by quartz crystal Y, the pin 16 of integrated package D-1 meets 12 of NAND gate D-18:D, 13 two ends, 11 ends of D-18:D connect the 1st end with door D-17:A, the 10th end of the 3rd termination NAND gate D-18:C of D-17:A, the 4th end of the 10th end of D-18:C and the 2nd end of D-18:A and D-18:B interconnects, the pin 39 of integrated package D-1,38,37,36 all meet control bus B, pin 39,38,37,36,35,34,33,32 again with the pin 3 of integrated package D-2,4,7,8,13,14,17,18 connect the pin 11 of integrated package D-3 together, 12,13,15,16,17,18,19, the pin 35 of integrated package D-1,34, the 33 corresponding respectively NAND gate D-18:B that connect, D-18:A, the 5th of D-18:C, 1,9 ends, the pin 21 of integrated package D-1,22,23,24,25 all connect the pin 25 of integrated package D-3,24,21,23,2, the pin 10 of integrated package D-1 connects the 3rd end of photoisolator D-16, pin 30 connects the pin 11 of integrated package D-2, pin 29 connects the pin 22 of integrated package D-3, pin 1 ground connection of integrated package D-2, pin 6,9,12,15,16,19 connect the pin 8 of integrated package D-3 respectively, 7,6,5,4,3, the pin 2 of integrated package D-2,5 and the pin 10 of integrated package D-3,9 meet control bus B jointly, pin 20 ground connection of integrated package D-3, pin 22 connects the pin 29 of integrated package D-1, the pin 27 of integrated package D-3, pin 1 all connects+the 5V power supply, NAND gate D-18:A, D-18:B, the 3rd of D-18:C, 6,8 ends all meet control bus B.
5, video matrix switcher according to claim 1, the video output circuit that it is characterized in that described video output are by stabilized voltage power supply V 26, V 27, V 28, integrated package E 1, resistance R 8, R 9, R 10, R 11, R 12, R 13, adjustable resistance R 14, capacitor C 9, C 10, C 11, C 25, video accessory power outlet B 2Form stabilized voltage power supply V 28The 1st termination-12V power supply, the 2nd end ground connection, the 3rd end and integrated package E 1Pin 4 pass through capacitor C together 9Ground connection, resistance R 9, adjustable resistance R 14For being connected in series R 14Other end ground connection, R 9Another termination integrated package E 1Pin 2, E 1Pin 2 also pass through resistance R 10Be connected with pin 6, pin 6 also passes through resistance R 12Meet video accessory power outlet B 2, E 1Pin 8 connect the control bus B of control circuits, E 1Pin 8 also pass through resistance R 13With pin 7 and stabilized voltage power supply V 26The 3rd end pass through capacitor C together jointly 10Ground connection, stabilized voltage power supply V 26The 2nd end ground connection, the 1st termination power V Cc, integrated package E 1Pin 3 pass through capacitor C respectively 11To video output bus C, pass through resistance R 11Ground connection, stabilized voltage power supply V 27The 1st termination power V Cc, the 2nd end ground connection, the 3rd end passes through resistance R respectively 8Meet output bus C, pass through capacitor C 25Ground connection.
CN 97250700 1997-08-20 1997-08-20 Switching-over arrangement for video frequency matrix Expired - Fee Related CN2303411Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 97250700 CN2303411Y (en) 1997-08-20 1997-08-20 Switching-over arrangement for video frequency matrix

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 97250700 CN2303411Y (en) 1997-08-20 1997-08-20 Switching-over arrangement for video frequency matrix

Publications (1)

Publication Number Publication Date
CN2303411Y true CN2303411Y (en) 1999-01-06

Family

ID=33957198

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 97250700 Expired - Fee Related CN2303411Y (en) 1997-08-20 1997-08-20 Switching-over arrangement for video frequency matrix

Country Status (1)

Country Link
CN (1) CN2303411Y (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102064050A (en) * 2010-11-04 2011-05-18 芯通科技(成都)有限公司 Matrix switch
CN102629990A (en) * 2012-04-16 2012-08-08 天津市英贝特航天科技有限公司 Single-point bidirectional video matrix circuit
CN101742118B (en) * 2008-11-11 2013-05-01 索尼株式会社 Switcher control device, switcher control method, and image synthesizing apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101742118B (en) * 2008-11-11 2013-05-01 索尼株式会社 Switcher control device, switcher control method, and image synthesizing apparatus
CN102064050A (en) * 2010-11-04 2011-05-18 芯通科技(成都)有限公司 Matrix switch
CN102629990A (en) * 2012-04-16 2012-08-08 天津市英贝特航天科技有限公司 Single-point bidirectional video matrix circuit
CN102629990B (en) * 2012-04-16 2014-04-16 天津市英贝特航天科技有限公司 Single-point bidirectional video matrix circuit

Similar Documents

Publication Publication Date Title
CN2303411Y (en) Switching-over arrangement for video frequency matrix
CN109687840A (en) Low-loss minimizes silicon substrate numerical-control attenuator
CN206077229U (en) A kind of adjustable controllable multipath isolated DC power supply of gear more
CN2293923Y (en) Radio-frequency switch
CN2783602Y (en) Intelligent automatic charger with polarity protection
CN106533218A (en) Three-phase rectifying circuit and driving control method
CN206293338U (en) A kind of frequency modulation switch
CN2358649Y (en) Controllable branch distributer capable of addressing and making charge management
CN209545550U (en) A kind of high speed high current hot-swap switching circuit
CN2214051Y (en) Radio control switch with address coding
CN2682749Y (en) Television set with AV/TV switching function
CN2273933Y (en) Voltage-controlled attenuator for cable television signals
CN214674428U (en) Control circuit for mutual communication of chip states of double-port/multi-port charger
CN2174808Y (en) Antenna socket for television
CN2277609Y (en) High-frequency electronic switch for cable TV signal
CN2363445Y (en) Interfering/no-interfering selection controller for television signal
CN202565386U (en) Video device and circuit controlling SCART interface output voltage
CN2631159Y (en) Cable television two-way terminal controller
CN209674207U (en) Intelligent remote lightning protection device faiture alarm acquisition system
CN209046606U (en) A kind of digital output circuit and automobile
CN2333132Y (en) Remote-control black-and-white television
CN200983618Y (en) Ground STB antenna power supply circuit
CN2273931Y (en) Four way mixed amplifier
CN2490776Y (en) Double-channel building amplifier
CN2331134Y (en) Cabled TV amplitude modulated interference controller

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee