CN2278318Y

CN2278318Y - Television data transmitting receiving card

Info

Publication number: CN2278318Y
Application number: CN 96235812
Authority: CN
Inventors: 郝毅; 薛少丽
Original assignee: Xian Jiaotong University
Current assignee: Xian Jiaotong University
Priority date: 1996-04-18
Filing date: 1996-04-18
Publication date: 1998-04-08
Anticipated expiration: 2006-04-18

Abstract

The utility model relates to a data transmitting receiving card which adopts a DMA mode to receive the data and adopts a sand beach signal. The utility model is composed of an RF signal processor, a data collector and controller, a sand beach signal generating circuit, a CPU, an 8255 interface circuit, etc. The users can receive information which is transmitted through a TV station as long as the data transmitting receiving card is arranged by a wire jumping mode according to requirements, and the data transmitting receiving card is inserted into an expansion slot of a computer and is matched with a corresponding computer software; the users can do various processes and display to the received information; the display data can be received with a relatively high speed, and the interference is reduced.

Description

Television data broadcast receiving card

The utility model is a kind of television data broadcast receiving card, is about being additional to the receiving system of the data message in the TV signal, can be applicable to aspects such as data communication, message transmission, multimedia.

The television data broadcast system utilizes existing broadcasting and television network to carry out a kind of technology of message transmission.It does not occupy specific channel separately, only information is additional in the common television broadcasting signal.It is that want information transmitted is superimposed upon the vertical blanking period of TV signal with the form of digital signal, is sent to the user with conventional television signal.At receiving terminal, reproduce out after reception is handled through receiving card.Existing television data broadcast receiving card has following several: a kind of is not have CPU on the receiving card, with the transmission and the control of the reception order of the direct control data of main frame; A kind of is that CPU is arranged on the receiving card, with the reception of CPU control data and the transmission and the control of order.But, not adopting the dma mode Data transmission on the existing television data broadcast receiving card, speed is slower.

The purpose of this utility model provides the television data broadcast receiving card that a kind of employing dma mode receives data and adopted sand drift signal (SAND), the user is as long as stick into capable wire jumper setting to this on request, and will block in the expansion slot of inserting computer, mix correspondent computer software, just can receive the information of sending by TV station, and the information that receives carried out various processing and demonstration, can receive video data with very high speed, and reduce interference.

Fig. 1 is a structure principle chart of the present utility model.

Fig. 2 is the oscillogram of sand drift signal (SAND).

Fig. 3 is the generation circuit of sand drift signal (SAND).

Below in conjunction with accompanying drawing structural principle of the present utility model and operation principle are done detailed explanation.

Referring to Fig. 1, the TV signal that the utility model will contain image, text and data information receives, detects and decodes and reproduces.It mainly is made up of radiofrequency signal processor U1, video signal preprocessor U2, data acquisition and controller U3, buffer U4, sand drift signal (SAND) generation circuit U 5, CPU U6,8255 interface circuit U7.The output of radiofrequency signal processor U1 is connected to the input of video signal preprocessor U2.The image, text and data of video signal preprocessor U2 (TTD) output signal, picture and text clock (TTC) output signal and composite synchronizing signal (VCS) output are connected to data acquisition and the corresponding input of controller U3 respectively.Simultaneously, composite synchronizing signal (VCS) is also delivered to CPU U6.CPU U6 produces a signal (BLANK) by software and exports from an I/O terminal, delivers to sand drift signal (SAND) and produces circuit U 5.The CBB signal of data acquisition and controller U3 output is connected to sand drift signal (SAND) and produces circuit U 5.The output of sand drift signal (SAND) generation circuit U 5 is connected to the corresponding terminal of video signal preprocessor U2.Data acquisition links to each other so that transmit data and order with buffer U4 by bus with controller U3.Also link to each other so that transmission data and order between data acquisition and controller U3 and the CPU U6 by bus.Also link to each other between data acquisition and controller U3 and the 8255 interface circuit U7 by bus.Like this, this television data broadcast receiving card can not pass through CPU U6 directly with transfer of data to 8255 interface circuit U7.Also link to each other in order to transmission data and order between CPUU6 and the 8255 interface circuit U7 by bus.Link to each other by control bus between CPU U6 and the computer bus BUS.Link to each other by bus between 8255 interface circuit U7 and the computer bus BUS.Main frame is set to dma mode when receiving mass data, can data be stored in the internal memory of computer with very high speed.

The course of work of the present utility model is: radiofrequency signal processor U1 receives the TV RF signals that contains image, text and data, obtains vision signal through conversion with after handling, and vision signal is sent into the input of video signal preprocessor U2.Video signal preprocessor U2 detects the facsimile data signal that is additional to the TV signal vertical blanking period from above-mentioned vision signal under the control of sand drift signal (SAND), obtain required image, text and data (TTD) output signal and picture and text clock (TTC) output signal and composite synchronizing signal (VCS), it is delivered to data acquisition and the corresponding input of controller U3 respectively.Data acquisition and controller U3 just can collect required data and it is temporary among the buffer U4 according to the order of CPU U6.Under the control of CPU U6, under dma mode, data are stored in the internal memory of computer then, wait for Computer Processing with very high speed through 8255 interface circuit U7 and computer bus BUS.Mix correspondent computer software, just can carry out various processing and demonstration the information that receives.

Referring to Fig. 3, sand drift signal (SAND) produces circuit U 5, comprises NAND gate U8, the U9, resistance R, the NAND gate U10 that are one another in series, connects a capacitor C over the ground between resistance R and NAND gate U10.The output of NAND gate U10 is connected to the T of CPUU6 ₀End.The composite synchronizing signal (VCS) that U2 produces is connected to the T of CPU U6 ₁End.The P of CPU U6 _1.0The CBB signal that end produces (BLANK) signal and data acquisition and controller U3 is connected to the input with door U11, is required sand drift signal (SAND) with the output of door U11.Again through resistance R, capacitor C integration, after the U10 shaping, deliver to the T of CPU U6 behind composite synchronizing signal VCS process NAND gate U8, the U9 ₀End.The T of while CPU U6 ₁End is also imported composite synchronizing signal (VCS), the BLANK signal that CPU U6 is produced by software and the CBB signal of data acquisition and controller U3 generation with after obtain required sand drift signal (SAND).

From above-mentioned structural principle of the present utility model and the course of work as can be seen, because structure of the present utility model can work in dma mode, thereby can receive video data with very high speed.And the utility model has adopted sand drift signal (SAND), has reduced interference.Experiment shows that this television data broadcast receiving card can receive common data broadcasting information and expert data broadcast message well.

Considering now generally all has video output terminals on television set, video tape recorder or the satellite receiver of family expenses, in order to reduce cost, also can remove radiofrequency signal processor U1 (about more than 300 yuan of RMB), and vision signal is directly adopted in input.

Description of drawings: among Fig. 1, U1 is the radiofrequency signal processor, and U2 is a video signal preprocessor, and U3 is data acquisition and controller, and U4 is a buffer, and U5 is that sand drift signal (SAND) produces circuit, and U6 is CPU, and U7 is 8255 interface circuits.RF is the TV RF signals that contains image, text and data, and video is the vision signal that contains image, text and data, and BUS is a computer bus, and CB represents control bus, and DB represents data/address bus, AB presentation address bus.

Fig. 2 has represented the sequential relationship between the waveform of sand drift signal (SAND) and it and the vision signal.

Among Fig. 3, U6 is CPU U6, and U6 adopts 8031 chips in this practical circuit, and T0 and T1 are two terminals of 8031.VCS is composite synchronizing signal (VCS), and CBB is the CBB signal of data acquisition and controller U3 output, and BLANK is the signal (BLANK) that CPU U6 is produced by software, and SAND is the sand drift signal (SAND) that will obtain.

Claims

1, television data broadcast receiving card, will be by radiofrequency signal processor (U1), video signal preprocessor (U2), data acquisition and controller (U3), buffer (U4), sand drift signal (SAND) produces circuit (U5), CPU (U6), 8255 interface circuits (U7) are formed, feature of the present utility model is: the output of radiofrequency signal processor (U1) is connected to the input of video signal preprocessor (U2), image, text and data (TTD) output signal of video signal preprocessor (U2), picture and text clock (TTC) output signal and composite synchronizing signal (VCS) are connected to data acquisition and the corresponding input of control (U3) respectively, composite synchronizing signal (VCS) is also delivered to CPU (U6), CPU (U6) produces a signal (BLANK) by software and exports from an I/O terminal, the output of delivering to sand drift signal (SAND) generation circuit (U5) is connected to the respective terminal of video signal preprocessor (U2), data acquisition links to each other so that transmit data and order with buffer (U4) by bus with control (U3), also link to each other between data acquisition and control (U3) and 8255 interface circuits (U7), also link to each other in order to transmission data and order between CPU (U6) and 8255 interface circuits (U7) by bus by bus.

2, television data broadcast receiving card according to claim 1, it is characterized in that, said sand drift signal (SAND) produces circuit (U5), comprise the NAND gate (U8) that is one another in series (U9), resistance (R), NAND gate (U10), connect an electric capacity (C) NAND gate between resistance (R) and NAND gate (U10) over the ground, U (10) output is connected to the T of CPU (U6) ₀End.(U2) composite synchronizing signal of Chan Shenging (VCS) is connected to the lower end of CPU (U6), the P of CPU (U6) _1.0End produces (BLANK) signal and CBB signal (U3) is connected to and the input of door (U11).