CN2254191Y - Light beam and digit double display installation type KWH meter - Google Patents

Abstract

The utility model relates to a light beam and digit double display installation type KWH meter. A light beam displayer, a digital displayer base plate, and a power factor voltage converter module or a phase angle voltage converter module are arranged in a casing. A digital display circuit comprises an analog-to-digital converter, an emitter follower of a decoder power triode and a digital character displayer. The light beam display circuit comprises a preamplifier, a comparison display network, and a reference level generator. The measured power factor is converted into a DC level via a power voltage converter, and identically the measured phase angle can be converted into the DC level via a phi/V converter. After the conversion of the electrical signal by the DC level through the light beam display circuit and the digital display circuit, two displays of the light beam and digits are output.

Description

The two installing type ammeters that show of light beam numeral

The utility model relates to the two installing type ammeters that show of a kind of light beam numeral, belongs to the improvement technical field of electrical measuring instrument.Be applicable to the measurement at power factor and phasing degree.

The shortcoming that its static measurement of the direct effect simulated pointer electrical measuring instrument of widespread usage now exists is: 1. scale interval density is low excessively, and the scale accumulative total of the angular displacement of simulated pointer shows that steady-state value registration error increases; 2. the people has introduced the range estimation resolution error for reading displayed test registration; The disturbing influence of frequency change the accuracy of registration; 4. anti-distortion scarce capacity.It is that 1. mechanical indicators overload nargin is little that its dynamic trend is measured the shortcoming that exists, and impact resistance is poor; 2. limited mechanical life; 3. the transmission characteristic of electromagnetic system is similar to 2 rank systems, and the frequency response ability is subjected to restriction to the extreme.

The purpose of this utility model is to provide a kind of light beam numeral two installing type ammeters that show, in order to measure power factor and the phasing degree in the power circuit, adopt numeral, the two demonstrations of light beam, both improved the precision of static readout, improve the accuracy of transient process trend discrimination again.

The purpose of this utility model is achieved in that

Be provided with bar graphic display and digital indicator substrate, power factor electric pressure converter module and transformer, mutual inductor in the housing, the rear end face of base housing is provided with power supply terminal and measurement terminal, and the front end face of housing is provided with panel and transparency window.Described digital indicator circuit structure is: analog-digital conversion ic IC1 is converted to digital quantity with tested direct current modulus by input end IN+, IN-input, output port output by numerical character, through driving code translator IC2, with the cascade of power discharging transistor emitter-follower, drive the numerical character display.Described analog to digital conversion circuit IC1 comprises the Voltage Reference source circuit that is electrically connected with input pin, integrating circuit and automatic zero set (AZS) circuit.Described bar graphic display circuit structure is: tested dc level signal by input end Vin through preposition adaptive amplifier R ₁₁, R ₁₂, R ₁₃, V _R1, U ₁After carrying out the signal processing and amplifying,, detect the output of level amplitude discrimination and show by comparing display network.R wherein ₁₆, R ₁₇, U ₃, VR ₂, ZD is with reference to level generator, precision resistor r plural serial stage is as R ₁₄, R ₁₅, U ₂, the cascade coupled network that relatively shows of D.Described cos φ/V converter circuit structure is: sampled signal is respectively ac voltage signal UmSinwt and ac current signal ImSin (wt+ φ), through attenuator VR ₃, R ₁₈VR ₄, R ₂₁Input to shaping amplifier R ₁₉, D ₁, D ₂, U ₄R ₂₀, D ₃, D ₄, U ₅Reciprocal of duty cycle square wave sequence such as be converted to after the shaping.Again through two groups of phase detector U ₆, C ₅, R ₂₆, D ₅U ₆, C ₆, R ₂₇, D ₆, form differential positive pulse sequence, export two-way phase demodulation level to master-slave flip-flop U7, work as UmSinwt, the synchronous rectangle square wave after ImSin (wt+ φ) shaping is with two-way phase demodulation level and shake and swash device OSC pulse and mix the umber of pulse that generation is directly proportional with φ.Again through phase angle control phase counter U ₁₁, U ₁₂Parallel transient state storage data as the address, gating ROM (read-only memory) U ₁₃, make angle values finish scale and convert, make it to become the equivalent level output of power factor, drive digital to analog converter U ₁₄Convert analog level once more to by U ₁₅Output, wherein U ₁₀, S ₁, U ₁₆Be the level output channel+Vont of cos φ＞0, and U ₁₀, S ₂, U ₁₇Be the level output channel-Vont of cos φ＜0, U ₁₈, R ₃₅, R ₃₂, R ₃₃, R ₃₄, constitute the addition synthesizer, positive and negative two-way power factor (cos φ) level that is proportional to of reversible output.Output shows after digital indicator circuit that this DC level process is above-mentioned and the bar graphic display circuit conversion, and light beam and two kinds of demonstrations of numeral are then arranged on the panel.The dynamic trend indicating value that light beam is shown as power factor (PF) shows that the static indicating value that numeral is shown as power factor (PF) shows.

The ammeter that is used for measured phase angle is close with the structure of above-mentioned power factor meter, just the ROM (read-only memory) U in the power factor converter circuit ₁₃Remove, with U ₁₁, U ₁₂The direct gating digital to analog converter of parallel data U ₁₄Convert analog level to by U ₁₅Output.Again through the positive and negative two-way angle phi level that is proportional to of the reversible output of addition synthesizer.

The utility model has the advantages that:

The demonstration of measurement transient process trend and the static number registration Presentation Function of power circuit parameter are organically unified to be one, its digital indicator makes static indicating value count precision further to improve, the response of the trend of instantaneous demonstration shows the bar graphic display that adopts light emitting diode or plasma device to form, and it is more accurate to make the mistake of dynamic indicating value tide over trend discrimination.

Fig. 1 is the utility model structure master cut-open view.

Fig. 2 is the utility model right view.

Fig. 3 is the utility model vertical view.

Fig. 4 is the example structure front view.

Fig. 5 is the example structure vertical view.

Fig. 6 is the digital indicator circuit structure diagram.

Fig. 7 is the bar graphic display circuit structure diagram.

Fig. 8 is power factor (PF) voltage, phase angle voltage translator circuit structural drawing.

Describe the utility model in detail below in conjunction with accompanying drawing:

This installing type ammeter can adopt as Figure 1-3 the good square structure of versatility also can select high-precision wide-angle formula structure shown in Fig. 4,5 for use.Be provided with bar graphic display and digital indicator substrate 7, power factor (PF) electric pressure converter module 8 and transformer 10, mutual inductor 9 in the housing 4, the rear end face of base housing 3 is provided with power supply terminal 2 and measurement terminal 1, and the front end face of housing 4 is provided with panel 6 and transparency window 5.The digital indicator circuit structure as shown in Figure 6, digital voltmeter integrated circuit (IC) 1 (selecting 7105 for use) is the analog-to-digital core link of display, peripheral circuit comprises voltage reference source V _R, Dd, R ₃Circuit, integrating circuit C ₂R ₁, integration reference circuit C ₁, automatic zero set (AZS) circuit C ₃And the output port D of digital byte ₁-D ₅, IC ₂Be to drive code translator and TR ₁-TR ₆The cascade of power discharging transistor emitter-follower drives DIS numerical character display.IN+, IN-are respectively the input ends of tested DC level, with the continuous coverage of circuit-under-test output coupling back realization DC level.The bar graphic display circuit structure as shown in Figure 7.R ₁₁, R ₁₂, R ₁₃, V _R1, U ₁Form the preposition adaptive amplifier that is input as dc level signal Vin, R ₁₆, R ₁₇, U ₃, V _R2, ZD is the basis of reference level generator, multistage series connection precision resistor r is as R ₁₄, R ₁₅, U ₂, D is than the defeated cascade coupled network that shows, detect the output of level amplitude discrimination and show.Display possesses favorable linearity level frequency response performance.Cos φ/V converter circuit structure sampled signal as shown in Figure 8 is respectively ac voltage signal UmSinwt and ac current signal ImSin (wt+ φ), through attenuator VR ₃, R ₁₆VR ₄, R ₂₁Input to shaping amplifier R ₁₉, D ₁, D ₂, U ₄R ₂₀, D ₃, D ₄, U ₅Reciprocal of duty cycle square wave sequence such as be converted to after the shaping.Again through two groups of phase detector U ₆, C ₅, R ₂₆, D ₅U ₆, C ₆, R ₂₇, D ₆, form positive differentiated pulse sequence, to master-slave flip-flop U ₇Export two-way phase demodulation level, work as UmSinwt, the synchronous rectangle square wave after ImSin (wt+ φ) shaping mixes with the two-way phase demodulation level and the sharp device DSC pulse of shaking, and produces the umber of pulse that is directly proportional with φ.Afterwards, through phase angle control phase counter U ₁₁, U ₁₂Parallel transient state storage data as the address, gating ROM (read-only memory) U ₁₃, make angle values finish scale and convert, make it to become the equivalent level output of power factor, drive digital to analog converter U ₁₄Convert analog level once more to by U ₁₅Output, wherein U ₁₀, S ₁, U ₁₆Be the level output channel+Vont of cos φ＞0, and U ₁₀, S ₂, U ₁₇Be the level output channel-Vont of cos φ＜0, U ₁₈, R ₃₅, R ₃₂, R ₃₃, R ₃₄, constitute the addition synthesizer, positive and negative two-way power factor (cos φ) level that is proportional to of reversible output.Output shows after digital indicator circuit that this DC level process is above-mentioned and the bar graphic display circuit conversion, and light beam 11 and 12 two kinds of demonstrations of numeral are then arranged on the panel.Digital indicator can adopt light emitting diode semiconductor device or plasma display apparatus, in order to indication static direct current level.Bar graphic display can be selected light emitting diode row type assembly or plasma row type assembly for use, the dynamic DC level of flicker indication.

The ammeter that is used for measured phase angle is close with the structure of above-mentioned power factor meter, just the ROM (read-only memory) U in the power factor converter circuit ₁₃Remove, with U ₁₁, U ₁₂The direct gating digital to analog converter of parallel data U ₁₄Convert analog level to by U ₁₅Output.Again through the positive and negative two-way angle phi level that is proportional to of the reversible output of addition synthesizer.

Claims (2)

1. digital pair an of light beam shows the installing type ammeters, it is characterized in that being provided with in the housing bar graphic display and digital indicator substrate, power factor electric pressure converter module and transformer, mutual inductor, the rear end face of base housing is provided with power supply terminal and measurement terminal, and the front end face of housing is provided with panel and transparency window; Described digital indicator circuit structure is: analog-digital conversion ic IC1 is converted to digital quantity with tested DC analogue quantity by input end IN+, IN-input, output port output by numerical character, through driving code translator IC2, with the cascade of power discharging transistor emitter-follower, drive the numerical character display; Described analog to digital conversion circuit IC1 comprises the Voltage Reference source circuit that is electrically connected with input pin, integrating circuit and automatic zero set (AZS) circuit; Described bar graphic display circuit structure is: tested dc level signal by input end Vin through preposition adaptive amplifier R ₁₁, R ₁₂, R ₁₃, V _R1, U ₁After carrying out the signal processing and amplifying,, detect the output of level amplitude discrimination and show by comparing display network; R wherein ₁₆, R ₁₇, U ₃, V _R2, ZD is with reference to level generator, precision resistor r plural serial stage is as R ₁₄, R ₁₅, U ₂, the cascade coupled network that relatively shows of D; Described power factor voltage translator circuit structure is: sampled signal is respectively ac voltage signal UmSinwt and ac current signal ImSin (wt+ φ), through attenuator VR ₃, R ₁₆VR ₄, R ₂₁Input to shaping amplifier R ₁₉, D ₁, D ₂, U ₄R ₂₀, D ₃, D ₄, U ₅Reciprocal of duty cycle square wave sequence such as be converted to after the shaping.Again through two groups of phase detector U ₆, C ₅, R ₂₆, D ₅U ₆, C ₆, R ₂₇, D ₆, form positive differentiated pulse sequence, to master-slave flip-flop U ₇Export two-way phase demodulation level, work as UmSinwt, the synchronous rectangle square wave after ImSin (wt+ φ) shaping mixes with the two-way phase demodulation level and the sharp device OSC pulse of shaking, and produces the umber of pulse that is directly proportional with φ, again through phase angle control phase counter U ₁₁, U ₁₂Parallel transient state storage data as the address, gating ROM (read-only memory) U ₁₃, make angle values finish scale and convert, make it to become the equivalent level output of power factor, drive digital to analog converter U ₁₄Convert analog level once more to by U ₁₅Output, wherein U ₁₀, S ₁, U ₁₆Be the level output channel+Vont of cos φ＞0, and U ₁₀, S ₂, U ₁₇Be the level output channel-Vont of cos φ＜0, U ₁₈, R ₃₅, R ₃₂, R ₃₃, R ₃₄, constitute the addition synthesizer, positive and negative two-way power factor (cos φ) level that is proportional to of reversible output, output shows after digital indicator circuit that this DC level process is above-mentioned and the bar graphic display circuit conversion, and light beam and two kinds of demonstrations of numeral are then arranged on the panel.

2. digital pair an of light beam shows the installing type ammeters, it is characterized in that being provided with in the housing bar graphic display and digital indicator substrate, phasing degree electric pressure converter module and transformer, mutual inductor, the rear end face of base housing is provided with power supply terminal and measurement terminal, and the front end face of housing is provided with panel and transparency window; Described digital indicator circuit structure is: analog-digital conversion ic IC1 is converted to digital quantity with tested DC analogue quantity by input end IN+, IN-input, output port output by numerical character, through driving code translator IC2, with the cascade of power discharging transistor emitter-follower, drive the numerical character display; Described analog to digital conversion circuit IC1 comprises the Voltage Reference source circuit that is electrically connected with input pin, integrating circuit and automatic zero set (AZS) circuit; Described bar graphic display circuit structure is; Tested dc level signal by input end Vin through preposition adaptive amplifier R ₁₁, R ₁₂, R ₁₃, V _R1, U ₁After carrying out the signal processing and amplifying,, detect the output of level amplitude discrimination and show by comparing display network; R wherein ₁₆, R ₁₇, U ₃, V _R2, ZD is with reference to level generator, precision resistor r plural serial stage is as R ₁₄, R ₁₅, U ₂, the cascade coupled network that relatively shows of D; Described phasing degree voltage translator circuit structure is; Sampled signal is respectively ac voltage signal UmSinwt and ac current signal ImSin (wt+ φ), through attenuator VR ₃, R ₁₈VR ₄, R ₂₁Input to shaping amplifier R ₁₉, D ₁, D ₂, U ₄R ₂₀, D ₃, D ₄, U ₅Reciprocal of duty cycle square wave sequence such as be converted to after the shaping.Again through two groups of phase detector U ₆, C ₅, R ₂₆, D ₅U ₆, C ₆, R ₂₇, D ₆, form differential positive pulse sequence, export two-way phase demodulation level to master-slave flip-flop U7, work as UmSinwt, synchronous rectangle square wave after ImSin (wt+ φ) shaping mixes with the two-way phase demodulation level and the sharp device OSC pulse of shaking, and produces the umber of pulse that is directly proportional with φ, again through phase angle control phase counter U ₁₁, U ₁₂Parallel transient state storage data directly drive digital to analog converter U ₁₄Convert analog level once more to by U ₁₅Output, wherein U ₁₀, S ₁, U ₁₆Be the level output channel+Vont of φ＞0, and U ₁₀, S ₂, U ₁₇Be the level output channel-Vont of φ＜0, U ₁₈, R ₃₅, R ₃₂, R ₃₃, R ₃₄, constitute the addition synthesizer, the positive and negative two-way angle phi level that is proportional to of reversible output, output shows after digital indicator circuit that this DC level process is above-mentioned and the bar graphic display circuit conversion, and light beam and two kinds of demonstrations of numeral are then arranged on the panel.

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