CN221328930U - Amplifying circuit for high-voltage piezoelectric ceramic - Google Patents
Amplifying circuit for high-voltage piezoelectric ceramic Download PDFInfo
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- CN221328930U CN221328930U CN202322603106.8U CN202322603106U CN221328930U CN 221328930 U CN221328930 U CN 221328930U CN 202322603106 U CN202322603106 U CN 202322603106U CN 221328930 U CN221328930 U CN 221328930U
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Abstract
The utility model provides an amplifying circuit for high-voltage piezoelectric ceramics, which is formed by sequentially connecting an operational amplifier, a bias voltage circuit and a complementary push-pull circuit; the inverting input end of the operational amplifier is used for being connected with the signal input end and receiving an electric signal from the signal input end; the bias voltage circuit is used for receiving the electric signal from the operational amplifier and providing bias voltage for the complementary push-pull circuit; the complementary push-pull circuit is connected with the signal output end and is used for amplifying the electric signal from the bias voltage circuit to obtain an amplified signal and outputting the amplified signal through the signal output end; the operational amplifier, the bias voltage circuit and the complementary push-pull circuit all adopt discrete devices, so that the cost is reduced while the electric signal amplification and the driving of the high-voltage piezoelectric ceramic are realized, and the discrete devices are scattered and independent, so that the high-voltage piezoelectric ceramic has a better heat dissipation effect.
Description
Technical Field
The utility model relates to the field of amplifying circuits, in particular to an amplifying circuit for high-voltage piezoelectric ceramics.
Background
Piezoelectric ceramics are information functional ceramic materials capable of mutually converting mechanical energy and electric energy, and the piezoelectric ceramics have the characteristics of piezoelectricity, dielectricity, elasticity and the like, and are widely applied to the scenes of medical imaging, acoustic sensors, acoustic transducers, ultrasonic motors and the like. In the prior art, the piezoelectric ceramic is usually driven and controlled by a high-voltage driving circuit, the high-voltage driving circuit can realize higher voltage output and meet the driving requirement of the piezoelectric ceramic, a proportional amplifying circuit in the high-voltage driving circuit is usually a high-voltage integrated operational amplifier processed by a special process, the amplifier is usually a concentrated single chip, the cost is high, and as the chip integrates a plurality of parts together, the parts on the chip are too dense, and the heat dissipation effect is poor.
In view of this, overcoming the drawbacks of the prior art is a problem to be solved in the art.
Disclosure of utility model
The utility model aims to solve the technical problem of reducing the cost of an amplifying circuit for driving piezoelectric ceramics and improving the heat dissipation effect of the amplifying circuit.
The utility model adopts the following technical scheme:
In a first aspect, there is provided an amplifying circuit for a high voltage piezoelectric ceramic, comprising: an operational amplifier 1, a bias voltage circuit 2, and a complementary push-pull circuit 3, wherein:
The operational amplifier 1, the bias voltage circuit 2 and the complementary push-pull circuit 3 are connected in sequence;
The inverting input terminal of the operational amplifier 1 is connected with the signal input terminal 4 and receives an electric signal from the signal input terminal 4;
The bias voltage circuit 2 is used for receiving an electric signal from the operational amplifier 1 and providing bias voltage for the complementary push-pull circuit 3;
The complementary push-pull circuit 3 is connected with the signal output terminal 5, and the complementary push-pull circuit 3 is used for amplifying the electric signal from the bias voltage circuit 2 to obtain an amplified signal and outputting the amplified signal through the signal output terminal 5.
Preferably, the bias voltage circuit 2 specifically includes: diode D1, diode D2, diode D3, and diode D4, wherein:
The diode D1, the diode D2, the diode D3 and the diode D4 are sequentially connected;
The anode of the diode D1 is connected with the positive power supply end of the operational amplifier 1 through a resistor R10, the connection point between the diode D2 and the diode D3 is connected with the output end of the operational amplifier 1, and the cathode of the diode D4 is connected with the negative power supply end of the operational amplifier 1 through a resistor R11.
Preferably, the complementary push-pull circuit 3 specifically includes: resistor R1, triode Q1, resistance R2, resistance R3, triode Q2 and resistance R4, wherein:
The resistor R1, the triode Q1, the resistor R2, the resistor R3, the triode Q2 and the resistor R4 are connected in sequence;
The base electrode of the triode Q1 is connected with the diode D1, and the base electrode of the triode Q2 is connected with the diode D4.
Preferably, a emitter follower circuit 6 is further disposed between the complementary push-pull circuit 3 and the signal output terminal 5, and the emitter follower circuit 6 specifically includes: triode Q3, resistance R5, resistance R6 and triode Q4, wherein:
The triode Q3, the resistor R5, the resistor R6 and the triode Q4 are sequentially connected;
The emitter of the triode Q3 is connected with the resistor R1, the base electrode of the triode Q3 is connected with a connection point between the resistor R1 and the triode Q1, and a connection point between the collector of the triode Q3 and the resistor R5 is connected with a connection point between the triode Q1 and the resistor R2;
The connection point between the collector electrode of the triode Q4 and the resistor R6 is connected with the connection point between the resistor R3 and the triode Q2, the base electrode of the triode Q4 is connected with the connection point between the triode Q2 and the resistor R4, and the emitter electrode of the triode Q4 is grounded;
the junction between the resistor R5 and the resistor R6 is connected to the signal output terminal 5.
Preferably, a feedback resistor R17 is further disposed between the inverting input terminal of the operational amplifier 1 and the signal output terminal 5;
The feedback resistor R17 is used to define the amplification factor of the amplified signal.
Preferably, a resistor R8 and a resistor R9 are further arranged between the complementary push-pull circuit 3 and the emitter follower circuit 6, one end of the resistor R8 is connected with the emitter of the triode Q1, and the other end of the resistor R8 is connected with the collector of the triode Q3;
One end of a resistor R9 is connected with the emitter of the triode Q2, and the other end of the resistor R9 is connected with the collector of the triode Q4.
Preferably, the emitter of the triode Q3 and the resistor R1 are also connected to a first power supply module 7, respectively.
Preferably, the first power module 7 specifically includes: a power supply terminal 71, a booster circuit 72, and a voltage stabilizing circuit 73, wherein:
The power supply end 71, the booster circuit 72 and the voltage stabilizing circuit 73 are connected in sequence;
the boost circuit 72 is configured to receive the electrical signal from the power supply terminal 71 and amplify the voltage of the electrical signal from the power supply terminal 71;
the voltage stabilizing circuit 73 is configured to receive the amplified electrical signal and to provide an output impedance for the amplified electrical signal, thereby enhancing the load carrying capability of the amplified electrical signal.
Preferably, the boost circuit 72 specifically includes: a driver 721, a transformer 722, and a voltage doubler 723, wherein:
the driver 721, the transformer 722 and the voltage doubling circuit 723 are connected in sequence;
The driver 721 is connected to the power supply terminal 71, and the driver 721 is configured to receive an electrical signal from the power supply terminal 71 and drive the transformer 722;
The transformer 722 is configured to amplify the received electrical signal by a first preset multiple to obtain a primary amplified signal;
The voltage doubling circuit 723 is configured to receive a primary amplified signal from the transformer 722 and amplify the primary amplified signal by a second preset multiple to obtain a secondary amplified signal.
Preferably, the positive power supply terminal of the operational amplifier 1 is connected to the second power supply module 8.
The utility model provides an amplifying circuit for high-voltage piezoelectric ceramics, which is formed by sequentially connecting an operational amplifier 1, a bias voltage circuit 2 and a complementary push-pull circuit 3; the inverting input terminal of the operational amplifier 1 is connected with the signal input terminal 4 and receives an electric signal from the signal input terminal 4; the bias voltage circuit 2 is used for receiving an electric signal from the operational amplifier 1 and providing bias voltage for the complementary push-pull circuit 3; the complementary push-pull circuit 3 is connected with the signal output end 5, and the complementary push-pull circuit 3 is used for amplifying the electric signal from the bias voltage circuit 2 to obtain an amplified signal and outputting the amplified signal through the signal output end 5; the operational amplifier 1, the bias voltage circuit 2 and the complementary push-pull circuit 3 all adopt discrete devices, so that the cost is reduced while the amplifying circuit is realized, and the discrete devices are scattered and independent, so that the radiating effect is better.
Drawings
In order to more clearly illustrate the technical solution of the embodiments of the present utility model, the drawings that are required to be used in the embodiments of the present utility model will be briefly described below. It is evident that the drawings described below are only some embodiments of the present utility model and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a circuit block diagram of an amplifying circuit in an amplifying circuit for a high-voltage piezoelectric ceramic according to an embodiment of the present utility model;
FIG. 2 is a schematic circuit diagram of an amplifying circuit in an amplifying circuit for high voltage piezoelectric ceramics according to an embodiment of the present utility model;
FIG. 3 is a schematic circuit diagram of a first power module in an amplifying circuit for high voltage piezoelectric ceramics according to an embodiment of the present utility model;
FIG. 4 is a schematic circuit diagram of a boost circuit in an amplifying circuit for high voltage piezoelectric ceramics according to an embodiment of the present utility model;
FIG. 5 is a schematic circuit diagram of a voltage stabilizing circuit in an amplifying circuit for high voltage piezoelectric ceramics according to an embodiment of the present utility model;
FIG. 6 is a circuit block diagram of an amplifying circuit for a high voltage piezoelectric ceramic according to an embodiment of the present utility model;
Wherein, the reference numerals in the drawings are as follows:
An operational amplifier 1; a bias voltage circuit 2; a complementary push-pull circuit 3; a signal input terminal 4; a signal output terminal 5; a stage follower circuit 6; a first power supply module 7; a power supply terminal 71; a booster circuit 72; a driver 721; a transformer 722; a voltage doubler circuit 723; a voltage stabilizing circuit 73; a second power supply module 8.
Detailed Description
The present utility model will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present utility model more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.
In the description of the present utility model, the terms "inner", "outer", "longitudinal", "transverse", "upper", "lower", "top", "bottom", etc. refer to an orientation or positional relationship based on that shown in the drawings, merely for convenience of describing the present utility model and do not require that the present utility model must be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
The terms "first," "second," and the like herein are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", etc. may explicitly or implicitly include one or more such feature. In the description of the present utility model, unless otherwise indicated, the meaning of "a plurality" is two or more.
In the present utility model, unless explicitly specified and limited otherwise, the term "connected" is to be construed broadly, and for example, "connected" may be either fixedly connected, detachably connected, or integrally formed; can be directly connected or indirectly connected through an intermediate medium. Furthermore, the term "coupled" may be a means of electrical connection for achieving signal transmission.
In addition, the technical features of the embodiments of the present utility model described below may be combined with each other as long as they do not collide with each other.
Example 1:
embodiment 1 of the present utility model provides an amplifying circuit for a high-voltage piezoelectric ceramic, as shown in fig. 1 and 2, including: an operational amplifier 1, a bias voltage circuit 2, and a complementary push-pull circuit 3, wherein:
The operational amplifier 1, the bias voltage circuit 2 and the complementary push-pull circuit 3 are connected in sequence; the inverting input terminal of the operational amplifier 1 is connected with the signal input terminal 4 and receives an electric signal from the signal input terminal 4; the bias voltage circuit 2 is used for receiving an electric signal from the operational amplifier 1 and providing bias voltage for the complementary push-pull circuit 3; the complementary push-pull circuit 3 is connected with the signal output terminal 5, and the complementary push-pull circuit 3 is used for amplifying the electric signal from the bias voltage circuit 2 to obtain an amplified signal and outputting the amplified signal through the signal output terminal 5.
As shown in fig. 2, in this embodiment, the operational amplifier 1 includes a non-inverting input terminal and an inverting input terminal, where the inverting input terminal is used to connect with the signal input terminal 4, and the non-inverting input terminal is grounded; the signal input end 4 is used for receiving an externally provided electric signal and inputting the externally provided electric signal into the whole circuit so as to amplify the electric signal subsequently; in this embodiment, a resistor R12 is further disposed between the non-inverting input end and the ground line, and a resistor R13 is further disposed between the inverting input end and the signal input end 4, where a resistance value of the resistor R12 may be 9.1kΩ, and a resistance value of the resistor R13 may be 5kΩ; in this embodiment, the operational amplifier 1 itself amplifies the input electrical signal, and then amplifies the electrical signal by a specified multiple through other circuits. The bias voltage circuit 2 is configured to provide a bias voltage to a subsequent complementary push-pull circuit 3, and amplify a signal for the second time by the complementary push-pull circuit 3, and then output the amplified signal.
In this embodiment, the bias voltage circuit 2 includes a plurality of diodes, the complementary push-pull circuit 3 includes a plurality of discrete devices such as a triode and a resistor, and is connected to form a corresponding circuit, compared with a high-voltage integrated operational amplifier adopting a special process in the prior art, the cost required for connection and modulation between the discrete devices is lower, and because each discrete device is independent of each other, heat cannot be concentrated on a single chip, so that the heat dissipation effect is further improved.
The bias voltage circuit 2 is described below as follows:
As shown in fig. 2, the bias voltage circuit 2 specifically includes: diode D1, diode D2, diode D3, and diode D4, wherein:
The diode D1, the diode D2, the diode D3 and the diode D4 are sequentially connected; the anode of the diode D1 is connected with the positive power supply end of the operational amplifier 1 through a resistor R10, the connection point between the diode D2 and the diode D3 is connected with the output end of the operational amplifier 1, and the cathode of the diode D4 is connected with the negative power supply end of the operational amplifier 1 through a resistor R11.
As shown in fig. 2, the cathode of the diode D1 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the anode of the diode D3, and the cathode of the diode D3 is connected to the anode of the diode D4, and it should be noted that the positive power supply end of the operational amplifier 1 is further connected to a second power supply module 8, and the second power supply module 8 provides electric energy for the whole amplifying circuit, in this embodiment, the second power supply module 8 may be 12V.
In this embodiment, the diode D1 may be a 1N4001 model, the diode D2 may be a 1N4001 model, the diode D3 may be a 1N4001 model, and the diode D4 may be a 1N4001 model.
As shown in fig. 2, a resistor R10 is further disposed between the diode D1 and the positive power supply terminal of the operational amplifier 1, and in this embodiment, the resistance value of the resistor R10 may be 1.5kΩ; a resistor R11 is further disposed between the diode D4 and the negative power supply terminal of the operational amplifier 1, the resistance value of the resistor R11 may be 1.5kΩ, and a ground line is disposed between the resistor R11 and the negative power supply terminal of the operational amplifier 1.
The complementary push-pull circuit 3 is described below as follows:
As shown in fig. 2, the complementary push-pull circuit 3 specifically includes: resistor R1, triode Q1, resistance R2, resistance R3, triode Q2 and resistance R4, wherein:
the resistor R1, the triode Q1, the resistor R2, the resistor R3, the triode Q2 and the resistor R4 are connected in sequence; the base electrode of the triode Q1 is connected with the diode D1, and the base electrode of the triode Q2 is connected with the diode D4.
In this embodiment, the resistance of the resistor R1 may be 150Ω, the resistance of the resistor R2 may be 150Ω, the resistor R3 may be 150Ω, the resistor R4 may be 150Ω, the transistor Q1 may be MMBTA model number 42, and the transistor Q2 may be MMBTA model number 92. The connection point between the resistor R2 and the resistor R3 is also connected with the ground line.
As shown in fig. 2, after the electric signal passes through the operational amplifier 1 and the complementary push-pull circuit 3, since the output capability of the complementary push-pull circuit 3 is weak, in general, an electric signal with high intensity cannot be output, since the electric signal itself is amplified after the electric signal passes through the operational amplifier 1 and the complementary push-pull circuit 3, the electric signal itself has high intensity, which results in that the complementary push-pull circuit 3 is difficult to output the amplified electric signal, and the load capability is weak, in order that the complementary push-pull circuit 3 can smoothly output the electric signal, the embodiment further relates to the following design:
As shown in fig. 2, a stage follower circuit 6 is further disposed between the complementary push-pull circuit 3 and the signal output terminal 5, and the stage follower circuit 6 specifically includes: triode Q3, resistance R5, resistance R6 and triode Q4, wherein:
The triode Q3, the resistor R5, the resistor R6 and the triode Q4 are sequentially connected; the emitter of the triode Q3 is connected with the resistor R1, the base electrode of the triode Q3 is connected with a connection point between the resistor R1 and the triode Q1, and a connection point between the collector of the triode Q3 and the resistor R5 is connected with a connection point between the triode Q1 and the resistor R2; the connection point between the collector electrode of the triode Q4 and the resistor R6 is connected with the connection point between the resistor R3 and the triode Q2, the base electrode of the triode Q4 is connected with the connection point between the triode Q2 and the resistor R4, and the emitter electrode of the triode Q4 is grounded; the junction between the resistor R5 and the resistor R6 is connected to the signal output terminal 5.
In this embodiment, as shown in fig. 2, the transistor Q4 and the resistor R4 are further connected to ground. The emitter follower circuit 6 is used as an output buffer stage, so that lower output impedance is provided, and the load capacity is enhanced. In this embodiment, the resistor R5 may be 2.2Ω, the resistor R6 may be 2.2Ω, the transistor Q3 may be MMBTA to 92, and the transistor Q4 may be MMBTA to 42.
As shown in fig. 2, a resistor R8 and a resistor R9 are further disposed between the complementary push-pull circuit 3 and the emitter follower circuit 6, one end of the resistor R8 is connected to the emitter of the triode Q1, and the other end of the resistor R8 is connected to the collector of the triode Q3; one end of a resistor R9 is connected with the emitter of the triode Q2, and the other end of the resistor R9 is connected with the collector of the triode Q4; in this embodiment, the resistance of the resistor R8 may be 1.5kΩ, and the resistance of the resistor R9 may be 1.5kΩ.
Since most amplifying circuits also need to have a function of enabling a user to customize an amplification factor, in this embodiment, the operational amplifier 1, the bias voltage circuit 2, the complementary push-pull circuit 3 and the emitter follower circuit 6 are connected to each other to amplify only an input electric signal by a specified multiple, and the amplification factor is determined by one or more of each diode model, each triode model, each resistor resistance and the model of the operational amplifier 1, so that in order for the user to customize the amplification factor of the input electric signal, the embodiment further relates to the following design:
As shown in fig. 2, a feedback resistor R17 is further disposed between the inverting input terminal of the operational amplifier 1 and the signal output terminal 5; the feedback resistor R17 is used to define the amplification factor of the amplified signal.
In this embodiment, as shown in fig. 2, one end of the feedback resistor R17 is connected to a connection point between the inverting input terminal of the operational amplifier 1 and the resistor R13, and the other end is connected to the signal output terminal 5. The maximum resistance of the feedback resistor R17 may be 100kΩ, and the amplification factor of the amplified signal may be adjusted by adjusting the resistance of the feedback resistor R17.
Since the amplification of the electrical signal itself also requires a corresponding power supply, this embodiment also relates to the following design:
as shown in fig. 2, the emitter of the transistor Q3 and the resistor R1 are also connected to a first power module 7, respectively.
As shown in fig. 3, the first power module 7 specifically includes: a power supply terminal 71, a booster circuit 72, and a voltage stabilizing circuit 73, wherein:
The power supply end 71, the booster circuit 72 and the voltage stabilizing circuit 73 are connected in sequence; the boost circuit 72 is configured to receive the electrical signal from the power supply terminal 71 and amplify the voltage of the electrical signal from the power supply terminal 71; the voltage stabilizing circuit 73 is configured to receive the amplified electrical signal and to provide an output impedance for the amplified electrical signal, thereby enhancing the load carrying capability of the amplified electrical signal.
The booster circuit 72 specifically includes: a driver 721, a transformer 722, and a voltage doubler 723, wherein:
As shown in fig. 3 and 4, the driver 721, the transformer 722, and the voltage doubler 723 are sequentially connected; the driver 721 is connected to the power supply terminal 71, and the driver 721 is configured to receive an electrical signal from the power supply terminal 71 and drive the transformer 722; the transformer 722 is configured to amplify the received electrical signal by a first preset multiple to obtain a primary amplified signal; the voltage doubling circuit 723 is configured to receive a primary amplified signal from the transformer 722 and amplify the primary amplified signal by a second preset multiple to obtain a secondary amplified signal.
As shown in fig. 4, the driving pole of the driver 721 is connected to both ends of the primary winding of the transformer 722, one end of the secondary winding of the transformer 722 is connected to the capacitor C1, the other end is connected to the capacitor C2 and the diode D5, and one end connected to the capacitor C1 is grounded; as shown in fig. 5, the input electric signal is further boosted by multiple voltage doubling of the diode D6, the capacitor C3, the diode D7, the capacitor C4, the diode D8, the capacitor C5 and the diode D9 in sequence, in this embodiment, the initial voltage of the power supply terminal 71 may be 12V, the initial voltage 12V reaches about 180V after multiple voltage boosting, and the 180V voltage is output from the cathode of the diode D8 to reach the voltage stabilizing circuit 73.
In this embodiment, the capacitor C1 may be 1 μf, the capacitor C2 may be 1 μf, the capacitor C3 may be 1 μf, the capacitor C4 may be 1 μf, the capacitor C5 may be 1 μf, the diode D5 may be 1N4007, the diode D6 may be 1N4007, the diode D7 may be 1N4007, the diode D8 may be 1N4007, and the diode D9 may be 1N 4007.
As shown in fig. 6, in the present embodiment, after the amplified voltage passes through the voltage stabilizing circuit 73 composed of the resistor R14, the triode Q5, the capacitor C6, the diode D10 and the capacitor C7 in the voltage doubling circuit 723, a relatively stable 150V voltage is output; the output 150V voltage supplies power to the entire amplifying circuit.
As shown in fig. 2, the positive power supply terminal of the operational amplifier 1 is connected to a second power supply module 8. In this embodiment, the second power module 8 may employ the same power supply terminal 71 as the first power module 7, and in this embodiment, the voltage of the second power module 8 and the voltage of the power supply terminal 71 of the first power module 7 are both 12V.
The foregoing description of the preferred embodiments of the utility model is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the utility model.
Claims (10)
1. An amplifying circuit for a high voltage piezoelectric ceramic, comprising: an operational amplifier (1), a bias voltage circuit (2) and a complementary push-pull circuit (3), wherein:
The operational amplifier (1), the bias voltage circuit (2) and the complementary push-pull circuit (3) are sequentially connected;
the inverting input end of the operational amplifier (1) is used for being connected with the signal input end (4) and receiving an electric signal from the signal input end (4);
The bias voltage circuit (2) is used for receiving an electric signal from the operational amplifier (1) and providing bias voltage for the complementary push-pull circuit (3);
The complementary push-pull circuit (3) is connected with the signal output end (5), and the complementary push-pull circuit (3) is used for amplifying the electric signal from the bias voltage circuit (2) to obtain an amplified signal and outputting the amplified signal through the signal output end (5).
2. The amplifying circuit for high-voltage piezoelectric ceramics according to claim 1, wherein said bias voltage circuit (2) specifically comprises: diode D1, diode D2, diode D3, and diode D4, wherein:
The diode D1, the diode D2, the diode D3 and the diode D4 are sequentially connected;
The positive electrode of the diode D1 is connected with the positive power end of the operational amplifier (1) through a resistor R10, the connection point between the diode D2 and the diode D3 is connected with the output end of the operational amplifier (1), and the negative electrode of the diode D4 is connected with the negative power end of the operational amplifier (1) through a resistor R11.
3. The amplifying circuit for high-voltage piezoelectric ceramics according to claim 2, characterized in that said complementary push-pull circuit (3) comprises in particular: resistor R1, triode Q1, resistance R2, resistance R3, triode Q2 and resistance R4, wherein:
The resistor R1, the triode Q1, the resistor R2, the resistor R3, the triode Q2 and the resistor R4 are connected in sequence;
The base electrode of the triode Q1 is connected with the diode D1, and the base electrode of the triode Q2 is connected with the diode D4.
4. An amplifying circuit for high voltage piezoelectric ceramics according to claim 3, wherein a stage follower circuit (6) is further arranged between the complementary push-pull circuit (3) and the signal output terminal (5), and the stage follower circuit (6) specifically comprises: triode Q3, resistance R5, resistance R6 and triode Q4, wherein:
The triode Q3, the resistor R5, the resistor R6 and the triode Q4 are sequentially connected;
The emitter of the triode Q3 is connected with the resistor R1, the base electrode of the triode Q3 is connected with a connection point between the resistor R1 and the triode Q1, and a connection point between the collector of the triode Q3 and the resistor R5 is connected with a connection point between the triode Q1 and the resistor R2;
The connection point between the collector electrode of the triode Q4 and the resistor R6 is connected with the connection point between the resistor R3 and the triode Q2, the base electrode of the triode Q4 is connected with the connection point between the triode Q2 and the resistor R4, and the emitter electrode of the triode Q4 is grounded;
the connection point between the resistor R5 and the resistor R6 is connected with the signal output end (5).
5. The amplifying circuit for high-voltage piezoelectric ceramics according to claim 1, characterized in that a feedback resistor R17 is further provided between the inverting input terminal of the operational amplifier (1) and the signal output terminal (5);
The feedback resistor R17 is used to define the amplification factor of the amplified signal.
6. The amplifying circuit for high-voltage piezoceramic according to claim 4, wherein a resistor R8 and a resistor R9 are further arranged between the complementary push-pull circuit (3) and the emitter follower circuit (6), one end of the resistor R8 is connected with the emitter of the triode Q1, and the other end of the resistor R8 is connected with the collector of the triode Q3;
One end of a resistor R9 is connected with the emitter of the triode Q2, and the other end of the resistor R9 is connected with the collector of the triode Q4.
7. The amplifying circuit for high-voltage piezoelectric ceramics according to claim 4, wherein the emitter of the triode Q3 and the resistor R1 are also connected to a first power supply module (7), respectively.
8. The amplifying circuit for high-voltage piezoelectric ceramics according to claim 7, wherein said first power module (7) comprises in particular: a power supply end (71), a booster circuit (72) and a voltage stabilizing circuit (73), wherein:
the power supply end (71), the booster circuit (72) and the voltage stabilizing circuit (73) are sequentially connected;
the booster circuit (72) is used for receiving the electric signal from the power supply end (71) and amplifying the voltage of the electric signal from the power supply end (71);
The voltage stabilizing circuit (73) is used for receiving the amplified electric signal and providing output impedance for the amplified electric signal so as to enhance the carrying capacity of the amplified electric signal.
9. The amplifying circuit for high-voltage piezoelectric ceramics according to claim 8, wherein the step-up circuit (72) specifically comprises: a driver (721), a transformer (722), and a voltage doubling circuit (723), wherein:
The driver (721), the transformer (722) and the voltage doubling circuit (723) are connected in sequence;
The driver (721) is connected with the power supply end (71), and the driver (721) is used for receiving an electric signal from the power supply end (71) and driving the transformer (722);
the transformer (722) is used for amplifying the received electric signal by a first preset multiple to obtain a primary amplified signal;
The voltage doubling circuit (723) is used for receiving a primary amplified signal from the transformer (722) and amplifying the primary amplified signal by a second preset multiple to obtain a secondary amplified signal.
10. An amplifying circuit for high voltage piezoelectric ceramics according to claim 2, wherein the positive power supply terminal of the operational amplifier (1) is connected to the second power supply module (8).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322603106.8U CN221328930U (en) | 2023-09-22 | 2023-09-22 | Amplifying circuit for high-voltage piezoelectric ceramic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322603106.8U CN221328930U (en) | 2023-09-22 | 2023-09-22 | Amplifying circuit for high-voltage piezoelectric ceramic |
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| Publication Number | Publication Date |
|---|---|
| CN221328930U true CN221328930U (en) | 2024-07-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322603106.8U Active CN221328930U (en) | 2023-09-22 | 2023-09-22 | Amplifying circuit for high-voltage piezoelectric ceramic |
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| Country | Link |
|---|---|
| CN (1) | CN221328930U (en) |
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2023
- 2023-09-22 CN CN202322603106.8U patent/CN221328930U/en active Active
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