CN221327700U - Thick film plastic package chip packaging structure based on SiP packaging technology - Google Patents
Thick film plastic package chip packaging structure based on SiP packaging technology Download PDFInfo
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- CN221327700U CN221327700U CN202323007076.0U CN202323007076U CN221327700U CN 221327700 U CN221327700 U CN 221327700U CN 202323007076 U CN202323007076 U CN 202323007076U CN 221327700 U CN221327700 U CN 221327700U
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- 230000017525 heat dissipation Effects 0.000 claims abstract description 81
- 239000000758 substrate Substances 0.000 claims abstract description 53
- 238000002955 isolation Methods 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims abstract description 5
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical group [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 6
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- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
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Abstract
The utility model discloses a thick film plastic package chip packaging structure based on SiP packaging technology, which comprises a substrate, an electronic device and a plastic package body, wherein the electronic device and the plastic package body are arranged on the substrate, a heat dissipation cover is arranged on the substrate and positioned at the periphery of the chip, the heat dissipation cover is reversely buckled on the substrate to form an isolation space between an inner cavity of the heat dissipation cover and the substrate, and the chip is positioned in the isolation space, so that the chip is isolated from other electronic devices on the substrate; a heat dissipation channel is arranged above the heat dissipation cover, one end port of the heat dissipation channel is in contact with the top surface of the heat dissipation cover, the other end port of the heat dissipation channel is communicated with air, a radiator is arranged inside the heat dissipation channel, and a plastic package body is in plastic package in a substrate area outside the heat dissipation cover and the heat dissipation channel. The utility model has stable and reliable structure, can well transfer out heat generated in the working process, improves the heat dissipation performance of the chip, ensures the reliability of chip packaging, and improves the product quality.
Description
Technical Field
The utility model relates to a chip packaging structure based on a SiP packaging technology, in particular to a thick film plastic package chip packaging structure based on the SiP packaging technology, and belongs to the technical field of SiP packaging.
Background
SiP (System-in-Package) is a System-in-Package technology for integrating multiple chips, components or modules in the same Package, thereby forming a complete functional unit. SiP provides higher integration and performance by packaging directly at the chip level.
When the thickness of the electronic device to be packaged is large, the thickness of the plastic package material is also relatively large, and the thickness H of the plastic package material can exceed 1mm and can reach 4mm or even thicker in some cases. Therefore, the thick film plastic package chip technology adopts a layer of relatively thick plastic film as a packaging material, has good physical properties and chemical stability, can effectively prevent the chip from mechanical damage, humidity attack, chemical corrosion and the like, can provide a certain degree of shock absorption and vibration buffering, enhances the shock resistance and shock resistance of the chip, tolerates higher temperature, has a lower thermal expansion coefficient, and can provide a certain dimensional stability.
As shown in fig. 1, in the prior art, electronic devices such as a capacitor 1, a resistor 2, an inductor 3 and the like are firstly welded on a substrate 4 in a surface mounting manner, then a chip 5 is stuck on the substrate by using a die bonding adhesive 6, then an electric signal of the chip 5 is led to the substrate 4 in a lead 7 bonding manner, and then the whole substrate 4 is subjected to plastic package to form a plastic package body 8. For the high-density SiP system-in-package, a large number of electronic devices are integrated in the SiP system-in-package, and a large amount of heat can be emitted when the PCB works, but the heat cannot be well transferred from the plastic package body because the thickness H of the plastic package body 8 is very thick, so that the heat dissipation performance is low, and the quality of the product is affected.
After searching, the patent literature which is the same as or similar to the technical scheme of the application is not found.
In summary, how to design a thick film plastic package chip package structure based on the SiP package technology, so that heat generated in the working process can be well transferred, the heat dissipation performance of the chip is improved, the reliability of the chip package is ensured, and therefore, the improvement of the product quality is a technical problem to be solved urgently.
Disclosure of utility model
Aiming at the defects in the prior art, the utility model provides a thick film plastic package chip packaging structure based on the SiP packaging technology, which has stable and reliable structure and can well transfer heat generated in the working process, thereby improving the heat dissipation performance of the chip, ensuring the reliability of the chip package and further improving the product quality.
In order to solve the technical problems, the utility model adopts the following technical scheme: a thick film plastic package chip packaging structure based on SiP packaging technology comprises a substrate, an electronic device and a plastic package body, wherein the electronic device and the plastic package body are arranged on the substrate, a heat dissipation cover is arranged on the substrate and positioned at the periphery of the chip, the heat dissipation cover is reversely buckled on the substrate to enable an isolation space to be formed between an inner cavity of the heat dissipation cover and the substrate, and the chip is positioned in the isolation space so as to isolate the chip from other electronic devices on the substrate; the heat dissipation cover is characterized in that a heat dissipation channel is arranged above the heat dissipation cover, one end port of the heat dissipation channel is in contact with the top surface of the heat dissipation cover, the other end port of the heat dissipation channel is communicated with air, a radiator is arranged in the heat dissipation channel, and a plastic package body is in a substrate area outside the heat dissipation cover and the heat dissipation channel.
Preferably, the chip is a flip chip.
Preferably, the heat dissipation cover comprises a cover bottom and a side periphery arranged at the cover bottom, the bottom of the chip is connected with the substrate, the top of the chip is contacted with the inner side surface of the cover bottom, and one end of the heat radiator is contacted with the outer side surface of the cover bottom.
Preferably, a heat conducting connecting part is further arranged between the top of the chip and the inner side surface of the cover bottom, and the top of the chip is fixedly connected with the inner side surface of the cover bottom through the heat conducting connecting part.
Preferably, the heat conducting connecting part is a metal welding layer or a heat conducting adhesive layer.
Preferably, a heat dissipating cover connecting portion is provided on the substrate at an end portion of a side periphery of the heat dissipating cover, and the heat dissipating cover is connected to the substrate through the heat dissipating cover connecting portion.
Preferably, the heat dissipation cover connection part is a heat dissipation glue or a welding block.
Preferably, the heat dissipation channel is formed by enclosing a heat insulation layer, one end port of the heat insulation layer is contacted with the outer side surface of the cover bottom of the heat dissipation cover, and the other end port of the heat insulation layer is communicated with air.
Preferably, a heat conducting connecting layer is further arranged between the bottom of the radiator and the outer side surface of the cover bottom of the radiating cover.
Preferably, the heat conducting connection layer is a graphene patch.
The utility model has the beneficial effects that: according to the utility model, the heat generated by the chip is concentrated in the heat radiating cover by utilizing the heat radiating cover, then the heat is conducted into the heat radiating channel, and the heat generated by the chip can be conducted into the air by utilizing the heat radiating channel and the radiator arranged in the heat radiating channel, so that the problem that the heat is stagnated in the plastic package body due to the fact that the plastic package body is too thick is avoided. Through structural design for the heat that the chip produced propagates in the solid, and the speed is faster, thereby has further improved heat dispersion. The heat insulation layer is utilized to form a heat dissipation channel, and the transferred heat is isolated from the plastic package body around, so that the influence of the heat on the plastic package body is avoided, and the quality of a product is further ensured. The heat conduction connecting layer is further arranged between the bottom of the radiator and the outer side face of the cover bottom of the heat dissipation cover, and heat can be better transferred to the radiator for heat dissipation, so that the heat dissipation performance is further improved.
Drawings
Fig. 1 is a schematic diagram of a thick film plastic package chip package structure based on SiP packaging technology in the prior art;
Fig. 2 is a schematic diagram of a thick film plastic package chip package structure based on an SiP package technology according to an embodiment of the present utility model;
FIG. 3 is a schematic view of a partial structure of the chip of FIG. 2;
Fig. 4 is a schematic diagram of a step one of manufacturing a thick film plastic package chip package structure based on SiP packaging technology in an embodiment of the present utility model;
Fig. 5 is a schematic diagram of a second step of manufacturing a thick film plastic package chip package structure based on SiP packaging technology in an embodiment of the present utility model;
Fig. 6 is a schematic diagram of a third step of manufacturing a thick film plastic package chip package structure based on SiP packaging technology in an embodiment of the present utility model;
fig. 7 is a schematic diagram of a step four of manufacturing a thick film plastic package chip package structure based on SiP packaging technology in an embodiment of the present utility model;
In the figure: 1. capacitor, 2, resistor, 3, inductor, 4, substrate, 5, chip, 6, die bond, 7, wire, 8, plastic package, 9, heat sink cap, 911, cap bottom, 912, side perimeter, 10, heat sink channel, 11, heat sink, 12, underfill, 13, thermally conductive connection, 131, tim bond, 14, heat sink cap connection, 141, heat sink bond, 15, thermal insulation, 16, thermally conductive connection, 161, graphene patch, 17, wafer, 18, dicing street, 19, protective film, 20, solder balls.
Detailed Description
The technical scheme of the utility model is further elaborated below with reference to specific embodiments and drawings.
Examples: as shown in fig. 2, a thick film plastic package chip package structure based on SiP packaging technology comprises a substrate 4, an electronic device arranged on the substrate 4 and a plastic package body 8, wherein the plastic package body 8 wraps the electronic device in a plastic package manner, a heat dissipation cover 9 is arranged on the substrate 4 and is positioned at the periphery of the chip 5, and the heat dissipation cover 9 is reversely buckled on the substrate 4 to form an isolation space a between an inner cavity of the heat dissipation cover 9 and the substrate 4, so that the chip 5 is positioned in the isolation space a, and the chip 5 is isolated from other electronic devices on the substrate. A heat dissipation channel 10 is arranged above the heat dissipation cover 9, one end port of the heat dissipation channel 10 is in contact with the outer top surface of the heat dissipation cover 9, the other end port of the heat dissipation channel 10 is communicated with air, a radiator 11 is arranged inside the heat dissipation channel 10, and the plastic package body 8 is in a substrate area outside the heat dissipation cover 9 and the heat dissipation channel 10. In this embodiment, the chip 5 may be an FC chip (flip chip), that is, a flip chip, and the FC chip is flip-chip attached to the substrate 4 and is connected to the substrate 4 by a micro solder joint at the bottom of the FC chip, where the chip 5 may also be a front-mounted chip, and when the front-mounted chip is used, only a wire bonding position is reserved at the top of the chip 5, so that the front-mounted chip can be electrically connected with the substrate through a lead. The chip 5 may be a single chip or a plurality of chips; the heat dissipating cover 9 may be made of a metal material with good heat conductivity, such as a copper heat dissipating cover, and the heat sink 11 may be a fin heat sink or other type of chip heat sink. The design is that the chip 5 is the main source of heat generation in operation, the heat dissipation cover 9 is utilized to isolate the chip 5, the heat generated by the chip 5 is concentrated in the heat dissipation cover 9, the heat is conducted into the heat dissipation channel 10, the heat generated by the chip 5 can be conducted into the air to dissipate the heat by utilizing the heat dissipation channel 10 and the radiator arranged in the heat dissipation channel 10, so that the problem that the heat is stagnated in the plastic package body due to the fact that the plastic package body is too thick is avoided, the structure of the embodiment is stable and reliable, the heat generated in the working process can be well transferred out, the heat dissipation performance of the chip is improved, the reliability of the chip package is guaranteed, and the product quality is improved.
As shown in fig. 3, the heat dissipating cover 9 includes a cover bottom 911 and a side periphery 912 disposed on the cover bottom 911, where the cover bottom 911 and the side periphery 912 may be configured as an integral structure, the bottom of the chip 5 is connected to the substrate 4 by micro solder joints and connected to the substrate 4 by underfill 12, the top of the chip 5 is in contact with the inner side of the cover bottom 911, and one end of the heat spreader 11 is in contact with the outer side of the cover bottom 911, so that heat generated by the chip 5 is transferred to the heat spreader 11 through the cover bottom 911 and then transferred to the air through the heat spreader 11, so that the heat propagates in a solid body, and the speed is faster, thereby further improving the heat dissipating performance.
In this embodiment, a heat conducting connection portion 13 is further disposed between the top of the chip 5 and the inner side surface of the bottom cover 911, and the top of the chip 5 is fixedly connected with the bottom cover 911 through the heat conducting connection portion 13, so that heat generated by the chip 5 can be transferred out and the position of the chip 5 can be fixed, and the connection structure is more stable. The heat conductive connection portion 13 may be configured as a metal soldering layer, for example, a back gold layer is formed by back gold treatment on the top of the chip 5, that is, a layer of solderable metal layer (such as copper or aluminum) is plated on the top of the chip 5, and then the cover bottom 911 is soldered by means of soldering such as indium soldering, so that the top of the chip 5 and the inner side surface of the cover bottom 911 are soldered by the formed metal soldering layer. Here, the thermally conductive connection portion 13 may also be configured as a thermally conductive adhesive layer, for example, a high-end interface thermally conductive adhesive, i.e., TIM adhesive, is used to connect the top portion of the chip 5 and the inner side surface of the lid bottom 911.
A heat sink cap connection portion 14 is provided on the substrate 4 at an end portion of the side periphery 912 of the heat sink cap 9, and the heat sink cap 9 is connected to the substrate 4 through the heat sink cap connection portion 14. The heat dissipating cover connecting portion 14 may be configured as a heat dissipating glue (i.e. a heat conducting gel), i.e. the heat dissipating cover 9 is connected to the substrate 4 by the heat conducting gel, where the heat dissipating cover connecting portion 14 may also be configured as a solder bump, i.e. the heat dissipating cover 9 is connected to the substrate 4 by means of solder paste.
Here, the mechanical properties of the heat dissipating glue are better than those of the TIM glue, but the heat conducting property is worse than that of the TIM glue, and the heat dissipating cover connecting portion 14 needs to bear the gravity of the parts including the heat dissipating cover 9, so that the heat dissipating glue can be used to connect the heat dissipating cover 9 and the substrate 4, and the TIM glue is arranged between the top of the chip 5 and the inner side surface of the cover bottom 911 of the heat dissipating cover 9, because the gravity of the parts such as the heat dissipating cover 9 does not need to be borne here, so that the TIM glue can be used here, and the structural stability can be ensured, and the heat dissipating property can be further improved.
The heat dissipation channel 10 is formed by enclosing a heat insulation layer 15, one end port of the heat insulation layer 15 is contacted with the outer side surface of the cover bottom 911 of the heat dissipation cover 9, and the other end port of the heat insulation layer 15 is communicated with air. The heat insulation layer 15 mainly isolates the transferred heat from the surrounding plastic package body 8, so as to avoid the influence of the heat on the plastic package body 8, thereby further ensuring the quality of the product. The heat insulating layer 15 may be made of a heat insulating material such as resin.
A heat conducting connection layer 16 is further disposed between the bottom of the heat spreader 11 and the outer side surface of the bottom 911 of the heat dissipating cover 9, and the heat conducting connection layer 16 may be made of a material with good heat conducting property, such as a graphene patch. Through setting up heat conduction tie layer 16, can give the radiator with the better transmission of heat and dispel the heat to further improve the heat dispersion.
As shown in fig. 4 to 7 and fig. 2, a manufacturing procedure of the present embodiment is as follows: carrying out bumping technology on the front surface of the thinned wafer 17, namely leading out an electric signal on the front surface of the wafer through bumping, cutting the wafer 17 with bumping into single FC chips along the dicing channels 18, and then welding the FC chips on the substrate 4 in a flip-chip manner to realize the conduction of the electric signal between the chips and the substrate, and filling the chips with the underfill 12 for protection;
Then coating a layer of high-heat-conductivity TIM adhesive 131 on the top of the chip 5, then spot a circle of heat-dissipating adhesive 141 with good bonding performance on the appointed position of the substrate 4, then attaching a heat-dissipating cover 9 on the heat-dissipating adhesive, connecting the top of the chip 5 with the heat-dissipating cover 9 through the high-heat-conductivity TIM adhesive 131, connecting the heat-dissipating cover 9 with the substrate 4 through the heat-dissipating adhesive 141 with strong bonding performance, and putting the heat-dissipating cover 9 into an oven for curing after attaching;
After solidification, other electronic devices such as a capacitor 1, a resistor 2, an inductor 3 and the like are welded on a substrate 4 in a surface mounting mode, a layer of graphene patch 161 is attached to a heat dissipation cover 9, a radiator 11 is attached to the heat dissipation cover 9 through the graphene patch 161, the heat dissipation area is increased, a layer of heat insulation layer 15 is arranged on the peripheral side face of the radiator 11 to form a heat dissipation channel, heat of the radiator can be dissipated and cannot be transferred into a plastic package body 8, and a layer of protection film 19 is attached to the top end face of the radiator 11, so that plastic package materials cannot enter the radiator during plastic package;
then open molding is carried out on the electronic device, the top end face of the plastic package body 8 is enabled to be flush with the top end face of the radiator 11, then the protective film 19 is removed, the purpose of the electronic device protection is to enable heat of the chip to be emitted into air while the electronic device is protected through the plastic package body, heat dissipation performance is improved, finally a solder ball 20 is formed by implanting balls, and electric signals are led out from a substrate to a PCB.
In summary, the heat radiating cover is utilized to isolate the chip, the heat generated by the chip is concentrated in the heat radiating cover, then the heat is conducted into the heat radiating channel, and the heat generated by the chip can be conducted into the air by utilizing the heat radiating channel and the radiator arranged in the heat radiating channel, so that the problem that the heat is stagnated in the plastic package body due to the fact that the plastic package body is too thick is avoided. Through structural design for the heat that the chip produced propagates in the solid, and the speed is faster, thereby has further improved heat dispersion. The heat insulation layer is utilized to form a heat dissipation channel, and the transferred heat is isolated from the plastic package body around, so that the influence of the heat on the plastic package body is avoided, and the quality of a product is further ensured. The heat conduction connecting layer is further arranged between the bottom of the radiator and the outer side face of the cover bottom of the heat dissipation cover, and heat can be better transferred to the radiator for heat dissipation, so that the heat dissipation performance is further improved.
The term "plurality" as used in this embodiment means the number of "two or more". The above embodiments are only for illustrating the present utility model, not for limiting the present utility model, and various changes and modifications may be made by one skilled in the relevant art without departing from the spirit and scope of the present utility model, so that all equivalent technical solutions shall fall within the scope of the present utility model, which is defined by the claims.
Claims (10)
1. The utility model provides a thick film plastic envelope chip packaging structure based on SiP packaging technique, includes base plate, sets up electronic device and the plastic envelope body on the base plate, its characterized in that: a heat dissipation cover is arranged on the substrate and positioned at the outer periphery of the chip, the heat dissipation cover is reversely buckled on the substrate, an isolation space is formed between the inner cavity of the heat dissipation cover and the substrate, and the chip is positioned in the isolation space, so that the chip is isolated from other electronic devices on the substrate; the heat dissipation cover is characterized in that a heat dissipation channel is arranged above the heat dissipation cover, one end port of the heat dissipation channel is in contact with the top surface of the heat dissipation cover, the other end port of the heat dissipation channel is communicated with air, a radiator is arranged in the heat dissipation channel, and a plastic package body is in a substrate area outside the heat dissipation cover and the heat dissipation channel.
2. The SiP packaging technology-based thick film plastic package chip packaging structure of claim 1, wherein: the chip adopts flip chip.
3. The SiP packaging technology-based thick film plastic package chip packaging structure of claim 1, wherein: the heat dissipation cover comprises a cover bottom and side periphery arranged at the cover bottom, the bottom of the chip is connected with the substrate, the top of the chip is contacted with the inner side surface of the cover bottom, and one end of the heat radiator is contacted with the outer side surface of the cover bottom.
4. The SiP packaging technology-based thick film plastic package chip packaging structure according to claim 3, wherein: and a heat conduction connecting part is further arranged between the top of the chip and the inner side surface of the cover bottom, and the top of the chip is fixedly connected with the inner side surface of the cover bottom through the heat conduction connecting part.
5. The SiP packaging technology-based thick film plastic package chip packaging structure according to claim 4, wherein: the heat conduction connecting part is a metal welding layer or a heat conduction adhesive layer.
6. The SiP packaging technology-based thick film plastic package chip packaging structure according to claim 3, wherein: a heat-dissipating cover connection part is provided on the substrate at an end part of a side periphery of the heat-dissipating cover, and the heat-dissipating cover is connected to the substrate through the heat-dissipating cover connection part.
7. The SiP packaging technology-based thick film plastic package chip packaging structure of claim 6, wherein: the heat dissipation cover connecting part is heat dissipation glue or a welding block.
8. The SiP packaging technology-based thick film plastic package chip packaging structure according to any one of claims 3 to 7, wherein: the heat dissipation channel is formed by enclosing the heat insulation layer, one end port of the heat insulation layer is contacted with the outer side surface of the bottom of the heat dissipation cover, and the other end port of the heat insulation layer is communicated with air.
9. The SiP packaging technology-based thick film plastic package chip packaging structure according to any one of claims 3 to 7, wherein: and a heat conduction connecting layer is arranged between the bottom of the radiator and the outer side surface of the cover bottom of the radiating cover.
10. The SiP packaging technology-based thick film plastic package chip packaging structure of claim 9, wherein: the heat conduction connecting layer is a graphene patch.
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