CN220913748U - Ceiling screen data wireless transmission circuit - Google Patents

Ceiling screen data wireless transmission circuit Download PDF

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Publication number
CN220913748U
CN220913748U CN202322857539.6U CN202322857539U CN220913748U CN 220913748 U CN220913748 U CN 220913748U CN 202322857539 U CN202322857539 U CN 202322857539U CN 220913748 U CN220913748 U CN 220913748U
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China
Prior art keywords
resistor
power supply
capacitor
data
common mode
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CN202322857539.6U
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Chinese (zh)
Inventor
朱拥
赵萌萌
姚永利
许忠华
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Chongqing Delco Electronic Instrument Co ltd
Geely Automobile Research Institute Ningbo Co Ltd
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Chongqing Delco Electronic Instrument Co ltd
Geely Automobile Research Institute Ningbo Co Ltd
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Abstract

The utility model discloses a wireless transmission circuit for data of a ceiling screen, which comprises a controller, a deserializing chip, a Bluetooth module, a power supply module and a wake-up module, wherein the power supply module is respectively connected with the controller, the deserializing chip, the Bluetooth module and the wake-up module and supplies power through the power supply module; the wake-up signal input end of the wake-up module is connected with the ignition switch signal output end of the vehicle, the wake-up signal output end of the wake-up module is connected with the wake-up signal input end of the controller, and the deserializing chip, the Bluetooth module and the power supply module are started through the controller U6; the controller is characterized by further comprising an interface J1, wherein the controller TFT driving signal output end is connected with the interface J1TFT driving signal input end, the interface J1TFT driving signal output end is connected with the TFT screen interface J2TFT driving signal input end, and the TFT screen is externally connected with a TFT screen through the TFT screen interface J2. Can be connected with the mobile terminal through bluetooth to improve and watch the shadow recreational.

Description

Ceiling screen data wireless transmission circuit
Technical Field
The utility model relates to the technical field of video transmission, in particular to a ceiling screen data wireless transmission circuit.
Background
With the progress of technology, more and more people pay more attention to the comfort and entertainment of automobiles. The traditional automobile can watch movies and the like on the central control screen, but because the central control screen is arranged in the middle and the angle is intersected, the copilot is in a side direction and is easy to reflect light, and meanwhile, because the neck is worn for a long time, the neck ache is easily caused by the fact that the head is worn down, so that a new screen, namely a ceiling screen, is now generated. However, since the conventional audio output of the overhead screen is put out, and for a person desiring to rest, if put out, rest of other passengers is affected, in addition, since most of the overhead screen is disposed above the co-driver, the position on the rear side of the cab is far away, which may cause unclear hearing at the position.
Disclosure of utility model
The utility model aims to solve the technical problems in the prior art, and particularly creatively provides a wireless transmission circuit for ceiling screen data, which can select external audio equipment according to requirements and improve video viewing entertainment.
In order to achieve the above purpose, the utility model provides a wireless transmission circuit for data of a ceiling screen, which comprises a controller, a deserializing chip, a Bluetooth module, a power supply module and a wake-up module, wherein the power supply module is respectively connected with the controller, the deserializing chip, the Bluetooth module and the wake-up module and supplies power through the power supply module; the wake-up signal input end of the wake-up module is connected with the ignition switch signal output end of the vehicle, the wake-up signal output end of the wake-up module is connected with the wake-up signal input end of the controller, and the deserializing chip, the Bluetooth module and the power supply module are started through the controller U6;
The controller is characterized by further comprising an interface J1, wherein the controller TFT driving signal output end is connected with the interface J1TFT driving signal input end, the interface J1TFT driving signal output end is connected with the TFT screen interface J2TFT driving signal input end, and the TFT screen is externally connected with a TFT screen through the TFT screen interface J2.
In the scheme, the method comprises the following steps: the wake-up module comprises: the first end of the resistor R3 is connected with the power +3.3V_MCU and the emitter of the triode Q19, the second section of the resistor R3 is connected with the first end of the resistor R58 and the base of the triode Q19, the collector of the triode Q19 is connected with the first end of the resistor R2 and the wake-up end of the controller U6, the second end of the resistor R2 is connected with the power ground, the second end of the resistor R58 is connected with the collector of the triode Q1, the emitter of the triode Q1 is connected with the power ground, the base of the triode Q1 is connected with the first end of the capacitor C61 and the first end of the resistor R56, the second end of the capacitor C61 and the second end of the resistor R56 are connected with the power ground, the base of the triode Q1 is connected with the first end of the resistor R73, the second end of the resistor R73 is connected with the cathode of the diode D3, the anode of the diode D3 is connected with the wake-up end of the interface J3, the second end of the resistor R73 is connected with the first end of the resistor R59, the second end of the resistor R59 is connected with the first end of the resistor R60 and the first end of the capacitor C59, the second end of the resistor R59 is connected with the second end of the resistor C60 and the second end of the resistor R59 is connected with the PTC signal monitoring resistor C59.
The wake-up terminal through the interface J3 outputs a wake-up signal (the wake-up signal may be an ignition signal or other wake-up signals, for example, a wake-up signal sent by a vehicle control unit), and when the wake-up signal is an ignition signal, the resistor R73 and the resistor R56 divide the voltage to provide a conducting level for the triode Q1, the triode Q1 is conducted at this time, the level of the wake-up terminal PTD5 input into the controller U6 is a low level, and the controller U6 is woken up at this time; when the base of the transistor Q1 is at the off level, the transistor Q1 is in the off state, and the level of the wake-up terminal PTD5 of the input controller U6 is at the high level. In addition, after the wake-up end of the interface J3 outputs the wake-up signal, the wake-up signal can play a role in preventing reverse connection through the diode D3, and then the resistor R59 and the resistor R60 are utilized to realize voltage division, and the wake-up signal monitoring end PTC1 of the controller U6 is used for collecting whether the ignition signal is abnormal or not.
In the scheme, the method comprises the following steps: the power supply module comprises a power supply adaptive circuit, a power supply sampling circuit, an MCU power supply circuit and a Bluetooth power supply circuit
In the scheme, the method comprises the following steps: the power supply module comprises a power supply adaptive circuit, the power supply adaptive circuit comprises a field effect tube Q17 drain electrode connected with a battery power supply end, a transient suppression diode TVS1 end and a capacitor C65 end, the other end of the capacitor C65 is connected with a capacitor C64 end, the other end of the capacitor C64 and the other end of the transient suppression diode TVS1 are both connected with a power supply ground, the grid electrode of the field effect tube Q17 is connected with a resistor R99 end, the other end of the resistor R99 is connected with a power supply ground, the source electrode of the field effect tube Q17 is connected with a resistor R100 end, a diode D8 cathode, a capacitor C177 end and an inductor L3 end, the other end of the capacitor C177 end is connected with a power supply ground, the other end of the resistor R100, the positive electrode of the diode D8 and the other end of the capacitor C91 are connected with a resistor R99 end, the other end of the inductor L3 outputs power supply +VBATT, the other end of the inductor L3 is also connected with a capacitor C70 end and one end of the capacitor C62, and the other end of the capacitor C70 is connected with the power supply ground; the power supply BATTERY outputs voltage through a body diode of the field effect tube Q17, the field effect tube Q17 can not only prevent reverse connection and protect the safety of a subsequent circuit, but also basically has no voltage drop, so that the input voltage is equal to the output voltage, the output voltage is divided by a resistor R99 and a resistor R100 to provide a conduction level for the grid electrode of the field effect tube Q17, the field effect tube Q17 is conducted, at the moment, the source electrode of the field effect tube Q17 outputs continuous voltage, and the continuous voltage is filtered through a pi-type filter circuit formed by a capacitor C117, a capacitor C70 and an inductor L3 to output a power supply +VBATT; the power supply +VBATT provides power for the screen backlight module, provides power for the three-phase pre-driving module and provides power for the motor driving module.
The power supply sampling circuit includes: the emitter of the triode Q16 is connected with a power supply +VBATT, the collector of the triode Q16 is connected with a first end of a resistor R217, a second end of the resistor R217 is connected with a first end of a resistor R216 and a first end of a capacitor C141, a second end of the resistor R216 and a second end of the capacitor C141 are both connected with power supply ground, a second end of the resistor R217 is connected with a voltage sampling end PTB3 of a controller U6, a first end of the resistor R218 is connected with the power supply +VBATT, a second end of the resistor R218 is connected with a base of the triode Q16, a second end of the resistor R218 is connected with a first end of a resistor R215, and a second end of the resistor R215 is connected with a second end of a resistor R66. When the voltage sampling control end PTC16 of the controller U6 inputs the cut-off level to the base electrode of the triode Q3, the triode Q3 is in a cut-off state, the potential of the base electrode of the triode Q2 is equal to the potential of the emitter electrode of the triode Q2, the collector electrode of the triode Q2 has no voltage output, and similarly, the potential of the base electrode of the triode Q16 is equal to the potential of the emitter electrode of the triode Q16, and the collector electrode of the triode Q16 has no voltage output; when voltage sampling is required to be carried out on the power supply BATTERY and the power supply +VBATT, the voltage sampling control end PTC16 of the controller U6 inputs a conduction level to the base electrode of the triode Q3, the triode Q3 is in a conduction state, the voltage of the triode Q2 is pulled down at the moment, the collector electrode of the triode Q2 outputs voltage, the voltage safety of the voltage sampling end PTC0 of the input controller U6 is ensured through a voltage dividing circuit formed by the resistor R67 and the resistor R68, and the voltage acquisition of the power supply BATTERY is realized; meanwhile, the voltage of the triode Q16 is pulled down, the collector electrode of the triode Q16 outputs voltage, the voltage safety of a voltage sampling end PTB3 of the input controller U6 is ensured through a voltage dividing circuit formed by a resistor R217 and a resistor R216, and the voltage acquisition of the power supply +VBATT is realized.
In the scheme, the method comprises the following steps: the power supply module further comprises an MCU power supply circuit, the MCU power supply circuit comprises a first end of a resistor R115 connected with a power supply +VBATT, a second end of the resistor R115 connected with a first end of a capacitor C53, a first end of a capacitor C58 and a first end of a capacitor C54, a second end of the capacitor C53, a second end of the capacitor C58 and a second end of the capacitor C54 connected with power supply ground, a second end of the resistor R115 connected with a power supply end VIN of a DCDC buck converter U2, a bootstrap capacitor end BOOT of the DCDC buck converter U2 connected with a first end of a resistor R52, a second end of the resistor R52 connected with a first end of a capacitor C48, a second end of the capacitor C48 connected with an output end SW of the DCDC buck converter U2 connected with a first end of an inductor L6, a second end of the inductor L6 connected with a first end of a capacitor C49, a first end of the capacitor C50, a first end of the capacitor C51 and a first end of the capacitor C52 connected with a first end of the capacitor C52, the second end of the capacitor C49, the second end of the capacitor C50, the second end of the capacitor C51 and the second end of the capacitor C52 are connected with power ground, the second end of the inductor L6 outputs power +3.3VSW, the second end of the inductor L6 is connected with the first end of the resistor R62, the second end of the resistor R62 is connected with the first end of the resistor R61, the second end of the resistor R61 is connected with the first end of the resistor R63 and the feedback end FB of the DCDC buck converter U2, the second end of the resistor R63 is connected with power ground, the enable end EN of the DCDC buck converter U2 is connected with the control end PTD16 of the controller U6, the enable end EN of the DCDC buck converter U2 is connected with the first end of the resistor R11, the second end of the resistor R11 is connected with power ground, the clock frequency end RT/CLK of the DCDC buck converter U2 is connected with the first end of the resistor R51, the second end of the resistor R51 is connected with power ground, the enable end EPGND of the DCDC buck converter U2 is in contact with the heat sink U2, the power ground end GND of the DCDC buck converter U2 is connected with the power ground, the SOFT START end SOFT-START of the DCDC buck converter U2 is respectively connected with the first end of the capacitor C56 and the first end of the capacitor C92, the second end of the capacitor C92 is connected with the first end of the resistor R101, and the second end of the resistor R101 and the second end of the capacitor C56 are respectively connected with the power ground. When the output power +3.3vsw is needed, the control end PTD16 of the controller U6 inputs a high level to the enable end EN of the DCDC buck converter U2 to enable the DCDC buck converter U2 to operate, converts the input power +vbatt into a stable power +3.3vsw for output through the DCDC buck converter U2, and can also connect a resistor R65 at the second end of the inductor L6, and the resistor R65 outputs the power +3.3v_mcu to provide power for the controller module; in order to prevent the DCDC buck converter U2 from outputting power, the control terminal PTD16 of the controller U6 inputs a low level to the enable terminal EN of the DCDC buck converter U2 to disable the DCDC buck converter U2, and the DCDC buck converter U2 has no power output
In the scheme, the method comprises the following steps: the power supply module further includes: the power supply end VIN of the linear voltage regulator U5 is connected with the cathode of the diode D13, the anode of the diode D13 is connected with a power supply +VBAT2, the power supply output end VOUT of the linear voltage regulator U5 is connected with the first end of the capacitor C115, the second end of the capacitor C115 is connected with power supply ground, the power supply +3.3V_MCU is output by the power supply output end VOUT of the linear voltage regulator U5, the enable end EN of the linear voltage regulator U5 is connected with the third end of the high-speed switch diode D1 and one end of the resistor R116, the other end of the resistor R116 and the ground end of the linear voltage regulator U5 are both connected with power supply ground, the first end of the high-speed switch diode D1 is connected with one end of the resistor R31 and one end of the capacitor C114, the other end of the capacitor C114 is connected with power supply ground, the first end of the resistor R165 is connected with the first end of the capacitor C116, the second end of the resistor R165 and the second end of the capacitor C116 are respectively connected with power supply ground, the second end of the resistor R143 is connected with the cathode of the diode D3, and the ground end of the linear voltage regulator U5 is connected with the ground end GND 5; the end of the linear voltage stabilizer U5PG is connected with one end of a resistor R108, and the other end of the resistor R108 is connected with the reset end of the controller U6. The wake-up level signal is output through the cathode of the diode D3, the enable end EN of the linear voltage stabilizer U5 is made to be high level, the linear voltage stabilizer U5 works, the input power +VBAT2 is converted into a stable power +3.3V_MCU by the linear voltage stabilizer U5, the power is provided for the controller module, and the wake-up signal is provided for the wake-up module.
In the scheme, the method comprises the following steps: the Bluetooth power supply circuit comprises a resistor R48, wherein one end of the resistor R48 is connected with a Bluetooth power supply enabling end of the controller, the other end of the resistor R48 is connected with one end of a resistor R75, one end of a capacitor C98 and a base electrode of a triode Q10, an emitter electrode of the triode Q10, the other end of the resistor R75 and the other end of the capacitor C98 are all connected with a power supply ground, a collector electrode of the triode Q10 is connected with one end of a resistor R44, the other end of the resistor R44 is connected with one end of a resistor R43 and a base electrode of a triode Q7, an emitter electrode of the triode Q7 is connected with the other end of the resistor R43 and 3.3V voltage, a collector electrode of the triode Q7 is connected with one end of an inductor L21, and the other end of the inductor L21 is the Bluetooth power supply end and outputs 3.3V voltage.
The Bluetooth data transmitting end of the Bluetooth module is connected with one end of a resistor R282 and one end of a resistor R279, the other end of the resistor R279 is connected with a Bluetooth power supply end of a Bluetooth power supply circuit, the other end of the resistor R282 is connected with a Bluetooth data receiving end of a controller, the Bluetooth data receiving end of the Bluetooth module is connected with one end of a resistor R119 and one end of a resistor R280, the other end of the resistor R280 is connected with a Bluetooth power supply end of the Bluetooth power supply circuit, and the other end of the resistor R119 is connected with the Bluetooth data transmitting end of the controller;
The Bluetooth module Bluetooth serial clock end is connected with one end of a resistor R28, the other end of the resistor R28 is connected with the deserializing chip Bluetooth serial clock end, the Bluetooth module Bluetooth serial output end is connected with one end of a resistor R11, the other end of the resistor R11 is connected with the deserializing chip Bluetooth serial input end, the Bluetooth module Bluetooth serial input end is connected with one end of a resistor R27, the other end of the resistor R27 is connected with the deserializing chip Bluetooth serial output end, the Bluetooth module Bluetooth serial data sampling frequency end is connected with one end of a resistor R29, the other end of the resistor R29 is connected with the deserializing chip Bluetooth serial data sampling frequency end, the Bluetooth module resetting end is connected with one end of a resistor R225, the other end of the resistor R225 is connected with a controller Bluetooth resetting type output end, one end of a resistor R284 and one end of a capacitor C100, the other end of the capacitor C100 is connected with the power ground, the other end of the resistor R284 is connected with the Bluetooth power supply end of a Bluetooth supply circuit, one end of a capacitor C101, one end of the capacitor C107 and the working voltage input end of the Bluetooth module, the other end of the capacitor C101, and the grounding end of the Bluetooth module are all connected with the power ground.
The Bluetooth module ANT protocol end is connected with one end of an inductor L23 and one end of a capacitor C10, the other end of the capacitor C10 is connected with power ground, the other end of the inductor L23 is connected with one end of a capacitor C102, one end of an electrostatic diode ESD3 and a signal end of a radio frequency coaxial connector J8, and the other end of the capacitor C102, the other end of the electrostatic diode ESD3 and a grounding end of the radio frequency coaxial connector J8 are all connected with power ground.
In the scheme, the method comprises the following steps: the power end VDD18 of the deserializing chip U1 is connected with the power supply VDD1V8 and one end of the inductor L7, and the other end of the inductor L7 is connected with the power supply +1.8VSW; the power supply end VDDIO of the deserializing chip U1 is connected with the power supply VDDIO and one end of the inductor L2, and the other end of the inductor L2 is connected with the power supply +3.3VSW; the deserializing chip VREG end and VREGA are both connected with the power supply VDDREG and one end of the inductor L5, and the other end of the inductor L5 is connected with the power supply +1.8VSW;
The first end of the resistor R123 is connected with the first end of the resistor R7, the second end of the resistor R7 is connected with the clock end PTA0 of the controller U6 and the first end of the resistor R121, the second end of the resistor R121 is connected with the power +3.3V_MCU, the second end of the resistor R123 is connected with the serial clock signal end SCL_TX of the deserializing chip U1, the first end of the resistor R122 is connected with the first end of the resistor R8, the second end of the resistor R8 is connected with the data end PTA1 of the controller U6 and the first end of the resistor R120, the second end of the resistor R120 is connected with the power +3.3V_MCU, the second end of the resistor R122 is connected with the data end SDA_RX of the deserializing chip U1, the first end of the resistor R116 is connected with the data end TX 2 of the controller U6, the first end of the resistor R117 is connected with the serial clock signal end 3 of the controller U6, and the second end of the resistor R117 is connected with the serial clock signal end SDA_RX of the deserializing chip U1;
The power supply end VDDA of the deserializing chip U1 is connected with the power supply VDDA, the first end of the resistor R102 is connected with the power supply VDDIO, the second end of the resistor R102 is connected with the twisted pair/coaxial line mode selection end CXTP/GPIO09 of the deserializing chip U1, the twisted pair/coaxial line mode selection end CXTP/GPIO09 of the deserializing chip U1 is connected with the first end of the resistor R96, and the second end of the resistor R96 is connected with the power supply ground;
The locking end LOCK of the deserializing chip U1 is connected with one end of a resistor R22 and one end of a resistor R128, the other end of the resistor R128 is connected with a power supply VDDIO, and the other end of the resistor R22 is connected with a locking control end PTE9 of the controller U6; the error indication end ERRB of the deserializing chip U1 is connected with one end of a resistor R26 and one end of a resistor R102, the other end of the resistor R102 is connected with a power supply VDDIO, and the other end of the resistor R22 is connected with a locking control end PTE9 of the controller U6;
the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the first end of the capacitor C35, the second end of the capacitor C35 is connected with the power ground, the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the third end of the crystal oscillator Y2, the ground end GND of the crystal oscillator Y2 is connected with the power ground, the third end of the crystal oscillator Y2 is connected with the first end of the resistor R14, and the second end of the resistor R14 is connected with the second end X2 of the crystal oscillator of the deserializing chip U1 and the first end of the crystal oscillator Y2;
The I2C mode selection end GPIO01/I2CSEL of the deserializing chip U1 is connected with the first end of a resistor R46 and the first end of a resistor R45, the second end of the resistor R46 is connected with a power supply VDDIO, and the second end of the resistor R45 is connected with a power supply ground; the differential signal end SIOA + of the deserializing chip U1 is connected with the first end of a capacitor C36, the second end of the capacitor C36 is connected with the first end of a resistor R15 and the fourth end of a common mode filter L8, the first end of the common mode filter L8 is connected with the first end of an interface J7, and the second end of the resistor R15 is connected with power ground; the differential signal end SIOA of the deserializing chip U1 is connected with the first end of the capacitor C37, the second end of the capacitor C37 is connected with the first end of the resistor R16 and the third end of the common mode filter L8, the second end of the resistor R16 is connected with the power ground, and the second end of the common mode filter L8 is connected with the second end of the interface J7;
The power-off mode selection end PWDNB of the deserializing chip U1 is connected with the first end of a resistor R21, one end of a resistor R230 and one end of a capacitor C153, the other end of the capacitor C153 is connected with power ground, and the second end of the resistor R21 is connected with the PTE1 port of a controller U6; the other end of the resistor R230 is connected with a power supply VDDIO;
The data end TXOUT _B0 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L14, the data end TXOUT _B0+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L14, the third data positive end of the common mode filter L14 is connected with the thirty-second end of the interface J1, and the fourth data negative end of the common mode filter L14 is connected with the thirty-first end of the interface J1;
the data end TXOUT _B1 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L13, the data end TXOUT _B1+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L13, the third data positive end of the common mode filter L13 is connected with the fourth terminal of the interface J1, and the fourth data negative end of the common mode filter L13 is connected with the thirty-fifth end of the interface J1;
the data end TXOUT _B2 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L11, the data end TXOUT _B2+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L11, the third data positive end of the common mode filter L11 is connected with the thirty-seventh end of the interface J1, and the fourth data negative end of the common mode filter L11 is connected with the thirty-eighth end of the interface J1;
the data end TXOUT _B3 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L10, the data end TXOUT _B3+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L10, the third data positive end of the common mode filter L10 is connected with the forty-four ends of the interface J1, and the fourth data negative end of the common mode filter L10 is connected with the forty-three ends of the interface J1;
The data end TXCLK_OUTB of the deserializing chip U1 is connected with the first data negative end of the common mode filter L12, the data end TXCLK_OUTB+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L12, the third data positive end of the common mode filter L12 is connected with the forty end of the interface J1, and the fourth data negative end of the common mode filter L12 is connected with the forty end of the interface J1;
The data end TXOUT _a0 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L15, the data end TXOUT _a0+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L15, the third data positive end of the common mode filter L15 is connected with the forty-seventh end of the interface J1, and the fourth data negative end of the common mode filter L15 is connected with the forty-sixth end of the interface J1;
The data end TXOUT _a1 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L16, the data end TXOUT _a1+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L16, the third data positive end of the common mode filter L16 is connected with the fifty end of the interface J1, and the fourth data negative end of the common mode filter L16 is connected with the forty-ninth end of the interface J1;
The data end TXOUT _A2 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L17, the data end TXOUT _A2+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L17, the third data positive end of the common mode filter L17 is connected with the fifty-third end of the interface J1, and the fourth data negative end of the common mode filter L17 is connected with the fifty-second end of the interface J1;
the data end TXOUT _A3 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L18, the data end TXOUT _A3+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L18, the third data positive end of the common mode filter L18 is connected with the fifty-ninth end of the interface J1, and the fourth data negative end of the common mode filter L18 is connected with the fifty-eighth end of the interface J1;
The data end TXCLK_OUTA-of the deserializing chip U1 is connected with the first data negative end of the common mode filter L19, the data end TXCLK_OUTA+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L19, the third data positive end of the common mode filter L19 is connected with the fifty-sixth end of the interface J1, and the fourth data negative end of the common mode filter L19 is connected with the fourth fifty-fifth end of the interface J1;
The TFT screen enabling control end GPIO02 of the deserializing chip U1 is connected with the first end of the resistor R32, the second end of the resistor R32 is connected with the TFT screen enabling detection end PTE7 of the controller U6, the SCL_TX/GPIO15 of the deserializing chip U1 is connected with the first end of the resistor R36, and the second end of the resistor R36 is connected with the backlight enabling control end PTC8 of the controller U6;
The PWM regulating end WSIR/GPIO08 of the deserializing chip U1 is connected with the first end of the resistor R233, and the second end of the resistor R233 is connected with the PWM detecting end PTE9 of the controller U6; the power supply terminal VDDD of the deserializing chip U1 is connected to the power supply VDDD, and the power supply terminal EPGND of the deserializing chip U1 is connected to the power supply ground.
In summary, the beneficial effects of the utility model are as follows: can link to each other with external audio equipment through bluetooth module, realize audio output, for example connect bluetooth stereo set or bluetooth headset, can select according to different user demands, have a rest and amusement and give consideration to, improve the driving travelling comfort. Meanwhile, data decoding is performed through the deserializing chip, and display is performed through the TFT screen. Improve the amusement and comfort of driving and relieve the fatigue caused by long-time riding of the automobile. Adopt bluetooth, connect stably to the distance demand that bluetooth was connected is satisfied completely in the space in the car, sets up rationally.
Drawings
FIG. 1 is a schematic diagram of a system of the present utility model;
FIG. 2 is a circuit diagram of a controller;
Fig. 3 is a circuit diagram of the deserializing chip U1;
fig. 4 is a circuit diagram of the filter L8;
Fig. 5 is a circuit diagram of a bluetooth module;
Fig. 6 is a circuit diagram of a bluetooth power supply circuit;
FIG. 7 is a circuit diagram of interface J1;
FIG. 8 is a circuit diagram of a common mode filter module;
FIG. 9 is a schematic diagram of a circuit connection of a portion of the voltage sampling circuit of the present invention;
Fig. 10 is a schematic circuit connection diagram of a voltage sampling circuit portion according to the present invention.
FIG. 11 is a circuit diagram of the MCU power supply circuit;
Fig. 12 is a circuit diagram of the TFT screen interface J2.
Detailed Description
The utility model is further illustrated by the following examples in conjunction with the accompanying drawings:
As shown in fig. 1 to 12, a wireless transmission circuit for data of a ceiling screen comprises a controller U6, a deserializing chip U1, a bluetooth module, a power supply module and a wake-up module, wherein the power supply module is respectively connected with the controller U6, the deserializing chip U1, the bluetooth module and the wake-up module, and is used for supplying power through the power supply module, a deserializing data end of the controller U6 is connected with a deserializing data end of the deserializing chip U1, and a bluetooth data receiving end of the deserializing chip U1 is connected with a bluetooth data transmitting end of the bluetooth module; the wake-up signal input end of the wake-up module is connected with the ignition switch signal output end of the vehicle, the wake-up signal output end of the wake-up module is connected with the wake-up signal input end of the controller U6, and the deserializing chip U1, the Bluetooth module and the power supply module are started through the controller U6;
The controller U6TFT drive signal output end is connected with the interface J1TFT drive signal input end, the interface J1TFT drive signal output end is connected with the TFT screen interface J2TFT drive signal input end, and the TFT screen is externally connected with a TFT screen through the TFT screen interface J2.
In the scheme, the method comprises the following steps: the wake-up module comprises: the first end of the resistor R3 is connected with the power +3.3V_MCU and the emitter of the triode Q19, the second section of the resistor R3 is connected with the first end of the resistor R58 and the base of the triode Q19, the collector of the triode Q19 is connected with the first end of the resistor R2 and the wake-up end of the controller U6, the second end of the resistor R2 is connected with the power ground, the second end of the resistor R58 is connected with the collector of the triode Q1, the emitter of the triode Q1 is connected with the power ground, the base of the triode Q1 is connected with the first end of the capacitor C61 and the first end of the resistor R56, the second end of the capacitor C61 and the second end of the resistor R56 are connected with the power ground, the base of the triode Q1 is connected with the first end of the resistor R73, the second end of the resistor R73 is connected with the cathode of the diode D3, the anode of the diode D3 is connected with the wake-up end of the interface J3, the second end of the resistor R73 is connected with the first end of the resistor R59, the second end of the resistor R59 is connected with the first end of the resistor R60 and the first end of the capacitor C59, the second end of the resistor R59 is connected with the second end of the resistor C60 and the second end of the resistor R59 is connected with the PTC signal monitoring resistor C59.
The wake-up terminal through the interface J3 outputs a wake-up signal (the wake-up signal may be an ignition signal or other wake-up signals, for example, a wake-up signal sent by a vehicle control unit), and when the wake-up signal is an ignition signal, the resistor R73 and the resistor R56 divide the voltage to provide a conducting level for the triode Q1, the triode Q1 is conducted at this time, the level of the wake-up terminal PTD5 input into the controller U6 is a low level, and the controller U6 is woken up at this time; when the base of the transistor Q1 is at the off level, the transistor Q1 is in the off state, and the level of the wake-up terminal PTD5 of the input controller U6 is at the high level. In addition, after the wake-up end of the interface J3 outputs the wake-up signal, the wake-up signal can play a role in preventing reverse connection through the diode D3, and then the resistor R59 and the resistor R60 are utilized to realize voltage division, and the wake-up signal monitoring end PTC1 of the controller U6 is used for collecting whether the ignition signal is abnormal or not.
In the scheme, the method comprises the following steps: the power supply module comprises a power supply adaptive circuit, a power supply sampling circuit, an MCU power supply circuit and a Bluetooth power supply circuit
In the scheme, the method comprises the following steps: the power supply module comprises a power supply adaptive circuit, the power supply adaptive circuit comprises a field effect tube Q17 drain electrode connected with a battery power supply end, a transient suppression diode TVS1 end and a capacitor C65 end, the other end of the capacitor C65 is connected with a capacitor C64 end, the other end of the capacitor C64 and the other end of the transient suppression diode TVS1 are both connected with a power supply ground, the grid electrode of the field effect tube Q17 is connected with a resistor R99 end, the other end of the resistor R99 is connected with a power supply ground, the source electrode of the field effect tube Q17 is connected with a resistor R100 end, a diode D8 cathode, a capacitor C177 end and an inductor L3 end, the other end of the capacitor C177 end is connected with a power supply ground, the other end of the resistor R100, the positive electrode of the diode D8 and the other end of the capacitor C91 are connected with a resistor R99 end, the other end of the inductor L3 outputs power supply +VBATT, the other end of the inductor L3 is also connected with a capacitor C70 end and one end of the capacitor C62, and the other end of the capacitor C70 is connected with the power supply ground; the power supply BATTERY outputs voltage through a body diode of the field effect tube Q17, the field effect tube Q17 can not only prevent reverse connection and protect the safety of a subsequent circuit, but also basically has no voltage drop, so that the input voltage is equal to the output voltage, the output voltage is divided by a resistor R99 and a resistor R100 to provide a conduction level for the grid electrode of the field effect tube Q17, the field effect tube Q17 is conducted, at the moment, the source electrode of the field effect tube Q17 outputs continuous voltage, and the continuous voltage is filtered through a pi-type filter circuit formed by a capacitor C117, a capacitor C70 and an inductor L3 to output a power supply +VBATT; the power supply +VBATT provides power for the screen backlight module, provides power for the three-phase pre-driving module and provides power for the motor driving module.
The power supply sampling circuit includes: the emitter of the triode Q16 is connected with a power supply +VBATT, the collector of the triode Q16 is connected with a first end of a resistor R217, a second end of the resistor R217 is connected with a first end of a resistor R216 and a first end of a capacitor C141, a second end of the resistor R216 and a second end of the capacitor C141 are both connected with power supply ground, a second end of the resistor R217 is connected with a voltage sampling end PTB3 of a controller U6, a first end of the resistor R218 is connected with the power supply +VBATT, a second end of the resistor R218 is connected with a base of the triode Q16, a second end of the resistor R218 is connected with a first end of a resistor R215, and a second end of the resistor R215 is connected with a second end of a resistor R66. When the voltage sampling control end PTC16 of the controller U6 inputs the cut-off level to the base electrode of the triode Q3, the triode Q3 is in a cut-off state, the potential of the base electrode of the triode Q2 is equal to the potential of the emitter electrode of the triode Q2, the collector electrode of the triode Q2 has no voltage output, and similarly, the potential of the base electrode of the triode Q16 is equal to the potential of the emitter electrode of the triode Q16, and the collector electrode of the triode Q16 has no voltage output; when voltage sampling is required to be carried out on the power supply BATTERY and the power supply +VBATT, the voltage sampling control end PTC16 of the controller U6 inputs a conduction level to the base electrode of the triode Q3, the triode Q3 is in a conduction state, the voltage of the triode Q2 is pulled down at the moment, the collector electrode of the triode Q2 outputs voltage, the voltage safety of the voltage sampling end PTC0 of the input controller U6 is ensured through a voltage dividing circuit formed by the resistor R67 and the resistor R68, and the voltage acquisition of the power supply BATTERY is realized; meanwhile, the voltage of the triode Q16 is pulled down, the collector electrode of the triode Q16 outputs voltage, the voltage safety of a voltage sampling end PTB3 of the input controller U6 is ensured through a voltage dividing circuit formed by a resistor R217 and a resistor R216, and the voltage acquisition of the power supply +VBATT is realized.
In the scheme, the method comprises the following steps: the power supply module further comprises an MCU power supply circuit, the MCU power supply circuit comprises a first end of a resistor R115 connected with a power supply +VBATT, a second end of the resistor R115 connected with a first end of a capacitor C53, a first end of a capacitor C58 and a first end of a capacitor C54, a second end of the capacitor C53, a second end of the capacitor C58 and a second end of the capacitor C54 connected with power supply ground, a second end of the resistor R115 connected with a power supply end VIN of a DCDC buck converter U2, a bootstrap capacitor end BOOT of the DCDC buck converter U2 connected with a first end of a resistor R52, a second end of the resistor R52 connected with a first end of a capacitor C48, a second end of the capacitor C48 connected with an output end SW of the DCDC buck converter U2 connected with a first end of an inductor L6, a second end of the inductor L6 connected with a first end of a capacitor C49, a first end of the capacitor C50, a first end of the capacitor C51 and a first end of the capacitor C52 connected with a first end of the capacitor C52, the second end of the capacitor C49, the second end of the capacitor C50, the second end of the capacitor C51 and the second end of the capacitor C52 are connected with power ground, the second end of the inductor L6 outputs power +3.3VSW, the second end of the inductor L6 is connected with the first end of the resistor R62, the second end of the resistor R62 is connected with the first end of the resistor R61, the second end of the resistor R61 is connected with the first end of the resistor R63 and the feedback end FB of the DCDC buck converter U2, the second end of the resistor R63 is connected with power ground, the enable end EN of the DCDC buck converter U2 is connected with the control end PTD16 of the controller U6, the enable end EN of the DCDC buck converter U2 is connected with the first end of the resistor R11, the second end of the resistor R11 is connected with power ground, the clock frequency end RT/CLK of the DCDC buck converter U2 is connected with the first end of the resistor R51, the second end of the resistor R51 is connected with power ground, the enable end EPGND of the DCDC buck converter U2 is in contact with the heat sink U2, the power ground end GND of the DCDC buck converter U2 is connected with the power ground, the SOFT START end SOFT-START of the DCDC buck converter U2 is respectively connected with the first end of the capacitor C56 and the first end of the capacitor C92, the second end of the capacitor C92 is connected with the first end of the resistor R101, and the second end of the resistor R101 and the second end of the capacitor C56 are respectively connected with the power ground. When the output power +3.3vsw is needed, the control end PTD16 of the controller U6 inputs a high level to the enable end EN of the DCDC buck converter U2 to enable the DCDC buck converter U2 to operate, converts the input power +vbatt into a stable power +3.3vsw for output through the DCDC buck converter U2, and can also connect a resistor R65 at the second end of the inductor L6, and the resistor R65 outputs the power +3.3v_mcu to provide power for the controller module; in order to prevent the DCDC buck converter U2 from outputting power, the control terminal PTD16 of the controller U6 inputs a low level to the enable terminal EN of the DCDC buck converter U2 to disable the DCDC buck converter U2, and the DCDC buck converter U2 has no power output
In the scheme, the method comprises the following steps: the power supply module further includes: the power supply end VIN of the linear voltage regulator U5 is connected with the cathode of the diode D13, the anode of the diode D13 is connected with a power supply +VBAT2, the power supply output end VOUT of the linear voltage regulator U5 is connected with the first end of the capacitor C115, the second end of the capacitor C115 is connected with power supply ground, the power supply +3.3V_MCU is output by the power supply output end VOUT of the linear voltage regulator U5, the enable end EN of the linear voltage regulator U5 is connected with the third end of the high-speed switch diode D1 and one end of the resistor R116, the other end of the resistor R116 and the ground end of the linear voltage regulator U5 are both connected with power supply ground, the first end of the high-speed switch diode D1 is connected with one end of the resistor R31 and one end of the capacitor C114, the other end of the capacitor C114 is connected with power supply ground, the first end of the resistor R165 is connected with the first end of the capacitor C116, the second end of the resistor R165 and the second end of the capacitor C116 are respectively connected with power supply ground, the second end of the resistor R143 is connected with the cathode of the diode D3, and the ground end of the linear voltage regulator U5 is connected with the ground end GND 5; the end of the linear voltage stabilizer U5PG is connected with one end of a resistor R108, and the other end of the resistor R108 is connected with the reset end of the controller U6. The wake-up level signal is output through the cathode of the diode D3, the enable end EN of the linear voltage stabilizer U5 is made to be high level, the linear voltage stabilizer U5 works, the input power +VBAT2 is converted into a stable power +3.3V_MCU by the linear voltage stabilizer U5, the power is provided for the controller module, and the wake-up signal is provided for the wake-up module.
In the scheme, the method comprises the following steps: the Bluetooth power supply circuit comprises a resistor R48 one end connection controller U6 Bluetooth power supply enabling end, the other end of the resistor R48 is connected with one end of a resistor R75, one end of a capacitor C98 and the base electrode of a triode Q10, the emitter electrode of the triode Q10, the other end of the resistor R75 and the other end of the capacitor C98 are all connected with a power supply ground, the collector electrode of the triode Q10 is connected with one end of a resistor R44, the other end of the resistor R44 is connected with one end of a resistor R43 and the base electrode of the triode Q7, the emitter electrode of the triode Q7 is connected with the other end of the resistor R43 and 3.3V voltage, the collector electrode of the triode Q7 is connected with one end of an inductor L21, the other end of the inductor L21 is the Bluetooth power supply end, and 3.3V voltage is output.
The Bluetooth module U3 Bluetooth data transmitting end is connected with one end of a resistor R282 and one end of a resistor R279, the other end of the resistor R279 is connected with a Bluetooth power supply end of a Bluetooth power supply circuit, the other end of the resistor R282 is connected with a Bluetooth data receiving end of a controller U6, the Bluetooth data receiving end of the Bluetooth module U3 is connected with one end of a resistor R119 and one end of a resistor R280, the other end of the resistor R280 is connected with a Bluetooth power supply end of the Bluetooth power supply circuit, and the other end of the resistor R119 is connected with the Bluetooth data transmitting end of the controller U6;
The Bluetooth module U3 Bluetooth serial clock end is connected with one end of a resistor R28, the other end of the resistor R28 is connected with the deserializing chip U1 Bluetooth serial clock end, the Bluetooth module U3 Bluetooth serial output end is connected with one end of a resistor R11, the other end of the resistor R11 is connected with the deserializing chip U1 Bluetooth serial input end, the Bluetooth module U3 Bluetooth serial input end is connected with one end of a resistor R27, the other end of the resistor R27 is connected with the deserializing chip U1 Bluetooth serial output end, the Bluetooth module U3 Bluetooth serial data sampling frequency end is connected with one end of a resistor R29, the other end of the resistor R29 is connected with the deserializing chip U1 Bluetooth serial data sampling frequency end, the Bluetooth module U3 reset end is connected with one end of a resistor R225, the other end of the resistor R225 is connected with a controller U6 Bluetooth reset type output end, one end of a resistor R284 and one end of a capacitor C100, the other end of the resistor R284 is connected with a Bluetooth power supply end of a Bluetooth power supply circuit, one end of a capacitor C101, one end of a capacitor C107 and a working voltage input end of the Bluetooth module U3, the other end of the capacitor C101, the other end of the capacitor C107 and the Bluetooth module U3 ground end are all connected with the power supply end of the controller;
The Bluetooth module U3ANT protocol end is connected with one end of an inductor L23 and one end of a capacitor C10, the other end of the capacitor C10 is connected with power ground, the other end of the inductor L23 is connected with one end of a capacitor C102, one end of an electrostatic diode ESD3 and a signal end of a radio frequency coaxial connector J8, and the other end of the capacitor C102, the other end of the electrostatic diode ESD3 and a grounding end of the radio frequency coaxial connector J8 are all connected with power ground.
In the scheme, the method comprises the following steps: the power end VDD18 of the deserializing chip U1 is connected with the power supply VDD1V8 and one end of the inductor L7, and the other end of the inductor L7 is connected with the power supply +1.8VSW; the power supply end VDDIO of the deserializing chip U1 is connected with the power supply VDDIO and one end of the inductor L2, and the other end of the inductor L2 is connected with the power supply +3.3VSW; the deserializing chip U1VREG end and VREGA are both connected with the power supply VDDREG and one end of the inductor L5, and the other end of the inductor L5 is connected with the power supply +1.8VSW;
The first end of the resistor R123 is connected with the first end of the resistor R7, the second end of the resistor R7 is connected with the clock end PTA0 of the controller U6 and the first end of the resistor R121, the second end of the resistor R121 is connected with the power +3.3V_MCU, the second end of the resistor R123 is connected with the serial clock signal end SCL_TX of the deserializing chip U1, the first end of the resistor R122 is connected with the first end of the resistor R8, the second end of the resistor R8 is connected with the data end PTA1 of the controller U6 and the first end of the resistor R120, the second end of the resistor R120 is connected with the power +3.3V_MCU, the second end of the resistor R122 is connected with the data end SDA_RX of the deserializing chip U1, the first end of the resistor R116 is connected with the data end TX 2 of the controller U6, the first end of the resistor R117 is connected with the serial clock signal end 3 of the controller U6, and the second end of the resistor R117 is connected with the serial clock signal end SDA_RX of the deserializing chip U1;
The power supply end VDDA of the deserializing chip U1 is connected with the power supply VDDA, the first end of the resistor R102 is connected with the power supply VDDIO, the second end of the resistor R102 is connected with the twisted pair/coaxial line mode selection end CXTP/GPIO09 of the deserializing chip U1, the twisted pair/coaxial line mode selection end CXTP/GPIO09 of the deserializing chip U1 is connected with the first end of the resistor R96, and the second end of the resistor R96 is connected with the power supply ground;
The locking end LOCK of the deserializing chip U1 is connected with one end of a resistor R22 and one end of a resistor R128, the other end of the resistor R128 is connected with a power supply VDDIO, and the other end of the resistor R22 is connected with a locking control end PTE9 of the controller U6; the error indication end ERRB of the deserializing chip U1 is connected with one end of a resistor R26 and one end of a resistor R102, the other end of the resistor R102 is connected with a power supply VDDIO, and the other end of the resistor R22 is connected with a locking control end PTE9 of the controller U6;
the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the first end of the capacitor C35, the second end of the capacitor C35 is connected with the power ground, the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the third end of the crystal oscillator Y2, the ground end GND of the crystal oscillator Y2 is connected with the power ground, the third end of the crystal oscillator Y2 is connected with the first end of the resistor R14, and the second end of the resistor R14 is connected with the second end X2 of the crystal oscillator of the deserializing chip U1 and the first end of the crystal oscillator Y2;
The I2C mode selection end GPIO01/I2CSEL of the deserializing chip U1 is connected with the first end of a resistor R46 and the first end of a resistor R45, the second end of the resistor R46 is connected with a power supply VDDIO, and the second end of the resistor R45 is connected with a power supply ground; the differential signal end SIOA + of the deserializing chip U1 is connected with the first end of a capacitor C36, the second end of the capacitor C36 is connected with the first end of a resistor R15 and the fourth end of a common mode filter L8, the first end of the common mode filter L8 is connected with the first end of an interface J7, and the second end of the resistor R15 is connected with power ground; the differential signal end SIOA of the deserializing chip U1 is connected with the first end of the capacitor C37, the second end of the capacitor C37 is connected with the first end of the resistor R16 and the third end of the common mode filter L8, the second end of the resistor R16 is connected with the power ground, and the second end of the common mode filter L8 is connected with the second end of the interface J7;
The power-off mode selection end PWDNB of the deserializing chip U1 is connected with the first end of a resistor R21, one end of a resistor R230 and one end of a capacitor C153, the other end of the capacitor C153 is connected with power ground, and the second end of the resistor R21 is connected with the PTE1 port of a controller U6; the other end of the resistor R230 is connected with a power supply VDDIO;
The data end TXOUT _B0 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L14, the data end TXOUT _B0+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L14, the third data positive end of the common mode filter L14 is connected with the thirty-second end of the interface J1, and the fourth data negative end of the common mode filter L14 is connected with the thirty-first end of the interface J1;
the data end TXOUT _B1 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L13, the data end TXOUT _B1+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L13, the third data positive end of the common mode filter L13 is connected with the fourth terminal of the interface J1, and the fourth data negative end of the common mode filter L13 is connected with the thirty-fifth end of the interface J1;
the data end TXOUT _B2 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L11, the data end TXOUT _B2+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L11, the third data positive end of the common mode filter L11 is connected with the thirty-seventh end of the interface J1, and the fourth data negative end of the common mode filter L11 is connected with the thirty-eighth end of the interface J1;
the data end TXOUT _B3 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L10, the data end TXOUT _B3+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L10, the third data positive end of the common mode filter L10 is connected with the forty-four ends of the interface J1, and the fourth data negative end of the common mode filter L10 is connected with the forty-three ends of the interface J1;
The data end TXCLK_OUTB of the deserializing chip U1 is connected with the first data negative end of the common mode filter L12, the data end TXCLK_OUTB+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L12, the third data positive end of the common mode filter L12 is connected with the forty end of the interface J1, and the fourth data negative end of the common mode filter L12 is connected with the forty end of the interface J1;
The data end TXOUT _a0 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L15, the data end TXOUT _a0+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L15, the third data positive end of the common mode filter L15 is connected with the forty-seventh end of the interface J1, and the fourth data negative end of the common mode filter L15 is connected with the forty-sixth end of the interface J1;
The data end TXOUT _a1 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L16, the data end TXOUT _a1+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L16, the third data positive end of the common mode filter L16 is connected with the fifty end of the interface J1, and the fourth data negative end of the common mode filter L16 is connected with the forty-ninth end of the interface J1;
The data end TXOUT _A2 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L17, the data end TXOUT _A2+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L17, the third data positive end of the common mode filter L17 is connected with the fifty-third end of the interface J1, and the fourth data negative end of the common mode filter L17 is connected with the fifty-second end of the interface J1;
the data end TXOUT _A3 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L18, the data end TXOUT _A3+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L18, the third data positive end of the common mode filter L18 is connected with the fifty-ninth end of the interface J1, and the fourth data negative end of the common mode filter L18 is connected with the fifty-eighth end of the interface J1;
The data end TXCLK_OUTA-of the deserializing chip U1 is connected with the first data negative end of the common mode filter L19, the data end TXCLK_OUTA+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L19, the third data positive end of the common mode filter L19 is connected with the fifty-sixth end of the interface J1, and the fourth data negative end of the common mode filter L19 is connected with the fourth fifty-fifth end of the interface J1. Wherein the common mode filters L10 to L19 are integrated together to form a common mode filter module.
The TFT screen enabling control end GPIO02 of the deserializing chip U1 is connected with the first end of the resistor R32, the second end of the resistor R32 is connected with the TFT screen enabling detection end PTE7 of the controller U6, the SCL_TX/GPIO15 of the deserializing chip U1 is connected with the first end of the resistor R36, and the second end of the resistor R36 is connected with the backlight enabling control end PTC8 of the controller U6;
The PWM regulating end WSIR/GPIO08 of the deserializing chip U1 is connected with the first end of the resistor R233, and the second end of the resistor R233 is connected with the PWM detecting end PTE9 of the controller U6; the power supply terminal VDDD of the deserializing chip U1 is connected to the power supply VDDD, and the power supply terminal EPGND of the deserializing chip U1 is connected to the power supply ground.
The differential signal negative end SIOB-of the deserializing chip U1 is connected with the first end of a capacitor C42, the second end of the capacitor C42 is connected with the first end of a resistor R18, the second end of the resistor R18 is connected with the power ground, the differential signal positive end SIOB+ of the deserializing chip U1 is connected with the first end of a capacitor C38, the second end of the capacitor C38 is connected with the first end of a resistor R17, the second end of the resistor R17 is connected with the power ground, the first end of the resistor R17 is connected with the first end of an electrostatic protection diode ESD5, the second end of the electrostatic protection diode ESD5 is connected with the power ground, the first end of the electrostatic protection diode ESD5 is connected with a video signal data end RF of an interface J4, and a power ground end GND of the interface J4 is connected with the power ground; the interface J4 is connected with the video line, so that video data transmitted from the interface J4 can be played on a screen.
While embodiments of the present utility model have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the utility model, the scope of which is defined by the claims and their equivalents.

Claims (8)

1. A ceiling screen data wireless transmission circuit is characterized in that: the device comprises a controller (U6), a deserializing chip (U1), a Bluetooth module, a power supply module and a wake-up module, wherein the power supply module is respectively connected with the controller (U6), the deserializing chip (U1), the Bluetooth module and the wake-up module, and is used for supplying power through the power supply module, a deserializing data end of the controller (U6) is connected with a deserializing data end of the deserializing chip (U1), and a Bluetooth data receiving end of the deserializing chip (U1) is connected with a Bluetooth data transmitting end of the Bluetooth module; the wake-up signal input end of the wake-up module is connected with the ignition switch signal output end of the vehicle, the wake-up signal output end of the wake-up module is connected with the wake-up signal input end of the controller (U6), and the deserializing chip (U1), the Bluetooth module and the power supply module are started through the controller U6;
The display device further comprises an interface J1, wherein a TFT driving signal output end of the controller (U6) is connected with a TFT driving signal input end of the interface J1, a TFT driving signal output end of the interface J1 is connected with a TFT screen interface J2TFT driving signal input end, and a TFT screen is externally connected through the TFT screen interface J2.
2. The ceiling screen data wireless transmission circuit of claim 1, wherein: the wake-up module comprises: the first end of the resistor R3 is connected with the power +3.3V_MCU and the emitter of the triode Q19, the second section of the resistor R3 is connected with the first end of the resistor R58 and the base of the triode Q19, the collector of the triode Q19 is connected with the first end of the resistor R2 and the wake-up end of the controller U6, the second end of the resistor R2 is connected with the power ground, the second end of the resistor R58 is connected with the collector of the triode Q1, the emitter of the triode Q1 is connected with the power ground, the base of the triode Q1 is connected with the first end of the capacitor C61 and the first end of the resistor R56, the second end of the capacitor C61 and the second end of the resistor R56 are connected with the power ground, the base of the triode Q1 is connected with the first end of the resistor R73, the second end of the resistor R73 is connected with the cathode of the diode D3, the anode of the diode D3 is connected with the wake-up end of the interface J3, the second end of the resistor R73 is connected with the first end of the resistor R59, the second end of the resistor R59 is connected with the first end of the resistor R60 and the first end of the capacitor C59, the second end of the resistor R59 is connected with the second end of the resistor C60 and the second end of the resistor R59 is connected with the PTC signal monitoring resistor C59.
3. The ceiling screen data wireless transmission circuit of claim 1, wherein: the power supply module comprises a power supply adapting circuit, a power supply sampling circuit, an MCU power supply circuit and a Bluetooth power supply circuit.
4. A ceiling screen data wireless transmission circuit according to claim 3, wherein: the power supply module comprises a power supply adaptive circuit, the power supply adaptive circuit comprises a field effect tube Q17 drain electrode connected with a battery power supply end, a transient suppression diode TVS1 end and a capacitor C65 end, the other end of the capacitor C65 is connected with a capacitor C64 end, the other end of the capacitor C64 and the other end of the transient suppression diode TVS1 are both connected with a power supply ground, the grid electrode of the field effect tube Q17 is connected with a resistor R99 end, the other end of the resistor R99 is connected with a power supply ground, the source electrode of the field effect tube Q17 is connected with a resistor R100 end, a diode D8 cathode, a capacitor C177 end and an inductor L3 end, the other end of the capacitor C177 end is connected with a power supply ground, the other end of the resistor R100, the positive electrode of the diode D8 and the other end of the capacitor C91 are connected with a resistor R99 end, the other end of the inductor L3 outputs power supply +VBATT, the other end of the inductor L3 is also connected with a capacitor C70 end and one end of the capacitor C62, and the other end of the capacitor C70 is connected with the power supply ground;
The power supply sampling circuit includes: the emitter of the triode Q2 is connected with a power supply BATTERY, the collector of the triode Q2 is connected with a first end of a resistor R67, a second end of the resistor R67 is connected with a first end of a resistor R68 and a first end of a capacitor C67, the second end of the resistor R68 and the second end of the capacitor C67 are both connected with power supply ground, the second end of the resistor R68 is connected with a voltage sampling end PTC0 of a controller U6, the first end of the resistor R71 is connected with the power supply BATTERY, the second end of the resistor R71 is connected with a base of the triode Q2, the second end of the resistor R71 is connected with a first end of a resistor R66, the second end of the resistor R66 is connected with a collector of the triode Q3, the emitter of the triode Q3 is connected with power supply ground, the base of the triode Q3 is connected with a first end of the resistor R70, the second end of the resistor R70 is connected with power supply ground, the base of the triode Q3 is connected with the first end of the resistor R69, and the second end of the resistor R69 is connected with a voltage sampling control end PTC16 of the controller U6.
The emitter of the triode Q16 is connected with a power supply +VBATT, the collector of the triode Q16 is connected with a first end of a resistor R217, a second end of the resistor R217 is connected with a first end of a resistor R216 and a first end of a capacitor C141, a second end of the resistor R216 and a second end of the capacitor C141 are both connected with power supply ground, a second end of the resistor R217 is connected with a voltage sampling end PTB3 of a controller U6, a first end of the resistor R218 is connected with the power supply +VBATT, a second end of the resistor R218 is connected with a base of the triode Q16, a second end of the resistor R218 is connected with a first end of a resistor R215, and a second end of the resistor R215 is connected with a second end of a resistor R66.
5. A ceiling screen data wireless transmission circuit according to claim 3, wherein: the power supply module further comprises an MCU power supply circuit, the MCU power supply circuit comprises a first end of a resistor R115 connected with a power supply +VBATT, a second end of the resistor R115 connected with a first end of a capacitor C53, a first end of a capacitor C58 and a first end of a capacitor C54, a second end of the capacitor C53, a second end of the capacitor C58 and a second end of the capacitor C54 connected with power supply ground, a second end of the resistor R115 connected with a power supply end VIN of a DCDC buck converter U2, a bootstrap capacitor end BOOT of the DCDC buck converter U2 connected with a first end of a resistor R52, a second end of the resistor R52 connected with a first end of a capacitor C48, a second end of the capacitor C48 connected with an output end SW of the DCDC buck converter U2 connected with a first end of an inductor L6, a second end of the inductor L6 connected with a first end of a capacitor C49, a first end of the capacitor C50, a first end of the capacitor C51 and a first end of the capacitor C52 connected with a first end of the capacitor C52, the second end of the capacitor C49, the second end of the capacitor C50, the second end of the capacitor C51 and the second end of the capacitor C52 are connected with power ground, the second end of the inductor L6 outputs power +3.3VSW, the second end of the inductor L6 is connected with the first end of the resistor R62, the second end of the resistor R62 is connected with the first end of the resistor R61, the second end of the resistor R61 is connected with the first end of the resistor R63 and the feedback end FB of the DCDC buck converter U2, the second end of the resistor R63 is connected with power ground, the enable end EN of the DCDC buck converter U2 is connected with the control end PTD16 of the controller U6, the enable end EN of the DCDC buck converter U2 is connected with the first end of the resistor R11, the second end of the resistor R11 is connected with power ground, the clock frequency end RT/CLK of the DCDC buck converter U2 is connected with the first end of the resistor R51, the second end of the resistor R51 is connected with power ground, the enable end EPGND of the DCDC buck converter U2 is in contact with the heat sink U2, the power ground end GND of the DCDC buck converter U2 is connected with the power ground, the SOFT START end SOFT-START of the DCDC buck converter U2 is respectively connected with the first end of the capacitor C56 and the first end of the capacitor C92, the second end of the capacitor C92 is connected with the first end of the resistor R101, and the second end of the resistor R101 and the second end of the capacitor C56 are respectively connected with the power ground.
6. The ceiling data wireless transmission circuit of claim 5, wherein: the power supply module further includes: the power supply end VIN of the linear voltage regulator U5 is connected with the cathode of the diode D13, the anode of the diode D13 is connected with a power supply +VBAT2, the power supply output end VOUT of the linear voltage regulator U5 is connected with the first end of the capacitor C115, the second end of the capacitor C115 is connected with power supply ground, the power supply +3.3V_MCU is output by the power supply output end VOUT of the linear voltage regulator U5, the enable end EN of the linear voltage regulator U5 is connected with the third end of the high-speed switch diode D1 and one end of the resistor R116, the other end of the resistor R116 and the ground end of the linear voltage regulator U5 are both connected with power supply ground, the first end of the high-speed switch diode D1 is connected with one end of the resistor R31 and one end of the capacitor C114, the other end of the capacitor C114 is connected with power supply ground, the first end of the resistor R165 is connected with the first end of the capacitor C116, the second end of the resistor R165 and the second end of the capacitor C116 are respectively connected with power supply ground, the second end of the resistor R143 is connected with the cathode of the diode D3, and the ground end of the linear voltage regulator U5 is connected with the ground end GND 5; the end of the linear voltage stabilizer U5PG is connected with one end of a resistor R108, and the other end of the resistor R108 is connected with the reset end of the controller U6.
7. A ceiling screen data wireless transmission circuit according to claim 3, wherein: the Bluetooth power supply circuit comprises a resistor R48, one end of the resistor R48 is connected with a Bluetooth power supply enabling end of a controller (U6), the other end of the resistor R48 is connected with one end of a resistor R75, one end of a capacitor C98 and a base electrode of a triode Q10, an emitter electrode of the triode Q10, the other end of the resistor R75 and the other end of the capacitor C98 are all connected with power ground, a collector electrode of the triode Q10 is connected with one end of a resistor R44, the other end of the resistor R44 is connected with one end of a resistor R43 and a base electrode of a triode Q7, an emitter electrode of the triode Q7 is connected with the other end of the resistor R43 and 3.3V voltage, a collector electrode of the triode Q7 is connected with one end of an inductor L21, and the other end of the inductor L21 is the Bluetooth power supply end and outputs 3.3V voltage;
The Bluetooth module (U3) Bluetooth data transmitting end is connected with one end of a resistor R282 and one end of a resistor R279, the other end of the resistor R279 is connected with a Bluetooth power supply end of a Bluetooth power supply circuit, the other end of the resistor R282 is connected with a Bluetooth data receiving end of a controller (U6), the Bluetooth data receiving end of the Bluetooth module (U3) is connected with one end of a resistor R119 and one end of a resistor R280, the other end of the resistor R280 is connected with a Bluetooth power supply end of the Bluetooth power supply circuit, and the other end of the resistor R119 is connected with the Bluetooth data transmitting end of the controller (U6);
The Bluetooth module (U3) Bluetooth serial clock end is connected with one end of a resistor R28, the other end of the resistor R28 is connected with the deserializing chip (U1) Bluetooth serial clock end, the Bluetooth module (U3) Bluetooth serial output end is connected with one end of a resistor R11, the other end of the resistor R11 is connected with the deserializing chip (U1) Bluetooth serial input end, the Bluetooth module (U3) Bluetooth serial input end is connected with one end of a resistor R27, the other end of the resistor R27 is connected with the deserializing chip (U1) Bluetooth serial output end, the Bluetooth module (U3) Bluetooth serial data sampling frequency end is connected with one end of a resistor R29, the other end of the resistor R29 is connected with the deserializing chip (U1) Bluetooth serial data sampling frequency end, the Bluetooth module (U3) reset end is connected with one end of a resistor R225, the other end of the resistor R225 is connected with the Bluetooth reset output end of a controller (U6), one end of a resistor R284 and one end of a capacitor C100, the other end of the capacitor C100 is connected with power ground, the other end of the capacitor C101, one end of the capacitor C107 and the other end of the Bluetooth module (U3) work voltage input end, and the other end of the capacitor C101 and the other end of the capacitor C is connected with the power ground;
The Bluetooth module (U3) ANT protocol end is connected with one end of an inductor L23 and one end of a capacitor C10, the other end of the capacitor C10 is connected with power ground, the other end of the inductor L23 is connected with one end of a capacitor C102, one end of an electrostatic diode ESD3 and a signal end of a radio frequency coaxial connector J8, and the other end of the capacitor C102, the other end of the electrostatic diode ESD3 and a grounding end of the radio frequency coaxial connector J8 are all connected with power ground.
8. The ceiling screen data wireless transmission circuit of claim 1, wherein: the power end VDD18 of the deserializing chip U1 is connected with the power supply VDD1V8 and one end of the inductor L7, and the other end of the inductor L7 is connected with the power supply +1.8VSW; the power supply end VDDIO of the deserializing chip U1 is connected with the power supply VDDIO and one end of the inductor L2, and the other end of the inductor L2 is connected with the power supply +3.3VSW; the deserializing chip (U1) VREG end and VREGA are both connected with a power supply VDDREG and one end of an inductor L5, and the other end of the inductor L5 is connected with a power supply +1.8VSW;
The locking end LOCK of the deserializing chip U1 is connected with one end of a resistor R22 and one end of a resistor R128, the other end of the resistor R128 is connected with a power supply VDDIO, and the other end of the resistor R22 is connected with a locking control end PTE9 of the controller U6; the error indication end ERRB of the deserializing chip U1 is connected with one end of a resistor R26 and one end of a resistor R102, the other end of the resistor R102 is connected with a power supply VDDIO, and the other end of the resistor R22 is connected with a locking control end PTE9 of the controller U6;
the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the first end of the capacitor C35, the second end of the capacitor C35 is connected with the power ground, the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the third end of the crystal oscillator Y2, the ground end GND of the crystal oscillator Y2 is connected with the power ground, the third end of the crystal oscillator Y2 is connected with the first end of the resistor R14, and the second end of the resistor R14 is connected with the second end X2 of the crystal oscillator of the deserializing chip U1 and the first end of the crystal oscillator Y2;
The I2C mode selection end GPIO01/I2CSEL of the deserializing chip U1 is connected with the first end of a resistor R46 and the first end of a resistor R45, the second end of the resistor R46 is connected with a power supply VDDIO, and the second end of the resistor R45 is connected with a power supply ground; the differential signal end SIOA + of the deserializing chip U1 is connected with the first end of a capacitor C36, the second end of the capacitor C36 is connected with the first end of a resistor R15 and the fourth end of a common mode filter L8, the first end of the common mode filter L8 is connected with the first end of an interface J7, and the second end of the resistor R15 is connected with power ground; the differential signal end SIOA of the deserializing chip U1 is connected with the first end of the capacitor C37, the second end of the capacitor C37 is connected with the first end of the resistor R16 and the third end of the common mode filter L8, the second end of the resistor R16 is connected with the power ground, and the second end of the common mode filter L8 is connected with the second end of the interface J7;
The power-off mode selection end PWDNB of the deserializing chip U1 is connected with the first end of a resistor R21, one end of a resistor R230 and one end of a capacitor C153, the other end of the capacitor C153 is connected with power ground, and the second end of the resistor R21 is connected with the PTE1 port of a controller U6; the other end of the resistor R230 is connected with a power supply VDDIO;
The data end TXOUT _B0 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L14, the data end TXOUT _B0+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L14, the third data positive end of the common mode filter L14 is connected with the thirty-second end of the interface J1, and the fourth data negative end of the common mode filter L14 is connected with the thirty-first end of the interface J1;
the data end TXOUT _B1 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L13, the data end TXOUT _B1+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L13, the third data positive end of the common mode filter L13 is connected with the fourth terminal of the interface J1, and the fourth data negative end of the common mode filter L13 is connected with the thirty-fifth end of the interface J1;
the data end TXOUT _B2 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L11, the data end TXOUT _B2+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L11, the third data positive end of the common mode filter L11 is connected with the thirty-seventh end of the interface J1, and the fourth data negative end of the common mode filter L11 is connected with the thirty-eighth end of the interface J1;
the data end TXOUT _B3 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L10, the data end TXOUT _B3+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L10, the third data positive end of the common mode filter L10 is connected with the forty-four ends of the interface J1, and the fourth data negative end of the common mode filter L10 is connected with the forty-three ends of the interface J1;
The data end TXCLK_OUTB of the deserializing chip U1 is connected with the first data negative end of the common mode filter L12, the data end TXCLK_OUTB+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L12, the third data positive end of the common mode filter L12 is connected with the forty end of the interface J1, and the fourth data negative end of the common mode filter L12 is connected with the forty end of the interface J1;
The data end TXOUT _a0 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L15, the data end TXOUT _a0+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L15, the third data positive end of the common mode filter L15 is connected with the forty-seventh end of the interface J1, and the fourth data negative end of the common mode filter L15 is connected with the forty-sixth end of the interface J1;
The data end TXOUT _a1 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L16, the data end TXOUT _a1+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L16, the third data positive end of the common mode filter L16 is connected with the fifty end of the interface J1, and the fourth data negative end of the common mode filter L16 is connected with the forty-ninth end of the interface J1;
The data end TXOUT _A2 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L17, the data end TXOUT _A2+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L17, the third data positive end of the common mode filter L17 is connected with the fifty-third end of the interface J1, and the fourth data negative end of the common mode filter L17 is connected with the fifty-second end of the interface J1;
the data end TXOUT _A3 of the deserializing chip U1 is connected with the first data negative end of the common mode filter L18, the data end TXOUT _A3+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L18, the third data positive end of the common mode filter L18 is connected with the fifty-ninth end of the interface J1, and the fourth data negative end of the common mode filter L18 is connected with the fifty-eighth end of the interface J1;
The data end TXCLK_OUTA-of the deserializing chip U1 is connected with the first data negative end of the common mode filter L19, the data end TXCLK_OUTA+ of the deserializing chip U1 is connected with the second data positive end of the common mode filter L19, the third data positive end of the common mode filter L19 is connected with the fifty-sixth end of the interface J1, and the fourth data negative end of the common mode filter L19 is connected with the fourth fifty-fifth end of the interface J1;
The TFT screen enabling control end GPIO02 of the deserializing chip U1 is connected with the first end of the resistor R32, the second end of the resistor R32 is connected with the TFT screen enabling detection end PTE7 of the controller U6, the SCL_TX/GPIO15 of the deserializing chip U1 is connected with the first end of the resistor R36, and the second end of the resistor R36 is connected with the backlight enabling control end PTC8 of the controller U6;
The PWM regulating end WSIR/GPIO08 of the deserializing chip U1 is connected with the first end of the resistor R233, and the second end of the resistor R233 is connected with the PWM detecting end PTE9 of the controller U6; the power supply terminal VDDD of the deserializing chip U1 is connected to the power supply VDDD, and the power supply terminal EPGND of the deserializing chip U1 is connected to the power supply ground.
CN202322857539.6U 2023-10-24 2023-10-24 Ceiling screen data wireless transmission circuit Active CN220913748U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322857539.6U CN220913748U (en) 2023-10-24 2023-10-24 Ceiling screen data wireless transmission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322857539.6U CN220913748U (en) 2023-10-24 2023-10-24 Ceiling screen data wireless transmission circuit

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CN220913748U true CN220913748U (en) 2024-05-07

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