CN220874215U - Overcurrent protection circuit - Google Patents

Overcurrent protection circuit Download PDF

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Publication number
CN220874215U
CN220874215U CN202322347329.2U CN202322347329U CN220874215U CN 220874215 U CN220874215 U CN 220874215U CN 202322347329 U CN202322347329 U CN 202322347329U CN 220874215 U CN220874215 U CN 220874215U
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electrically connected
module
voltage
circuit
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王合斌
郝潇潇
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Suzhou Shidai Xin'an Energy Technology Co ltd
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Suzhou Shidai Xin'an Energy Technology Co ltd
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Abstract

The invention discloses an overcurrent protection circuit. The overcurrent protection circuit includes: a power supply capacitor; the inverter driving sub-circuit comprises at least one power switching device, a first end of the inverter driving sub-circuit is electrically connected with a positive plate of the power supply capacitor, a second end of the inverter driving sub-circuit is electrically connected with a negative plate of the power supply capacitor, and a third end of the inverter driving sub-circuit is electrically connected with a load; a sensing unit electrically connected to the first bus bar; the first sampling comparison sub-circuit is respectively and electrically connected with two ends of the sensing unit and a reference voltage end, and is configured to collect a first voltage drop of the two ends of the sensing unit and output a first level in response to the first voltage drop being larger than the reference voltage of the reference voltage end; and a processing unit electrically connected to the first sampling comparison sub-circuit and the control terminal of the power switching device, respectively, and configured to stop transmitting the pulse width modulation signal to the power switching device in response to the first level. According to the embodiment of the application, when abnormal overcurrent occurs in the upper bridge, the driving circuit is effectively prevented from being damaged.

Description

Overcurrent protection circuit
Technical Field
The application belongs to the technical field of circuits, and particularly relates to an overcurrent protection circuit.
Background
In the technical field of electrical equipment, the reliability and safety of the operation of a device system are all design preconditions, and when the system is operated, if the output current is too large, namely, an overcurrent phenomenon occurs, the damage to a driver and a load can be caused. In order to avoid the occurrence of an overcurrent phenomenon and ensure the reliability of a driving system, a stable and reliable overcurrent protection measure is required.
The traditional overcurrent protection measure is to carry out current sampling protection by a method of placing a resistor shunt under the emitter of a lower bridge insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT).
However, the conventional overcurrent protection measures can only sample the lower bridge current because the resistor shunt is arranged under the emitter of the lower bridge IGBT, and when the short circuit of the output of the driver to the ground occurs, the current flows into the ground from the first bus, and the conventional overcurrent protection measures cannot detect the abnormality of the bus current.
Disclosure of utility model
The embodiment of the application provides an overcurrent protection circuit which can detect the abnormality of a first bus current and stop transmitting a pulse width modulation signal (Pulse Width Modulation, PWM) to a power switch device through a processing unit to realize the protection of a driving circuit.
In a first aspect, an embodiment of the present application provides an overcurrent protection circuit, including: a power supply capacitor; the inverter driving sub-circuit comprises at least one power switching device, a first end of the inverter driving sub-circuit is electrically connected with a positive plate of the power supply capacitor through a first bus, a second end of the inverter driving sub-circuit is electrically connected with a negative plate of the power supply capacitor through a second bus, and a third end of the inverter driving sub-circuit is electrically connected with a load; the sensing unit is electrically connected with the first bus; the first sampling comparison sub-circuit is electrically connected with two ends of the sensing unit and a reference voltage end respectively, and is configured to collect a first voltage drop at the two ends of the sensing unit and output a first level in response to the first voltage drop being greater than the reference voltage at the reference voltage end; and the processing unit is electrically connected with the first sampling comparison subcircuit and the control end of the power switch device respectively and is configured to respond to the first level to stop transmitting the pulse width modulation signal to the power switch device.
According to an embodiment of the first aspect of the application, the inverter drive sub-circuit comprises at least one drive leg comprising: the upper bridge inversion driving module is electrically connected with the positive plate of the power supply capacitor through a first bus, and the second end of the upper bridge inversion driving module is electrically connected with the load; the lower bridge inversion driving module is electrically connected with the second end of the upper bridge inversion driving module and the load at the first end; the overcurrent protection circuit further includes: the sampling resistor is electrically connected to the driving branch circuit; and the second sampling comparison sub-circuit is electrically connected with two ends of the sampling resistor, the reference voltage end and the processing unit respectively, and is configured to collect a second voltage drop of the two ends of the sampling resistor and output the first level to the processing unit in response to the second voltage drop being larger than the reference voltage.
According to any of the foregoing embodiments of the first aspect of the present application, the sampling resistor is electrically connected between the first end of the upper bridge inverter driving module and the first bus bar, and/or the sampling resistor is electrically connected between the second end of the lower bridge inverter driving module and the second bus bar.
According to any one of the foregoing embodiments of the first aspect of the present application, the inverter driving sub-circuit includes a first driving branch, a second driving branch, and a third driving branch, the first driving branch is electrically connected to a first phase of the load, the second driving branch is electrically connected to a second phase of the load, and the third driving branch is electrically connected to a third phase of the load; the sampling resistor comprises a first sampling resistor, a second sampling resistor and a third sampling resistor, wherein the first sampling resistor is electrically connected to the first driving branch, the second sampling resistor is electrically connected to the second driving branch, and the third sampling resistor is electrically connected to the third driving branch; the second sampling comparison sub-circuit comprises a first sub-sampling comparison sub-circuit, a second sub-sampling comparison sub-circuit and a third sub-sampling comparison sub-circuit, wherein the first sub-sampling comparison sub-circuit is respectively and electrically connected with two ends of the first sampling resistor, a reference voltage end and the processing unit, the second sub-sampling comparison sub-circuit is respectively and electrically connected with two ends of the second sampling resistor, the reference voltage end and the processing unit, and the third sub-sampling comparison sub-circuit is respectively and electrically connected with two ends of the third sampling resistor, the reference voltage end and the processing unit.
According to any one of the embodiments of the first aspect of the present application, the first sampling resistor is electrically connected between the second end of the lower bridge inverter driving module of the first driving branch and the second bus, the second sampling resistor is electrically connected between the second end of the lower bridge inverter driving module of the second driving branch and the second bus, and the third sampling resistor is electrically connected between the second end of the lower bridge inverter driving module of the third driving branch and the second bus; or the first sampling resistor is electrically connected between the first end of the upper bridge inversion driving module of the first driving branch and the first bus, the second sampling resistor is electrically connected between the first end of the upper bridge inversion driving module of the second driving branch and the first bus, and the third sampling resistor is electrically connected between the first end of the upper bridge inversion driving module of the third driving branch and the first bus.
According to any of the foregoing embodiments of the first aspect of the present application, the processing unit includes a current collection interface electrically connected to the sampling resistor, the processing unit is configured to convert the received current from an analog signal to a digital signal, and stop transmitting the pulse width modulated signal to the power switching device in response to the digital signal being greater than a set value.
According to any of the foregoing embodiments of the first aspect of the present application, the first sampling comparison sub-circuit includes: the first end of the voltage division module group is electrically connected with the reference voltage end, and the second end of the voltage division module group is electrically connected with the grounding end; the first input end of the comparison module is electrically connected with the third end of the voltage division module group, the first input end of the comparison module receives the reference voltage provided by the voltage division module group, the second input end of the comparison module receives the first voltage drop, the output end of the comparison module is electrically connected with the processing unit, and the comparison module is configured to output a first level to the processing unit in response to the first voltage drop being larger than the reference voltage of the reference voltage end.
According to any of the foregoing embodiments of the first aspect of the present application, the first sample comparison sub-circuit further includes: the input end of the amplifying module receives the first voltage drop, the output end of the amplifying module is electrically connected with the second input end of the comparing module, and the amplifying module is configured to amplify the first voltage drop; the comparison module is configured to output a first level to the processing unit in response to the amplified first voltage drop being greater than a reference voltage of the reference voltage terminal.
According to any of the foregoing embodiments of the first aspect of the present application, the first sample comparison sub-circuit further includes: the first end of the first voltage division module is electrically connected with the third end of the voltage division module group, and the second end of the first voltage division module is electrically connected with the first input end of the comparison module; the first end of the second voltage division module is electrically connected with the first input end of the comparison module, and the second end of the second voltage division module is electrically connected with the output end of the comparison module; the first end of the third voltage division module is electrically connected with the output end of the comparison module, and the second end of the third voltage division module is electrically connected with the processing unit; the first end of the fourth voltage dividing module is electrically connected with the power supply end, and the second end of the fourth voltage dividing module is electrically connected with the output end of the comparison module and the first end of the third voltage dividing module; the first end of the first filtering module is electrically connected with the second end of the third voltage dividing module and the processing unit, and the second end of the filtering module is electrically connected with the grounding end.
According to any of the foregoing embodiments of the first aspect of the present application, the voltage dividing module group includes: the first end of the fifth voltage division module is electrically connected with the reference voltage end, and the second end of the fifth voltage division module is electrically connected with the first end of the first voltage division module; the first end of the sixth voltage division module is electrically connected with the second end of the fifth voltage division module and the first end of the first voltage division module, and the second end of the sixth voltage division module is electrically connected with the grounding end; the first sample comparison subcircuit further includes: the first end of the seventh voltage division module is configured to receive the current signal of the first bus, and the second end of the seventh voltage division module is electrically connected with the first input end of the amplifying module; the first end of the eighth voltage division module is configured to receive the current signal of the first bus, and the second end of the eighth voltage division module is electrically connected with the second input end of the amplifying module; the first end of the ninth voltage division module is electrically connected with the power supply end, and the second end of the ninth voltage division module is electrically connected with the second end of the seventh voltage division module and the first input end of the amplifying module; the first end of the tenth voltage division module is electrically connected with the second input end of the amplifying module and the second end of the eighth voltage division module, and the second end of the tenth voltage division module is electrically connected with the output end of the amplifying module; the first end of the eleventh voltage division module is electrically connected with the output end of the amplifying module, and the second end of the eleventh voltage division module is electrically connected with the second input end of the comparing module; the first end of the second filtering module is electrically connected with the second end of the eleventh voltage dividing module and the second input end of the comparison module, and the second end of the second filtering module is electrically connected with the grounding end.
The overcurrent protection circuit comprises a power supply capacitor, an inversion driving sub-circuit, a sensing unit, a first sampling comparison sub-circuit and a processing unit. The inverter driving sub-circuit comprises at least one power switching device, a first end of the inverter driving sub-circuit is electrically connected with a positive plate of the power supply capacitor through a first bus, a second end of the inverter driving sub-circuit is electrically connected with a negative plate of the power supply capacitor through a second bus, a third end of the inverter driving sub-circuit is electrically connected with a load, and the inverter driving sub-circuit is used for converting current flowing through the inverter driving sub-circuit from a direct current signal to an alternating current signal; the sensing unit is electrically connected with the first bus and is used for collecting and transmitting a current signal flowing through the first bus to the first sampling comparison sub-circuit; the first sampling comparison sub-circuit is respectively and electrically connected with two ends of the sensing unit and a reference voltage end, and is used for collecting first voltage drops at two ends of the sensing unit, and outputting a first level when the first voltage drops are larger than the reference voltage at the reference voltage end; the processing unit is electrically connected with the first sampling comparison sub-circuit and the control end of the power switch device respectively, and when the processing unit receives the first level, the transmission of the pulse width modulation signal to the power switch device is stopped. In this way, the power supply capacitor and the sensing unit are located on the first bus, and when the load is shorted to the ground, the power supply capacitor begins to discharge. The current of the power supply capacitor flows into the ground through the sensing unit and the inversion driving sub-circuit, and at the moment, the sensing unit can collect the current of the first bus and transmit the current to the first sampling comparison sub-circuit. The first sampling comparison sub-circuit collects first voltage drops at two ends of the sensing unit, and when abnormal overcurrent occurs in the first bus, the collected first voltage drops are larger than reference voltage at a reference voltage end of the first sampling comparison sub-circuit, and a first level is output to the processing unit. The processing unit reacts to the power device according to the received signal, and after the processing unit receives the first level, the pulse width modulation signal is stopped from being transmitted to the power switch device, so that when abnormal overcurrent occurs to the first bus, the driving circuit is effectively ensured not to be damaged, and the driving circuit is protected again.
Drawings
In order to more clearly illustrate the technical solution of the embodiments of the present application, the drawings that are needed to be used in the embodiments of the present application will be briefly described, and it is possible for a person skilled in the art to obtain other drawings according to these drawings without inventive effort.
Fig. 1 is a schematic circuit diagram of an overcurrent protection circuit according to an embodiment of the present application;
FIG. 2 is a schematic diagram of another embodiment of an over-current protection circuit according to the present application;
FIG. 3 is a schematic diagram of an embodiment of an over-current protection circuit according to the present application;
FIG. 4 is a schematic diagram of an embodiment of an over-current protection circuit according to the present application;
FIG. 5 is a schematic diagram of an embodiment of an over-current protection circuit according to the present application;
FIG. 6 is a schematic diagram of a first sampling comparison sub-circuit of the over-current protection circuit according to an embodiment of the present application;
FIG. 7 is a schematic diagram of another exemplary circuit of the first sampling comparison sub-circuit of the over-current protection circuit according to the embodiment of the present application;
FIG. 8 is a schematic diagram of a first sampling comparison sub-circuit of the over-current protection circuit according to an embodiment of the present application;
FIG. 9 is a schematic diagram of an embodiment of an over-current protection circuit according to the present application;
fig. 10 is a logic diagram of an implementation of an overcurrent protection circuit according to an embodiment of the present application.
Detailed Description
Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be described in further detail below with reference to the accompanying drawings and the detailed embodiments. It should be understood that the particular embodiments described herein are meant to be illustrative of the application only and not limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the application by showing examples of the application.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
In embodiments of the present application, the term "electrically connected" may refer to two components being directly electrically connected, or may refer to two components being electrically connected via one or more other components.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Accordingly, it is intended that the present application covers the modifications and variations of this application provided they come within the scope of the appended claims (the claims) and their equivalents. The embodiments provided by the embodiments of the present application may be combined with each other without contradiction.
In order to solve the problems in the prior art, the embodiment of the application provides an overcurrent protection circuit. The following describes an overcurrent protection circuit provided by an embodiment of the present application.
Fig. 1 is a schematic circuit diagram of an overcurrent protection circuit according to an embodiment of the application. As shown in fig. 1, the overcurrent protection circuit may include a power supply capacitor C1, an inverter driving sub-circuit 101, a sensing unit 102, a first sampling comparison sub-circuit 103, and a processing unit 104.
The inverter drive subcircuit 101 includes at least one power switching device (not shown) including, but not limited to, power semiconductor devices such as IGBTs. The first end of the inversion driving sub-circuit 101 is electrically connected to the positive plate of the power supply capacitor C1 through the first bus line m1, the second end of the inversion driving sub-circuit 101 is electrically connected to the negative plate of the power supply capacitor C1 through the second bus line m2, and the third end of the inversion driving sub-circuit 101 is electrically connected to the load 105. The inverter drive sub-circuit 101 has an inverter function for converting the current flowing through the inverter drive sub-circuit 101 from a direct current signal to an alternating current signal.
The sensing unit 102 is electrically connected to the first bus bar m 1.
The first sampling comparison sub-circuit 103 is electrically connected to two ends of the sensing unit 102 and a reference voltage end, respectively, and the first sampling comparison sub-circuit 103 is used to collect a first voltage drop across the sensing unit 102 and output a first level in response to the first voltage drop being greater than the reference voltage of the reference voltage end, and in some embodiments, the first level is a low level.
The processing unit 104 is electrically connected to the first sample comparison sub-circuit 103 and the control terminal of the power switching device, respectively, and the processing unit 104 is configured to stop transmitting the pulse width modulated signal to the power switching device in response to the first level. When the processing unit 104 receives the first level, the pulse width modulation signal is stopped from being transmitted to the power switch device, and at the moment, the power switch device is turned off, and the inversion driving sub-circuit is not operated, so that the protection of the driving circuit is realized.
In this way, when the load 105 is shorted to the ground, the power supply capacitor C1 starts to discharge, and the current of the power supply capacitor C1 flows into the ground through the sensing unit 102 and the inverter driving sub-circuit 101, and at this time, the sensing unit 102 collects the current of the first bus m1 and transmits the current to the first sampling comparison sub-circuit 103, and the first sampling comparison sub-circuit 103 collects the first voltage drop across the sensing unit 102. When the first bus is abnormal and overcurrent, the first voltage drop acquired at this time is greater than the reference voltage of the reference voltage end of the first sampling comparison sub-circuit 103, and a first level is output to the processing unit 104. The processing unit 104 can react to the power device according to the received signal, and when the processing unit 104 receives the first level, the pulse width modulation signal is stopped from being transmitted to the power switch device, so that when the first bus is abnormally over-current, the driving circuit is effectively ensured not to be damaged, and the driving circuit is protected again.
Fig. 2 is a schematic diagram of another circuit of the over-current protection circuit according to the embodiment of the present application. As shown in fig. 2, the inverter drive sub-circuit 101 includes at least one drive leg including: an upper bridge inverter drive module 1011 and a lower bridge inverter drive module 1012.
A first end of the upper bridge inverter driving module 1011 is electrically connected with a positive plate of the power supply capacitor C1 through a first bus m1, and a second end of the upper bridge inverter driving module 1011 is electrically connected with the load 105;
A first end of the lower bridge inverter drive module 1012 is electrically connected to a second end of the upper bridge inverter drive module 1011 and the load 105;
the overcurrent protection circuit further includes: a sampling resistor 201 and a second sampling comparison sub-circuit 202.
A sampling resistor 201 electrically connected to the driving branch;
the second sampling comparison sub-circuit 202 is electrically connected to the two ends of the sampling resistor 201, the reference voltage end and the processing unit 104, respectively, and the second sampling comparison sub-circuit 202 is configured to collect a second voltage drop across the sampling resistor 201 and output the first level to the processing unit 104 in response to the second voltage drop being greater than the reference voltage.
Specifically, when the load 105 begins to operate, current flows through the drive legs and through the lower bridge inverter drive module 1012. Since the lower bridge inverter driving module 1012 has an inverter function, the received signal can be converted from a direct current signal to an alternating current signal. The converted ac signal passes through a sampling resistor 201 located on the driving branch, and the sampling resistor 201 samples the ac signal flowing through and then transmits the sampled ac signal to a second sampling comparison sub-circuit 202. The second sampling comparison sub-circuit 202 receives the second voltage drop across the sampling resistor 201, and if the lower bridge inverter driving module 1012 generates abnormal overcurrent, the second voltage drop is larger than the reference voltage of the reference voltage end of the second sampling comparison sub-circuit 202, and the first level is output to the processing unit 104. The processing unit 104 reacts to the power device according to the received signal, when the processing unit 104 receives the first level, the pulse width modulation signal is stopped being transmitted to the power switch device, at the moment, the power switch device is turned off, and the inversion driving sub-circuit stops working, so that the driving circuit is effectively prevented from being damaged when abnormal overcurrent occurs in the lower bridge inversion driving module 1012. This is a heavy protection mechanism for the driving circuit when abnormal overcurrent occurs in the lower bridge inverter driving module 1012.
Fig. 3 is a schematic diagram of another circuit of the overcurrent protection circuit according to the embodiment of the application. As shown in fig. 3, the sampling resistor 201 is electrically connected between the first end of the upper bridge inverter driving module 1011 and the first bus bar m1, and/or the sampling resistor 201 is electrically connected between the second end of the lower bridge inverter driving module 1012 and the second bus bar m 2.
Specifically, the sampling resistor 201 is electrically connected between the first end of the upper bridge inverter driving module 1011 and the first bus m1, which is an alternative to the sampling resistor 201 being electrically connected between the second end of the lower bridge inverter driving module 1012 and the second bus m 2. The working principle of the sampling resistor 201 is identical to that of the second end of the lower bridge inverter driving module 1012 and the second bus m2, and is not described herein.
Fig. 4 is a schematic circuit diagram of an overcurrent protection circuit according to an embodiment of the present application. As shown in fig. 4, the inverter driving sub-circuit 101 includes a first driving branch l1, a second driving branch l2, and a third driving branch l3, where the first driving branch l1 is electrically connected to a first phase of the load 105, the second driving branch l2 is electrically connected to a second phase of the load 105, and the third driving branch l3 is electrically connected to a third phase of the load 105;
The sampling resistor 201 comprises a first sampling resistor R1, a second sampling resistor R2 and a third sampling resistor R3, wherein the first sampling resistor R1 is electrically connected to the first driving branch l1, the second sampling resistor R2 is electrically connected to the second driving branch l2, and the third sampling resistor R3 is electrically connected to the third driving branch l 3;
The second sampling comparison sub-circuit 202 includes a first sub-sampling comparison sub-circuit 2021, a second sub-sampling comparison sub-circuit 2022, and a third sub-sampling comparison sub-circuit 2023, where the first sub-sampling comparison sub-circuit 2021 is electrically connected to two ends of the first sampling resistor R1, the reference voltage terminal, and the processing unit 104, the second sub-sampling comparison sub-circuit 2022 is electrically connected to two ends of the second sampling resistor R2, the reference voltage terminal, and the processing unit 104, and the third sub-sampling comparison sub-circuit 2023 is electrically connected to two ends of the third sampling resistor R3, the reference voltage terminal, and the processing unit 104.
The first sampling resistor R1 is electrically connected between the second end of the lower bridge inverter driving module 1012 of the first driving branch l1 and the second bus, the second sampling resistor R2 is electrically connected between the second end of the lower bridge inverter driving module 1012 of the second driving branch l2 and the second bus l2, and the third sampling resistor R3 is electrically connected between the second end of the lower bridge inverter driving module 1012 of the third driving branch l3 and the second bus l 2;
Or the first sampling resistor R1 is electrically connected between the first end of the upper bridge inverter driving module 1011 of the first driving branch l1 and the first bus l1, the second sampling resistor R2 is electrically connected between the first end of the upper bridge inverter driving module 1011 of the second driving branch l2 and the first bus l1, and the third sampling resistor R3 is electrically connected between the first end of the upper bridge inverter driving module 1011 of the third driving branch l3 and the first bus l 1.
In some embodiments, the power devices in the inverter driving sub-circuit 101 include, but are not limited to, IGBT devices T1 to T6, when the power devices in the inverter driving sub-circuit 101 are IGBT devices T1 to T6, the Processing unit 104 is a digital signal Processing chip (DSP), the control terminals of the IGBT devices T1 to T6 are electrically connected to the DSP, and PWM control is performed by the DSP, and when the current passing through the IGBT devices flows, the DSP stops transmitting PWM signals to the IGBT devices, and performs wave-sealing protection, so as to realize that the driving circuit is not damaged.
Fig. 5 is a schematic circuit diagram of an overcurrent protection circuit according to an embodiment of the present application. As shown in fig. 5, the processing unit 104 includes a current collection interface electrically connected to the sampling resistor 201, and the processing unit 104 is configured to convert the received current from an analog signal to a digital signal and stop transmitting the pwm signal to the power switching device in response to the digital signal being greater than a set value.
In some embodiments, the processing unit 104 includes, but is not limited to, a DSP that includes a number of analog-to-digital converted current acquisition interfaces including a/D modules that can convert received current signals from analog signals to digital signals.
Specifically, when the lower bridge inverter driving module abnormally overflows, the driving circuit has two protection mechanisms, and the protection mechanism of the driving circuit when the first lower bridge inverter driving module abnormally overflows is described above and is not described in detail herein. The protection mechanism of the driving circuit when the second double-lower-bridge inversion driving module abnormally overflows is as follows: when the load 105 starts to operate, a current flows through the first driving branch l1, the second driving branch l2 or the third driving branch l3, and the flowing current passes through the lower bridge inverter driving module 1012. Because the lower bridge inversion driving module 1012 has an inversion function, the received signal can be converted from a direct current signal to an alternating current signal, and the converted alternating current signal passes through the sampling resistor 201 positioned on the driving branch. The sampling resistor 201 samples the alternating current signal flowing therethrough and then passes to the current collection interface of the processing unit 104. The processing unit 104 converts the received current from an analog signal to a digital signal, sets a threshold at a software control end of the driving circuit, and if the processing unit 104 detects that the converted digital signal is greater than the threshold set by the software control end of the driving circuit, it indicates that the lower bridge inverter driving module 1012 has abnormal overcurrent, at this time, the processing unit 104 stops transmitting the pulse width modulation signal to the power switching device, the power switching device is turned off, the inverter driving sub-circuit 101 stops working, and a second protection mechanism of the driving circuit when the lower bridge inverter driving module has abnormal overcurrent is realized.
Fig. 6 is a schematic circuit diagram of a first sampling comparison sub-circuit of the over-current protection circuit according to an embodiment of the present application. As shown in fig. 6, the first sample comparison sub-circuit 103 includes: a set of voltage dividing modules 601 and a comparison module 602.
The first end of the voltage division module group 601 is electrically connected with the reference voltage end VCC, and the second end of the voltage division module group 601 is electrically connected with the grounding end;
A first input of the comparison module 602 is electrically connected to the third terminal of the voltage division module group 601, a first input of the comparison module 602 receives the reference voltage provided by the voltage division module group 601, a second input of the comparison module 602 receives the first voltage drop, an output of the comparison module 602 is electrically connected to the processing unit 104, and the comparison module 602 is configured to output a first level to the processing unit 104 in response to the first voltage drop being greater than the reference voltage of the reference voltage terminal VCC.
Specifically, the comparison module 602 is mainly configured to compare voltages at two input terminals, where a first input terminal is a reference voltage provided by the voltage division module group, a second input terminal is a first voltage drop across the collected sampling resistor, and when the voltage at the second input terminal is greater than the voltage at the first input terminal, the comparator outputs a first level to the processing unit 104.
In some embodiments, the first level is a low level, and the processing unit 104 includes, but is not limited to, a DSP, that is, when the collected first voltage drop is greater than the reference voltage set by the comparator, the comparator outputs the low level to the DSP, and the DSP receives the low level and stops transmitting the PWM signal to the power meter switching device, so as to implement DSP wave-sealing protection.
With continued reference to fig. 6, the first sample comparison sub-circuit 103 further includes a comparison module 603, an amplification module 602, a first voltage division module 604, a second voltage division module 605, a third voltage division module 606, a fourth voltage division module 607, and a first filtering module 608.
The input of the amplifying module 603 receives a first voltage drop, the output of the amplifying module 603 is electrically connected to the second input of the comparing module 602, and the amplifying module 603 is configured to amplify the first voltage drop;
The comparison module 602 is configured to output a first level to the processing unit 104 in response to the amplified first voltage drop being greater than a reference voltage of the reference voltage terminal.
A first end of the first voltage division module 604 is electrically connected with a third end of the voltage division module group 601, and a second end of the first voltage division module 604 is electrically connected with a first input end of the comparison module 602;
a first end of the second voltage dividing module 605 is electrically connected with a first input end of the comparison module 602, and a second end of the second voltage dividing module 605 is electrically connected with an output end of the comparison module 602;
a first end of the third voltage dividing module 606 is electrically connected with the output end of the comparison module 602, and a second end of the third voltage dividing module 606 is electrically connected with the processing unit 104;
The first end of the fourth voltage dividing module 607 is electrically connected to the power supply end VCC, and the second end of the fourth voltage dividing module 607 is electrically connected to the output end of the comparison module 602 and the first end of the third voltage dividing module 606;
a first end of the first filtering module 608 is electrically connected to a second end of the third voltage dividing module 606 and the processing unit 104, and a second end of the first filtering module 608 is electrically connected to a ground terminal.
Specifically, the first voltage dividing module 604, the second voltage dividing module 605, the third voltage dividing module 606, and the fourth voltage dividing module 607 function as a current limiting protection circuit in a circuit, wherein the fourth voltage dividing module 607 also functions as a pull-up circuit, and the first filtering module 608 functions as a filter in the circuit.
Fig. 7 is another circuit schematic of the first sampling comparison sub-circuit of the over-current protection circuit according to the embodiment of the present application. As shown in fig. 7, the voltage dividing module group 601 includes: a fifth voltage dividing module 6011 and a sixth voltage dividing module 6012.
A first end of the fifth voltage dividing module 6011 is electrically connected to the reference voltage end, and a second end of the fifth voltage dividing module 6011 is electrically connected to the first end of the first voltage dividing module 604;
The first end of the sixth voltage division module 6012 is electrically connected to the second end of the fifth voltage division module 6011 and the first end of the first voltage division module 604, and the second end of the sixth voltage division module 6012 is electrically connected to the ground;
Specifically, the fifth voltage dividing module 6011 and the sixth voltage dividing module 6012 function to adjust the threshold voltage, and the threshold voltage is changed by changing the magnitude of the resistance ratio of the fifth voltage dividing module 6011 to the sixth voltage dividing module 6012.
In some embodiments, optionally, the reference voltage VCC of the voltage division module group is 3.3V, the fifth voltage division module 6011 and the sixth voltage division module 6012 are two resistors with equal resistance values, and the reference voltage is divided, and the threshold voltage provided to the first input of the comparison module 602 is half of 3.3V, i.e. 1.65V.
With continued reference to fig. 7, the first sample comparison subcircuit further includes: a seventh voltage division module 701, an eighth voltage division module 702, a ninth voltage division module 703, a tenth voltage division module 704, an eleventh voltage division module 705, and a second filtering module 706.
The first end of the seventh voltage division module 701 is configured to receive the current signal of the first bus m1, and the second end of the seventh voltage division module 701 is electrically connected to the first input end of the amplifying module;
The first end of the eighth voltage division module 702 is configured to receive the current signal of the first bus m1, and the second end of the eighth voltage division module 702 is electrically connected to the second input end of the amplifying module;
A first end of the ninth voltage division module 703 is electrically connected to the power supply end VCC, and a second end of the ninth voltage division module 703 is electrically connected to the second end of the seventh voltage division module 701 and the first input end of the amplifying module 603;
The first end of the tenth voltage division module 704 is electrically connected with the second input end of the amplifying module 603 and the second end of the eighth voltage division module 702, and the second end of the tenth voltage division module 704 is electrically connected with the output end of the amplifying module 603;
A first end of the eleventh voltage division module 705 is electrically connected to the output end of the amplifying module 603, and a second end of the eleventh voltage division module 705 is electrically connected to the second input end of the comparing module 602;
The first end of the second filtering module 706 is electrically connected to the second end of the eleventh voltage dividing module 705 and the second input end of the comparing module 602, and the second end of the second filtering module 706 is electrically connected to the ground.
Specifically, the seventh voltage division module 701, the eighth voltage division module 702, the ninth voltage division module 703, the tenth voltage division module 704, the eleventh voltage division module 705, and the amplifying module 603 collectively function to amplify the first voltage drop, and the second filtering module 706 functions as filtering in the circuit.
In some embodiments, optionally, the seventh voltage division module 701, the eighth voltage division module 702, the ninth voltage division module 703, the tenth voltage division module 704, and the eleventh voltage division module 705 may be resistors, and the amplification factor of the amplifying module 603 is the resistance value of the tenth voltage division module 704 divided by the resistance value of the eighth voltage division module 702.
Fig. 8 is a schematic circuit diagram of a first sampling comparison sub-circuit of the over-current protection circuit according to an embodiment of the present application. As shown in fig. 8, according to some embodiments of the present application, optionally, the comparing module 602 may include a comparator U1, the first voltage dividing module 604 may include a first voltage dividing resistor R4, the second voltage dividing module 605 may include a second voltage dividing resistor R5, the third voltage dividing module 606 may include a third voltage dividing resistor R6, the fourth voltage dividing module may include a fourth voltage dividing resistor R7, the fifth voltage dividing module 6011 may include a fifth voltage dividing resistor R8, the sixth voltage dividing module 6012 may include a sixth voltage dividing resistor R9, the seventh voltage dividing module 701 may include a seventh voltage dividing resistor R10, the eighth voltage dividing module 702 may include an eighth voltage dividing resistor R11, the ninth voltage dividing module 703 may include a ninth voltage dividing resistor R12, the tenth voltage dividing module 704 may include a tenth voltage dividing resistor R13, the eleventh voltage dividing module 705 may include an eleventh voltage dividing resistor R14, the first filtering module 608 may include a first filtering capacitor C2, the second filtering module 706 may include a second filtering capacitor C3, the amplifying module 603 may include an amplifying unit U2 may include the amplifying unit 104.
The first end of the voltage division module group 601 is electrically connected with a reference voltage end, the reference voltage can comprise 3.3V, and the second end of the voltage division module group 601 is electrically connected with a grounding end;
A first input terminal of the comparator U1 is electrically connected to the third terminal of the voltage dividing module group 601, the first input terminal of the comparator U1 receives the reference voltage provided by the voltage dividing module group 601, a second input terminal of the comparator U1 receives the first voltage drop, an output terminal of the comparator U1 is electrically connected to the DSP, and the comparator U1 is configured to output the first level to the DSP in response to the first voltage drop being greater than the reference voltage of the reference voltage terminal.
An amplifier U2, the input of the amplifier U2 receiving the first voltage drop, the output of the amplifier U2 being electrically connected to the second input of the comparator U1, the amplifier U2 being configured to amplify the first voltage drop;
the comparator U1 is configured to output a first level to the DSP in response to the amplified first voltage drop being greater than a reference voltage at the reference voltage terminal.
A first end of the first voltage dividing resistor R4 is electrically connected with a third end of the voltage dividing module group 601, and a second end of the first voltage dividing resistor R4 is electrically connected with a first input end of the comparator U1;
The first end of the second voltage dividing resistor R5 is electrically connected with the first input end of the comparator U1, and the second end of the second voltage dividing resistor R5 is electrically connected with the output end of the comparator U1;
The first end of the third voltage dividing resistor R6 is electrically connected with the output end of the comparator U1, and the second end of the third voltage dividing resistor R6 is electrically connected with the DSP;
The first end of the fourth voltage dividing resistor R7 is electrically connected with the power supply end, the power supply end voltage can comprise 3.3V, and the second end of the fourth voltage dividing resistor R7 is electrically connected with the output end of the comparator U1 and the first end of the third voltage dividing resistor R6;
The first end of the first filter capacitor C2 is electrically connected with the second end of the third voltage dividing resistor R6 and the DSP, and the second end of the first filter capacitor C2 is electrically connected with the grounding end.
The voltage dividing module group 601 includes: a fifth voltage dividing resistor R8 and a sixth voltage dividing resistor R9.
The first end of the fifth voltage dividing resistor R8 is electrically connected with the 3.3V reference voltage end, and the second end of the fifth voltage dividing resistor R8 is electrically connected with the first end of the first voltage dividing resistor R4;
The first end of the sixth voltage dividing resistor R9 is electrically connected with the second end of the fifth voltage dividing resistor R8 and the first end of the first voltage dividing resistor R4, and the second end of the sixth voltage dividing resistor R9 is electrically connected with the grounding end;
The first sample comparison subcircuit further includes: a seventh voltage dividing resistor R10, an eighth voltage dividing resistor R11, a ninth voltage dividing resistor R12, a tenth voltage dividing resistor R13, an eleventh voltage dividing resistor R14, and a second filter capacitor C3.
The first end of the seventh voltage dividing resistor R10 is used for receiving the current signal of the first bus m1, and the second end of the seventh voltage dividing resistor R10 is electrically connected with the first input end of the amplifier U2;
The first end of the eighth voltage dividing resistor R11 is used for receiving the current signal of the first bus m1, and the second end of the eighth voltage dividing resistor R11 is electrically connected with the second input end of the amplifier U2;
The first end of the ninth voltage dividing resistor R12 is electrically connected with the power supply end, and the second end of the ninth voltage dividing resistor R12 is electrically connected with the second end of the seventh voltage dividing resistor R10 and the first input end of the amplifier U2;
The first end of the tenth resistor R13 is electrically connected with the second input end of the amplifier U2 and the second end of the eighth resistor R11, and the second end of the tenth resistor R13 is electrically connected with the output end of the amplifier U2;
The first end of the eleventh voltage dividing resistor R14 is electrically connected with the output end of the amplifier U2, and the second end of the eleventh voltage dividing resistor R14 is electrically connected with the second input end of the comparator U1;
The first end of the second filter capacitor C3 is electrically connected to the second end of the eleventh voltage dividing resistor R14 and the second input end of the comparator U1, and the second end of the second filter capacitor C3 is electrically connected to the ground.
According to some embodiments of the present application, on the one hand, a circuit formed by the seventh voltage dividing resistor R10, the eighth voltage dividing resistor R11, the ninth voltage dividing resistor R12, the tenth voltage dividing resistor R13, the amplifier U2, the eleventh voltage dividing resistor R14 and the second filter capacitor C3 is configured to amplify the received voltage drop, and may amplify the received voltage drop by a factor of R13/R11, and then transmit the amplified voltage drop to the negative input terminal of the comparator U1; on the other hand, the positive input terminal of the comparator U1 may provide a threshold voltage, which is adjusted by adjusting the resistance values of the fifth and sixth voltage dividing resistors R8 and R9. When the reference voltage terminal is 3.3V, the resistance values of the fifth voltage dividing resistor R8 and the sixth voltage dividing resistor R9 are equal, and the threshold voltage is 1.65V by using the voltage dividing action of the fifth voltage dividing resistor R8 and the sixth voltage dividing resistor R9. When the positive input end provides a threshold voltage of 1.65V, if the amplified first voltage drop received by the negative input end is larger than the set threshold voltage, abnormal overcurrent occurs at the acquired end, the output end of the comparator U1 outputs low level to the DSP, the DSP stops transmitting PWM waves to the power switch device, the power switch device is turned off, and the inversion driving sub-circuit stops working, so that protection of the driving circuit is realized.
Fig. 9 is a schematic circuit diagram of an overcurrent protection circuit according to an embodiment of the present application. As shown in fig. 9, in some specific embodiments, the upper bridge inverter driving module 1011 may include a first IGBT device T1, a second IGBT device T2, and a third IGBT device T3, the lower bridge inverter driving module 1012 may include a fourth IGBT device T4, a fifth IGBT device T5, and a sixth IGBT device T6, the load 105 may include a compressor M, a first phase, a second phase, and a third phase of the load 105, which are a U-phase, a V-phase, and a W-phase of the compressor, respectively, and the sensing unit 102 may include a bus current sensor U3, and the sampling resistor 201 may include a first sampling resistor R1, a second sampling resistor R2, and a third sampling resistor R3.
The first end of the bus current sensor U3 is electrically connected with the positive plate of the bus capacitor C1, the second end of the bus current sensor U3 is electrically connected with the first end of the first IGBT device T1, the first end of the second IGBT device T2 and the first end of the third IGBT device T3, and the two ends of the bus current sensor U3 are electrically connected with the first sampling comparison sub-circuit;
The second end of the first IGBT device T1 is electrically connected with the first ends of the first phase and the fourth IGBT device T4 of the compressor, the second end of the second IGBT device T2 is electrically connected with the first ends of the V phase and the fifth IGBT device T5 of the compressor, and the second end of the third IGBT device T3 is electrically connected with the first ends of the W phase and the sixth IGBT device T6 of the compressor;
The second end of the fourth IGBT device T4 is electrically connected with the first end of the first sampling resistor R1, the second end of the fifth IGBT device T5 is electrically connected with the first end of the second sampling resistor R2, and the second end of the sixth IGBT device T6 is electrically connected with the first end of the third sampling resistor R3;
The second ends of the first sampling resistor R1, the second sampling resistor R2 and the third sampling resistor R3 are electrically connected with the negative plate of the bus capacitor C1, and the two ends of the first sampling resistor R1, the second sampling resistor R2 and the third sampling resistor R3 are electrically connected with the second sampling comparison sub-circuit;
Thus, the abnormal overcurrent of the lower bridge inverter driving module can be detected and protected, and the abnormal overcurrent of the bus can be detected and protected.
Fig. 10 is a logic diagram for implementing an overcurrent protection circuit according to an embodiment of the present application, as shown in fig. 10, when a bus current sampling value exceeds a threshold voltage in a first sampling comparison sub-circuit, a current sampled by a lower bridge exceeds a threshold voltage in a second sampling comparison sub-circuit, or an a/D detected current in a DSP exceeds a software set value, a DSP seal is triggered, thereby implementing triple protection for a compressor driving circuit.
It should be understood that the specific structures of the circuits provided in the drawings of the embodiments of the present application are only examples and are not intended to limit the present application. In addition, the above embodiments provided by the present application may be combined with each other without contradiction.
It should be understood that, in the present specification, each embodiment is described in an incremental manner, and the same or similar parts between the embodiments are all referred to each other, and each embodiment is mainly described in a different point from other embodiments. These embodiments are not exhaustive of all details, nor are they intended to limit the application to the precise embodiments disclosed, in accordance with the application. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the application and the practical application, to thereby enable others skilled in the art to best utilize the application and various modifications as are suited to the particular use contemplated. The application is limited only by the claims and the full scope and equivalents thereof.
Those skilled in the art will appreciate that the above-described embodiments are exemplary and not limiting. The different technical features presented in the different embodiments may be combined to advantage. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in view of the drawings, the description, and the claims. In the claims, the term "comprising" does not exclude other structures; the amounts refer to "a" and do not exclude a plurality; the terms "first," "second," and the like, are used for designating a name and not for indicating any particular order. Any reference signs in the claims shall not be construed as limiting the scope. The presence of certain features in different dependent claims does not imply that these features cannot be combined to advantage.

Claims (10)

1. An overcurrent protection circuit, comprising:
A power supply capacitor;
The inverter driving sub-circuit comprises at least one power switch device, a first end of the inverter driving sub-circuit is electrically connected with a positive plate of the power supply capacitor through a first bus, a second end of the inverter driving sub-circuit is electrically connected with a negative plate of the power supply capacitor through a second bus, and a third end of the inverter driving sub-circuit is electrically connected with a load;
The sensing unit is electrically connected with the first bus;
The first sampling comparison sub-circuit is electrically connected with two ends of the sensing unit and a reference voltage end respectively, and is configured to collect a first voltage drop at the two ends of the sensing unit and output a first level in response to the first voltage drop being greater than the reference voltage of the reference voltage end;
And the processing unit is electrically connected with the first sampling comparison subcircuit and the control end of the power switch device respectively, and is configured to respond to the first level and stop transmitting pulse width modulation signals to the power switch device.
2. The overcurrent protection circuit of claim 1, wherein the inverter drive sub-circuit includes at least one drive leg, the drive leg comprising:
The upper bridge inversion driving module is electrically connected with the positive plate of the power supply capacitor through a first bus, and the second end of the upper bridge inversion driving module is electrically connected with a load;
The lower bridge inversion driving module is electrically connected with the second end of the upper bridge inversion driving module and the load at the first end;
the overcurrent protection circuit further includes:
the sampling resistor is electrically connected to the driving branch circuit;
And the second sampling comparison sub-circuit is respectively and electrically connected with two ends of the sampling resistor, the reference voltage end and the processing unit, and is configured to collect a second voltage drop of the two ends of the sampling resistor and output the first level to the processing unit in response to the second voltage drop being larger than the reference voltage.
3. The overcurrent protection circuit of claim 2, wherein the sampling resistor is electrically connected between the first end of the upper bridge inverter drive module and the first bus bar and/or the sampling resistor is electrically connected between the second end of the lower bridge inverter drive module and the second bus bar.
4. The overcurrent protection circuit of claim 2, wherein the inverter drive sub-circuit includes a first drive leg electrically connected to a first phase of the load, a second drive leg electrically connected to a second phase of the load, and a third drive leg electrically connected to a third phase of the load;
The sampling resistor comprises a first sampling resistor, a second sampling resistor and a third sampling resistor, wherein the first sampling resistor is electrically connected to the first driving branch, the second sampling resistor is electrically connected to the second driving branch, and the third sampling resistor is electrically connected to the third driving branch;
The second sampling comparison sub-circuit comprises a first sub-sampling comparison sub-circuit, a second sub-sampling comparison sub-circuit and a third sub-sampling comparison sub-circuit, wherein the first sub-sampling comparison sub-circuit is respectively and electrically connected with two ends of the first sampling resistor, the reference voltage end and the processing unit, the second sub-sampling comparison sub-circuit is respectively and electrically connected with two ends of the second sampling resistor, the reference voltage end and the processing unit, and the third sub-sampling comparison sub-circuit is respectively and electrically connected with two ends of the third sampling resistor, the reference voltage end and the processing unit.
5. The overcurrent protection circuit of claim 4, wherein the first sampling resistor is electrically connected between the second end of the lower bridge inverter drive module of the first drive leg and the second bus bar, the second sampling resistor is electrically connected between the second end of the lower bridge inverter drive module of the second drive leg and the second bus bar, and the third sampling resistor is electrically connected between the second end of the lower bridge inverter drive module of the third drive leg and the second bus bar;
Or the first sampling resistor is electrically connected between the first end of the upper bridge inverter driving module of the first driving branch and the first bus, the second sampling resistor is electrically connected between the first end of the upper bridge inverter driving module of the second driving branch and the first bus, and the third sampling resistor is electrically connected between the first end of the upper bridge inverter driving module of the third driving branch and the first bus.
6. The overcurrent protection circuit of claim 3, wherein the processing unit includes a current collection interface electrically connected to the sampling resistor, the processing unit configured to convert the received current from an analog signal to a digital signal and to cease transmitting a pulse width modulated signal to the power switching device in response to the digital signal being greater than a set point.
7. The overcurrent protection circuit of claim 1, wherein the first sample comparison sub-circuit comprises:
The first end of the voltage division module group is electrically connected with the reference voltage end, and the second end of the voltage division module group is electrically connected with the grounding end;
The first input end of the comparison module is electrically connected with the third end of the voltage division module group, the first input end of the comparison module receives the reference voltage provided by the voltage division module group, the second input end of the comparison module receives the first voltage drop, the output end of the comparison module is electrically connected with the processing unit, and the comparison module is configured to output the first level to the processing unit in response to the first voltage drop being larger than the reference voltage of the reference voltage end.
8. The overcurrent protection circuit of claim 7, wherein the first sample comparison sub-circuit further comprises:
An amplification module, an input of the amplification module receiving the first voltage drop, an output of the amplification module being electrically connected to a second input of the comparison module, the amplification module being configured to amplify the first voltage drop;
The comparison module is configured to output the first level to the processing unit in response to the amplified first voltage drop being greater than a reference voltage of the reference voltage terminal.
9. The overcurrent protection circuit of claim 8, wherein the first sample comparison sub-circuit further comprises:
The first end of the first voltage division module is electrically connected with the third end of the voltage division module group, and the second end of the first voltage division module is electrically connected with the first input end of the comparison module;
The first end of the second voltage division module is electrically connected with the first input end of the comparison module, and the second end of the second voltage division module is electrically connected with the output end of the comparison module;
The first end of the third voltage division module is electrically connected with the output end of the comparison module, and the second end of the third voltage division module is electrically connected with the processing unit;
The first end of the fourth voltage dividing module is electrically connected with the power supply end, and the second end of the fourth voltage dividing module is electrically connected with the output end of the comparison module and the first end of the third voltage dividing module;
The first end of the first filtering module is electrically connected with the second end of the third voltage dividing module and the processing unit, and the second end of the first filtering module is electrically connected with the grounding end.
10. The overcurrent protection circuit of claim 9, wherein the voltage divider module set comprises:
The first end of the fifth voltage division module is electrically connected with the reference voltage end, and the second end of the fifth voltage division module is electrically connected with the first end of the first voltage division module;
The first end of the sixth voltage division module is electrically connected with the second end of the fifth voltage division module and the first end of the first voltage division module, and the second end of the sixth voltage division module is electrically connected with the grounding end;
The first sample comparison sub-circuit further includes:
A seventh voltage dividing module, wherein a first end of the seventh voltage dividing module is configured to receive a current signal of the first bus, and a second end of the seventh voltage dividing module is electrically connected with a first input end of the amplifying module;
An eighth voltage dividing module, a first end of which is configured to receive a current signal of the first bus, and a second end of which is electrically connected with a second input end of the amplifying module;
A ninth voltage dividing module, wherein a first end of the ninth voltage dividing module is electrically connected with the power supply end, and a second end of the ninth voltage dividing module is electrically connected with a second end of the seventh voltage dividing module and a first input end of the amplifying module;
A tenth voltage division module, wherein a first end of the tenth voltage division module is electrically connected with a second input end of the amplifying module and a second end of the eighth voltage division module, and a second end of the tenth voltage division module is electrically connected with an output end of the amplifying module;
An eleventh voltage dividing module, wherein a first end of the eleventh voltage dividing module is electrically connected with the output end of the amplifying module, and a second end of the eleventh voltage dividing module is electrically connected with the second input end of the comparing module;
The first end of the second filtering module is electrically connected with the second end of the eleventh voltage dividing module and the second input end of the comparison module, and the second end of the second filtering module is electrically connected with the grounding end.
CN202322347329.2U 2023-08-30 2023-08-30 Overcurrent protection circuit Active CN220874215U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322347329.2U CN220874215U (en) 2023-08-30 2023-08-30 Overcurrent protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322347329.2U CN220874215U (en) 2023-08-30 2023-08-30 Overcurrent protection circuit

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CN220874215U true CN220874215U (en) 2024-04-30

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