CN220796269U

CN220796269U - Screen backlight circuit for ceiling screen

Info

Publication number: CN220796269U
Application number: CN202322613099.XU
Authority: CN
Inventors: 朱拥; 许忠华; 吴友鑫; 王翀
Original assignee: Chongqing Delco Electronic Instrument Co ltd
Current assignee: Chongqing Delco Electronic Instrument Co ltd
Priority date: 2023-09-26
Filing date: 2023-09-26
Publication date: 2024-04-16
Anticipated expiration: 2033-09-26

Abstract

The utility model provides a screen backlight circuit for a ceiling screen, which comprises a power supply module, a controller module, a screen backlight module and an LED lamp group, wherein the controller module is connected with the power supply module; the power supply module is respectively connected with the controller module and the screen backlight module and provides a power supply suitable for the controller module and the screen backlight module; the controller module is connected with the screen backlight module, and the screen backlight module is connected with the LED lamp group. The utility model can realize the brightness adjustment of the LED lamp group.

Description

Screen backlight circuit for ceiling screen

Technical Field

The utility model relates to the technical field of screen backlight, in particular to a screen backlight circuit for a ceiling screen.

Background

Along with the development of vehicle-mounted electronics, the display screen of the vehicle-mounted system is larger and larger in size, the driving requirement on the backlight of the display screen is higher and higher, and the driving current requirement on the backlight of the display screen is related according to the number and arrangement of LEDs of the backlight so as to meet the requirements of different display sizes and different brightness.

Disclosure of Invention

The utility model aims at least solving the technical problems in the prior art, and particularly creatively provides a screen backlight circuit for a ceiling screen.

In order to achieve the above object of the present utility model, the present utility model provides a screen backlight circuit for a ceiling screen, including a power module, a controller module, a screen backlight module, and an LED lamp group;

the power supply module is respectively connected with the controller module and the screen backlight module and provides a power supply suitable for the controller module and the screen backlight module;

the controller module is connected with the screen backlight module, and the screen backlight module is connected with the LED lamp group.

In a preferred embodiment of the present utility model, the power supply module includes a first voltage conversion module and a second voltage conversion module;

the power input end of the first voltage conversion module is connected with the power output end of the interface J3, and the power output end of the first voltage conversion module is respectively connected with the power input end of the second voltage conversion module;

the power output by the power output end of the first voltage conversion module supplies power for the screen backlight module, and the power output by the power output end of the second voltage conversion module supplies power for the controller module.

In a preferred embodiment of the present utility model, the first voltage conversion module includes: the power output end of the interface J3 is connected with the first end of the capacitor C64, the second end of the capacitor C64 is connected with the first end of the capacitor C65, the second end of the capacitor C65 is connected with the power ground, the power output end of the interface J3 is connected with the drain electrode of the field effect tube Q17, the grid electrode of the field effect tube Q17 is respectively connected with the first end of the resistor R99, the first end of the resistor R100, the anode of the diode D8 and the first end of the capacitor C91, the second end of the resistor R99 is connected with the power ground, the source electrode of the field effect tube Q17 is respectively connected with the second end of the resistor R100, the cathode of the diode D8 and the second end of the capacitor C91, the source electrode of the field effect tube Q17 is also connected with the first end of the capacitor C117, the second end of the capacitor C117 is connected with the power ground, the source electrode of the field effect tube Q17 is connected with the first end of the inductor L3, the second end of the inductor L3 is connected with the first end of the capacitor C70 and the first end of the capacitor C62, the second end of the capacitor C70 is connected with the second end of the inductor C62 is connected with the power ground, and the second end of the VBL 3 is connected with the second end of the power source +ATT. The power supply BATTERY outputs voltage through a body diode of the field effect tube Q17, the field effect tube Q17 can not only prevent reverse connection and protect the safety of a subsequent circuit, but also basically has no voltage drop, so that the input voltage is equal to the output voltage, the output voltage is divided by a resistor R99 and a resistor R100 to provide a conduction level for the grid electrode of the field effect tube Q17, the field effect tube Q17 is conducted, at the moment, the source electrode of the field effect tube Q17 outputs continuous voltage, and the continuous voltage is filtered through a pi-type filter circuit formed by a capacitor C117, a capacitor C70 and an inductor L3 to output a power supply +VBATT; the power supply +VBATT provides power for the screen backlight module, provides power for the three-phase pre-driving module and provides power for the motor driving module.

In a preferred embodiment of the present utility model, the second voltage conversion module includes: the positive pole of diode D13 links to each other with power BATTERY, the negative pole of diode D13 links to each other with the first end of electric capacity C113, the first end of electric capacity C114, the second end of electric capacity C113 links to each other with power ground, the negative pole of diode D13 links to each other with the power end VIN of linear regulator U5, the power output end VOUT of linear regulator U5 links to each other with the first end of electric capacity C115, the second end of electric capacity C115 links to each other with power ground, the power output end VOUT of linear regulator U5 outputs power +3.3V_MCU, the power end VIN of linear regulator U5 links to each other with the first end of resistance R33, the second end of resistance R33 links to each other with the enabling end EN of linear regulator U5, the power ground end GND of linear regulator U5 links to each other with power ground. After passing through a diode D13, the power supply BATTERY is filtered by a capacitor C113 and a capacitor C114 to obtain a stable power supply +VBAT2 output, wherein the diode D13 can play a role in preventing reverse connection, and the safety of a subsequent circuit is protected; the input power supply +VBAT2 is converted into a stable power supply +3.3V_MCU by using a linear voltage stabilizer U5, and the power supply is provided for the controller module.

In a preferred embodiment of the present utility model, the method further comprises a wake-up module, wherein the wake-up module comprises: the first end of the resistor R58 is connected with the power +3.3V_MCU, the second end of the resistor R58 is connected with the collector of the triode Q1, the collector of the triode Q1 is connected with the first end of the resistor R132, the second end of the resistor R132 is connected with the wake-up end PTD5 of the controller U6, the emitter of the triode Q1 is connected with the power ground, the base of the triode Q1 is connected with the first end of the capacitor C61 and the first end of the resistor R56, the second end of the capacitor C61 and the second end of the resistor R56 are connected with the power ground, the base of the triode Q1 is connected with the first end of the resistor R73, the second end of the resistor R73 is connected with the negative electrode of the diode D3, the positive electrode of the diode D3 is connected with the wake-up end of the interface J3, the positive electrode of the diode D3 is connected with the first end of the capacitor C66, the second end of the capacitor C66 is connected with the power ground, the second end of the resistor R73 is connected with the first end of the resistor R59, the second end of the resistor R59 is connected with the first end of the resistor R60 and the second end of the resistor R59 is connected with the power ground, and the second end of the resistor R59 is connected with the second end of the resistor C59 is connected with the power ground. The wake-up terminal through the interface J3 outputs a wake-up signal (the wake-up signal may be an ignition signal or other wake-up signals, for example, a wake-up signal sent by a vehicle control unit), and when the wake-up signal is an ignition signal, the resistor R73 and the resistor R56 divide the voltage to provide a conducting level for the triode Q1, the triode Q1 is conducted at this time, the level of the wake-up terminal PTD5 input into the controller U6 is a low level, and the controller U6 is woken up at this time; when the base of the transistor Q1 is at the off level, the transistor Q1 is in the off state, and the level of the wake-up terminal PTD5 of the input controller U6 is at the high level. In addition, after the wake-up end of the interface J3 outputs the wake-up signal, the wake-up signal can play a role in preventing reverse connection through the diode D3, and then the resistor R59 and the resistor R60 are utilized to realize voltage division, and the wake-up signal monitoring end PTC1 of the controller U6 is used for collecting whether the ignition signal is abnormal or not.

In a preferred embodiment of the present utility model, further comprising a voltage sampling module, the voltage sampling module comprising: the emitter of the triode Q2 is connected with a power supply BATTERY, the collector of the triode Q2 is connected with a first end of a resistor R67, a second end of the resistor R67 is connected with a first end of a resistor R68 and a first end of a capacitor C67, the second end of the resistor R68 and the second end of the capacitor C67 are both connected with power supply ground, the second end of the resistor R68 is connected with a voltage sampling end PTC0 of a controller U6, the first end of the resistor R71 is connected with the power supply BATTERY, the second end of the resistor R71 is connected with a base of the triode Q2, the second end of the resistor R71 is connected with a first end of a resistor R66, the second end of the resistor R66 is connected with a collector of the triode Q3, the emitter of the triode Q3 is connected with power supply ground, the base of the triode Q3 is connected with a first end of the resistor R70, the second end of the resistor R70 is connected with power supply ground, the base of the triode Q3 is connected with the first end of the resistor R69, and the second end of the resistor R69 is connected with a voltage sampling control end PTC16 of the controller U6.

The emitter of the triode Q16 is connected with a power supply +VBATT, the collector of the triode Q16 is connected with a first end of a resistor R217, a second end of the resistor R217 is connected with a first end of a resistor R216 and a first end of a capacitor C141, a second end of the resistor R216 and a second end of the capacitor C141 are both connected with power supply ground, a second end of the resistor R217 is connected with a voltage sampling end PTB3 of a controller U6, a first end of the resistor R218 is connected with the power supply +VBATT, a second end of the resistor R218 is connected with a base of the triode Q16, a second end of the resistor R218 is connected with a first end of a resistor R215, and a second end of the resistor R215 is connected with a second end of a resistor R66. When the voltage sampling control end PTC16 of the controller U6 inputs the cut-off level to the base electrode of the triode Q3, the triode Q3 is in a cut-off state, the potential of the base electrode of the triode Q2 is equal to the potential of the emitter electrode of the triode Q2, the collector electrode of the triode Q2 has no voltage output, and similarly, the potential of the base electrode of the triode Q16 is equal to the potential of the emitter electrode of the triode Q16, and the collector electrode of the triode Q16 has no voltage output; when voltage sampling is required to be carried out on the power supply BATTERY and the power supply +VBATT, the voltage sampling control end PTC16 of the controller U6 inputs a conduction level to the base electrode of the triode Q3, the triode Q3 is in a conduction state, the voltage of the triode Q2 is pulled down at the moment, the collector electrode of the triode Q2 outputs voltage, the voltage safety of the voltage sampling end PTC0 of the input controller U6 is ensured through a voltage dividing circuit formed by the resistor R67 and the resistor R68, and the voltage acquisition of the power supply BATTERY is realized; meanwhile, the voltage of the triode Q16 is pulled down, the collector electrode of the triode Q16 outputs voltage, the voltage safety of a voltage sampling end PTB3 of the input controller U6 is ensured through a voltage dividing circuit formed by a resistor R217 and a resistor R216, and the voltage acquisition of the power supply +VBATT is realized.

In a preferred embodiment of the present utility model, the controller further comprises a CAN communication module, wherein the CAN communication module comprises: the level end NC of the communication chip U3 is connected with a power supply +3.3V_MCU, the first end of the capacitor C142 is connected with the power supply +3.3V_MCU, the second end of the capacitor C142 is connected with a power supply ground, the first end of the capacitor C107 and the first end of the capacitor C108 are connected with a power supply VCC_5V, the second end of the capacitor C107 and the second end of the capacitor C108 are connected with the power supply ground, and the power supply end VCC of the communication chip U3 is connected with the power supply VCC_5V;

the data end CANH of the communication chip U3 is connected with the first end of the resistor R148, the second end of the resistor R148 is connected with the first end of the capacitor C63, the data end CANH of the communication chip U3 is connected with the first end of the resistor R152, the second end of the resistor R152 is connected with the first end of the capacitor C10, the second end of the capacitor C10 is connected with the power ground, the second end of the resistor R152 is connected with the high-level data end of the interface J3, and the second end of the resistor R152 is connected with the first end of the electrostatic protection diode D1;

the data end CANL of the communication chip U3 is connected with the first end of a resistor R149, the second end of the resistor R149 is connected with the first end of a capacitor C63, the second end of the capacitor C63 is connected with power ground, the data end CANL of the communication chip U3 is connected with the first end of a resistor R153, the second end of the resistor R153 is connected with the first end of a capacitor C60, the second end of the capacitor C60 is connected with power ground, the second end of the resistor R153 is connected with the low-level data end of an interface J3, the second end of the resistor R153 is connected with the second end of an electrostatic protection diode D1, and the public end of the electrostatic protection diode D1 is connected with power ground;

The standby mode selection end STB-IN of the communication chip U3 is connected with the control end PTE10 of the controller U6, the data transmission end TXD-IN of the communication chip U3 is connected with the first end of the resistor R154, the second end of the resistor R154 is connected with the data receiving end PTE5 of the controller U6, the data receiving end RXD-OUT of the communication chip U3 is connected with the first end of the resistor R155, and the second end of the resistor R155 is connected with the data transmission end PTE4 of the controller U6. The communication chip U3 is used for realizing the communication between the controller U6 and the vehicle-mounted controller module or other modules.

In a preferred embodiment of the present utility model, a screen backlight module includes: the power end VCC of the backlight chip U7 is connected with the first end of a capacitor C87, the second end of the capacitor C87 is connected with the power ground, the power end VCC of the backlight chip U7 is connected with the first end of a resistor R98, the second end of the resistor R98 is connected with a power supply VBATT, the second end of the resistor R98 is connected with the first end of the capacitor C71, the second end of the capacitor C71 is connected with the power ground, the first end of the capacitor C71 is connected with the first end of the capacitor C81, the first end of the capacitor C82 and the first end of the capacitor C83, the second end of the capacitor C81 is connected with the power ground, the first end of the capacitor C71 is connected with the first end of a resistor L4, the second end of the resistor L4 is connected with the positive electrode of a diode D5, the negative electrode of the diode D5 is connected with the first end of a resistor R86, the second end of the resistor R86 is connected with the voltage protection end OVP of the backlight chip U7, the second end of the resistor R86 is connected with the first end of the resistor R87, the second end of the resistor R87 is connected with the power ground, the cathode of the diode D5 is connected with the first end of the capacitor C85, the first end of the capacitor C84, the first end of the capacitor C86 and the first end of the capacitor C80, the second end of the capacitor C85, the second end of the capacitor C84, the second end of the capacitor C86 and the second end of the capacitor C80 are all connected with the power ground, the cathode of the diode D5 is connected with the first end of the resistor R9, the second end of the resistor R9 outputs a power TFT_BL+, the second end of the inductor L4 is connected with the drain electrode of the field effect transistor Q18, the grid electrode of the field effect transistor Q18 is connected with the first end of the resistor R89, the second end of the resistor R89 is connected with the driving voltage end DRV of the backlight chip U7, the source electrode of the field effect transistor Q18 is connected with the first end of the resistor R88, the second end of the resistor R88 is connected with the current sampling end SEN of the backlight chip U7, the source electrode of the field effect transistor Q18 is connected with the first end of the resistor R97, the second end of the resistor R97 is connected with power ground, the second end of the resistor R97 is connected with the first end of the capacitor C88, and the second end of the capacitor C88 is connected with the current sampling end SEN of the backlight chip U7;

The backlight adjusting end PWM of the backlight chip U7 is connected with the first end of a resistor R90, the second end of the resistor R90 is connected with the first end of a resistor R129, the second end of the resistor R129 is connected with the backlight adjusting end PTB2 of a controller U6, the backlight enabling end EN of the backlight chip U7 is connected with the first end of a resistor R91, the second end of the resistor R91 is connected with the first end of a resistor R130, the second end of the resistor R130 is connected with the backlight enabling end PTC8 of the controller U6, the compensation end VC of the backlight chip U7 is connected with the first end of a resistor R93, the second end of the resistor R93 is connected with the first end of a capacitor C89, and the second end of the capacitor C89 is connected with power ground;

the backlight state end STATUS of the backlight chip U7 is connected with the backlight state end PTA13 of the controller U6, the backlight state end STATUS of the backlight chip U7 is connected with the first end of the resistor R94, the second end of the resistor R94 is connected with the power +3.3VSW, the backlight current setting end RISET of the backlight chip U7 is connected with the first end of the resistor R92, the second end of the resistor R92 is connected with the power ground, the switching frequency setting end RT of the backlight chip U7 is connected with the first end of the resistor R95, the second end of the resistor R95 is connected with the power ground, the internal voltage stabilizing end GREG of the backlight chip U7 is connected with the first end of the capacitor C90, the second end of the capacitor C90 is connected with the power ground, and the grounding end GND of the backlight chip U7 is connected with the power ground;

The first backlight starting end LED1 of the backlight chip U7 is connected with the first end of the resistor R2, the second end of the resistor R2 is connected with the first backlight starting end of the TFT screen interface J2, the first backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C1, and the second end of the capacitor C1 is connected with the power supply TFT_BL+; the second backlight starting end LED2 of the backlight chip U7 is connected with the first end of the resistor R3, the second end of the resistor R3 is connected with the second backlight starting end of the TFT screen interface J2, the second backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C2, and the second end of the capacitor C2 is connected with the power supply TFT_BL+; the third backlight starting end LED3 of the backlight chip U7 is connected with the first end of the resistor R4, the second end of the resistor R4 is connected with the third backlight starting end of the TFT screen interface J2, the third backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C3, and the second end of the capacitor C3 is connected with the power supply TFT_BL+; the fourth backlight starting end LED4 of the backlight chip U7 is connected with the first end of the resistor R5, the second end of the resistor R5 is connected with the fourth backlight starting end of the TFT screen interface J2, the fourth backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C4, the second end of the capacitor C4 is connected with the power supply TFT_BL+, the second end of the capacitor C1, the second end of the capacitor C2, the second end of the capacitor C3 and the second end of the capacitor C4 are connected with the power supply end of the TFT screen interface J2. The LED lamp set is connected with the TFT screen interface J2, and an input power supply VBATT is converted into power for the LED lamp set to provide backlight for the TFT screen.

In summary, by adopting the technical scheme, the brightness of the LED lamp group can be adjusted through the screen backlight module.

Additional aspects and advantages of the utility model will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the utility model.

Drawings

The foregoing and/or additional aspects and advantages of the utility model will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:

fig. 1 is a schematic block diagram of the connection of the present utility model.

Fig. 2 is a schematic block diagram of the power module circuit connection of the present utility model.

Fig. 3 is a schematic circuit connection diagram of a first voltage conversion module according to the present utility model.

Fig. 4 is a schematic circuit connection diagram of a second voltage conversion module according to the present utility model.

FIG. 5 is a schematic diagram of a wake-up module circuit connection according to the present utility model.

Fig. 6 is a schematic diagram of a circuit connection of a voltage sampling module according to the present utility model.

Fig. 7 is a schematic diagram of a circuit connection of a voltage sampling module according to the present utility model.

Fig. 8 is a schematic circuit connection diagram of the CAN communication module of the present utility model.

FIG. 9 is a schematic diagram of a circuit connection of a backlight module of a screen according to the present utility model.

Fig. 10 is a schematic circuit connection diagram of a module of the TFT screen interface J2 according to the present utility model.

FIG. 11 is a schematic diagram of a circuit connection of a portion of a controller module according to the present utility model.

FIG. 12 is a schematic diagram of a circuit connection of a portion of a controller module according to the present utility model.

Fig. 13 is a schematic diagram of a circuit connection of a portion of a controller module according to the present utility model.

Detailed Description

Embodiments of the present utility model are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the utility model.

The utility model provides a screen backlight circuit for a ceiling screen, which is shown in figures 1-13, and comprises a power supply module, a controller module, a screen backlight module and an LED lamp group;

In a preferred embodiment of the present utility model, the power supply module includes a first voltage conversion module and a second voltage conversion module; as shown in fig. 2.

In a preferred embodiment of the present utility model, as shown in fig. 3, the first voltage conversion module includes: the power output end of the interface J3 is connected with the first end of the capacitor C64, the second end of the capacitor C64 is connected with the first end of the capacitor C65, the second end of the capacitor C65 is connected with the power ground, the power output end of the interface J3 is connected with the drain electrode of the field effect tube Q17, the grid electrode of the field effect tube Q17 is respectively connected with the first end of the resistor R99, the first end of the resistor R100, the anode of the diode D8 and the first end of the capacitor C91, the second end of the resistor R99 is connected with the power ground, the source electrode of the field effect tube Q17 is respectively connected with the second end of the resistor R100, the cathode of the diode D8 and the second end of the capacitor C91, the source electrode of the field effect tube Q17 is also connected with the first end of the capacitor C117, the second end of the capacitor C117 is connected with the power ground, the source electrode of the field effect tube Q17 is connected with the first end of the inductor L3, the second end of the inductor L3 is connected with the first end of the capacitor C70 and the first end of the capacitor C62, the second end of the capacitor C70 is connected with the second end of the inductor C62 is connected with the power ground, and the second end of the VBL 3 is connected with the second end of the power source +ATT. The power supply BATTERY outputs voltage through a body diode of the field effect tube Q17, the field effect tube Q17 can not only prevent reverse connection and protect the safety of a subsequent circuit, but also basically has no voltage drop, so that the input voltage is equal to the output voltage, the output voltage is divided by a resistor R99 and a resistor R100 to provide a conduction level for the grid electrode of the field effect tube Q17, the field effect tube Q17 is conducted, at the moment, the source electrode of the field effect tube Q17 outputs continuous voltage, and the continuous voltage is filtered through a pi-type filter circuit formed by a capacitor C117, a capacitor C70 and an inductor L3 to output a power supply +VBATT; the power supply +VBATT provides power for the screen backlight module, provides power for the three-phase pre-driving module and provides power for the motor driving module.

In a preferred embodiment of the present utility model, as shown in fig. 4, the second voltage conversion module includes: the positive pole of diode D13 links to each other with power BATTERY, the negative pole of diode D13 links to each other with the first end of electric capacity C113, the first end of electric capacity C114, the second end of electric capacity C113 links to each other with power ground, the negative pole of diode D13 links to each other with the power end VIN of linear regulator U5, the power output end VOUT of linear regulator U5 links to each other with the first end of electric capacity C115, the second end of electric capacity C115 links to each other with power ground, the power output end VOUT of linear regulator U5 outputs power +3.3V_MCU, the power end VIN of linear regulator U5 links to each other with the first end of resistance R33, the second end of resistance R33 links to each other with the enabling end EN of linear regulator U5, the power ground end GND of linear regulator U5 links to each other with power ground. After passing through a diode D13, the power supply BATTERY is filtered by a capacitor C113 and a capacitor C114 to obtain a stable power supply +VBAT2 output, wherein the diode D13 can play a role in preventing reverse connection, and the safety of a subsequent circuit is protected; the input power supply +VBAT2 is converted into a stable power supply +3.3V_MCU by utilizing a linear voltage stabilizer U5, so as to provide power for the controller module and provide a wake-up signal for the wake-up module.

In a preferred embodiment of the present utility model, the method further comprises a wake-up module, as shown in fig. 5, wherein the wake-up module comprises: the first end of the resistor R58 is connected with the power +3.3V_MCU, the second end of the resistor R58 is connected with the collector of the triode Q1, the collector of the triode Q1 is connected with the first end of the resistor R132, the second end of the resistor R132 is connected with the wake-up end PTD5 of the controller U6, the emitter of the triode Q1 is connected with the power ground, the base of the triode Q1 is connected with the first end of the capacitor C61 and the first end of the resistor R56, the second end of the capacitor C61 and the second end of the resistor R56 are connected with the power ground, the base of the triode Q1 is connected with the first end of the resistor R73, the second end of the resistor R73 is connected with the negative electrode of the diode D3, the positive electrode of the diode D3 is connected with the wake-up end of the interface J3, the positive electrode of the diode D3 is connected with the first end of the capacitor C66, the second end of the capacitor C66 is connected with the power ground, the second end of the resistor R73 is connected with the first end of the resistor R59, the second end of the resistor R59 is connected with the first end of the resistor R60 and the second end of the resistor R59 is connected with the power ground, and the second end of the resistor R59 is connected with the second end of the resistor C59 is connected with the power ground. The wake-up terminal through the interface J3 outputs a wake-up signal (the wake-up signal may be an ignition signal or other wake-up signals, for example, a wake-up signal sent by a vehicle control unit), and when the wake-up signal is an ignition signal, the resistor R73 and the resistor R56 divide the voltage to provide a conducting level for the triode Q1, the triode Q1 is conducted at this time, the level of the wake-up terminal PTD5 input into the controller U6 is a low level, and the controller U6 is woken up at this time; when the base of the transistor Q1 is at the off level, the transistor Q1 is in the off state, and the level of the wake-up terminal PTD5 of the input controller U6 is at the high level. In addition, after the wake-up end of the interface J3 outputs the wake-up signal, the wake-up signal can play a role in preventing reverse connection through the diode D3, and then the resistor R59 and the resistor R60 are utilized to realize voltage division, and the wake-up signal monitoring end PTC1 of the controller U6 is used for collecting whether the ignition signal is abnormal or not.

In a preferred embodiment of the present utility model, further comprising a voltage sampling module, as shown in fig. 6 and 7, the voltage sampling module comprises: the emitter of the triode Q2 is connected with a power supply BATTERY, the collector of the triode Q2 is connected with a first end of a resistor R67, a second end of the resistor R67 is connected with a first end of a resistor R68 and a first end of a capacitor C67, the second end of the resistor R68 and the second end of the capacitor C67 are both connected with power supply ground, the second end of the resistor R68 is connected with a voltage sampling end PTC0 of a controller U6, the first end of the resistor R71 is connected with the power supply BATTERY, the second end of the resistor R71 is connected with a base of the triode Q2, the second end of the resistor R71 is connected with a first end of a resistor R66, the second end of the resistor R66 is connected with a collector of the triode Q3, the emitter of the triode Q3 is connected with power supply ground, the base of the triode Q3 is connected with a first end of the resistor R70, the second end of the resistor R70 is connected with power supply ground, the base of the triode Q3 is connected with the first end of the resistor R69, and the second end of the resistor R69 is connected with a voltage sampling control end PTC16 of the controller U6.

In a preferred embodiment of the present utility model, further comprising a CAN communication module, as shown in fig. 8, the CAN communication module comprises: the level end NC of the communication chip U3 is connected with a power supply +3.3V_MCU, the first end of the capacitor C142 is connected with the power supply +3.3V_MCU, the second end of the capacitor C142 is connected with a power supply ground, the first end of the capacitor C107 and the first end of the capacitor C108 are connected with a power supply VCC_5V, the second end of the capacitor C107 and the second end of the capacitor C108 are connected with the power supply ground, and the power supply end VCC of the communication chip U3 is connected with the power supply VCC_5V;

In a preferred embodiment of the present utility model, as shown in fig. 9 and 10, a screen backlight module includes: the power end VCC of the backlight chip U7 is connected with the first end of a capacitor C87, the second end of the capacitor C87 is connected with the power ground, the power end VCC of the backlight chip U7 is connected with the first end of a resistor R98, the second end of the resistor R98 is connected with a power supply VBATT, the second end of the resistor R98 is connected with the first end of the capacitor C71, the second end of the capacitor C71 is connected with the power ground, the first end of the capacitor C71 is connected with the first end of the capacitor C81, the first end of the capacitor C82 and the first end of the capacitor C83, the second end of the capacitor C81 is connected with the power ground, the first end of the capacitor C71 is connected with the first end of a resistor L4, the second end of the resistor L4 is connected with the positive electrode of a diode D5, the negative electrode of the diode D5 is connected with the first end of a resistor R86, the second end of the resistor R86 is connected with the voltage protection end OVP of the backlight chip U7, the second end of the resistor R86 is connected with the first end of the resistor R87, the second end of the resistor R87 is connected with the power ground, the cathode of the diode D5 is connected with the first end of the capacitor C85, the first end of the capacitor C84, the first end of the capacitor C86 and the first end of the capacitor C80, the second end of the capacitor C85, the second end of the capacitor C84, the second end of the capacitor C86 and the second end of the capacitor C80 are all connected with the power ground, the cathode of the diode D5 is connected with the first end of the resistor R9, the second end of the resistor R9 outputs a power TFT_BL+, the second end of the inductor L4 is connected with the drain electrode of the field effect transistor Q18, the grid electrode of the field effect transistor Q18 is connected with the first end of the resistor R89, the second end of the resistor R89 is connected with the driving voltage end DRV of the backlight chip U7, the source electrode of the field effect transistor Q18 is connected with the first end of the resistor R88, the second end of the resistor R88 is connected with the current sampling end SEN of the backlight chip U7, the source electrode of the field effect transistor Q18 is connected with the first end of the resistor R97, the second end of the resistor R97 is connected with power ground, the second end of the resistor R97 is connected with the first end of the capacitor C88, and the second end of the capacitor C88 is connected with the current sampling end SEN of the backlight chip U7;

In a preferred embodiment of the present utility model, as shown in fig. 11 to 13, the controller module further includes: the power supply end VDD of the controller U6 is connected with the analog power supply end VDDA of the controller U6, the power supply end VDD of the controller U6 is respectively connected with the first end of the capacitor C79, the first end of the capacitor C72 and the first end of the capacitor C78, the second end of the capacitor C79, the second end of the capacitor C72 and the second end of the capacitor C78 are all connected with power supply ground, and the power supply end VDD of the controller U6 is connected with the power supply +3.3V_MCU; the reference voltage end VREFH of the controller U6 is connected with the first end of the capacitor C74, the first end of the capacitor C75 and the first end of the capacitor C76, the second end of the capacitor C74, the second end of the capacitor C75 and the second end of the capacitor C76 are all connected with the power ground, the reference voltage end VREFH of the controller U6 is connected with the first end of the resistor R85, and the second end of the resistor R85 is connected with the power +3.3V_MCU;

the data end PTA4 of the controller U6 is connected with the data end of the interface J5, the data end PTA4 of the controller U6 is connected with the first end of the resistor R113, the second end of the resistor R113 is connected with the power end of the interface J5, the second end of the resistor R113 is connected with the first end of the resistor R111, the first end of the resistor R111 is connected with the power +3.3V_MCU, the resistor R111 is connected with the first end of the capacitor C94, the second end of the capacitor C94 is connected with the power ground, the second end of the resistor R111 is connected with the reset end PTA5 of the controller U6, the second end of the resistor R111 is connected with the first end of the resistor R110, the second end of the resistor R110 is connected with the reset end of the interface J5, the clock end of the interface J5 is connected with the first end of the resistor R112, the second end of the resistor R112 is connected with the power ground, and the power ground end of the interface J5 is connected with the power ground; the test function is realized by connecting the data line with the interface J5.

The crystal oscillator end PTB7 of the controller U6 is connected with the first end of the resistor R114 and the first end of the crystal oscillator Y1, the crystal oscillator end PTB7 of the controller U6 is connected with the first end of the capacitor C95, the second end of the capacitor C95 is connected with the power ground, the second end of the resistor R114 and the second end of the crystal oscillator Y1 are both connected with the crystal oscillator end PTB6 of the controller U6, the second end of the resistor R114 is connected with the first end of the capacitor C96, and the second end of the capacitor C96 is connected with the power ground;

the temperature monitoring end PTB1 of the controller U6 is connected with the first end of the capacitor C55, the second end of the capacitor C55 is connected with the power ground, the temperature monitoring end PTB1 of the controller U6 is connected with the first end of the resistor R19, the second end of the resistor R19 is connected with the temperature monitoring end of the TFT screen interface J2, the temperature monitoring end of the TFT screen interface J2 is connected with the first end of the resistor R18, and the second end of the resistor R18 is connected with the power +3.3V_TFT;

the interrupt end PTA11 of the controller U6 is connected with the first end of the resistor R6, and the second end of the resistor R6 is connected with the interrupt signal end of the TFT screen interface J2;

the clock end PTA0 of the controller U6 is connected with the first end of a resistor R7, and the second end of the resistor R7 is connected with the clock end of the TFT panel interface J2;

the data end PTA1 of the controller U6 is connected with the first end of a resistor R8, and the second end of the resistor R8 is connected with the TFT screen data end of a TFT screen interface J2;

The TFT screen reset end PTE0 of the controller U6 is respectively connected with the first end of the resistor R20 and the first end of the resistor R10, the second end of the resistor R10 is connected with the first end, and the second end of the resistor R20 is connected with the TFT screen reset end of the TFT screen interface J2;

the TFT screen read-write protection end PTE1 of the controller U6 is connected with the first end of the resistor R22, and the second end of the resistor R22 is connected with the read-write protection end of the TFT screen interface J2;

the TFT screen fault state end PTA12 of the controller U6 is connected with the first end of a resistor R16, the second end of the resistor R16 is connected with the fault state end of a TFT screen interface J2, the second end of the resistor R16 is connected with the first end of a resistor R17, and the second end of the resistor R17 is connected with a power supply +3.3V_TFT;

the TFT screen reset end PTC17 of the controller U6 is connected with the first end of the resistor R12, the second end of the resistor R12 is connected with the reset end of the TFT screen interface J2, the second end of the resistor R12 is connected with the first end of the resistor R13, and the second end of the resistor R13 is connected with the power ground;

the A-phase position detection end PTD1 of the controller U6 is connected with the first end of a resistor R103, the second end of the resistor R103 is connected with the position detection first end of an interface J1, the second end of the resistor R103 is connected with the first end of a resistor R146 and the first end of a capacitor C104, the second end of the capacitor C104 is connected with power supply ground, the second end of the resistor R146 is connected with a power supply PWR_SOR, the first end of the resistor R103 is connected with the first end of a resistor R108, and the second end of the resistor R108 is connected with power supply ground; the B-phase position detection end PTD0 of the controller U6 is respectively connected with the first end of a resistor R104 and the first end of a resistor R107, the second end of the resistor R104 is connected with the position detection second end of an interface J1, the second end of the resistor R104 is connected with the first end of a resistor R147 and the first end of a capacitor C105, the second end of the capacitor C105 is connected with the power ground, the second end of the resistor R147 is connected with the power PWR_SOR, and the second end of the resistor R107 is connected with the power ground; the C-phase position detection end PTE11 of the controller U6 is respectively connected with the first end of a resistor R105 and the first end of a resistor R106, the second end of the resistor R105 is connected with the position detection third end of an interface J1, the second end of the resistor R105 is connected with the first end of a resistor R83 and the first end of a capacitor C9, the second end of the capacitor C9 is connected with the power ground, the second end of the resistor R83 is connected with a power PWR_SOR, and the second end of the resistor R106 is connected with the power ground;

The A-phase voltage detection end PTA7 of the controller U6 is connected with a first end of a resistor R173, a second end of the resistor R173 is connected with a driving motor A end of an interface J1, the A-phase voltage detection end PTA7 of the controller U6 is connected with a first end of a resistor R84, a second end of the resistor R84 is connected with power ground, the A-phase voltage detection end PTA7 of the controller U6 is connected with a first end of a capacitor C128, and a second end of the capacitor C128 is connected with power ground;

the B-phase voltage detection end PTA6 of the controller U6 is connected with the first end of a resistor R175, the second end of the resistor R175 is connected with the B-phase end of a driving motor of an interface J1, the B-phase voltage detection end PTA6 of the controller U6 is connected with the first end of a resistor R174, the second end of the resistor R174 is connected with power ground, the B-phase voltage detection end PTA6 of the controller U6 is connected with the first end of a capacitor C127, and the second end of the capacitor C127 is connected with power ground;

the C-phase voltage detection end PTC14 of the controller U6 is connected with the first end of a resistor R177, the second end of the resistor R177 is connected with the C-phase end of a driving motor of an interface J1, the C-phase voltage detection end PTC14 of the controller U6 is connected with the first end of a resistor R176, the second end of the resistor R176 is connected with the power ground, the C-phase voltage detection end PTC14 of the controller U6 is connected with the first end of a capacitor C73, and the second end of the capacitor C73 is connected with the power ground.

In a preferred embodiment of the present utility model, a third voltage conversion module is further included, the third voltage conversion module including: the emitter of the triode Q11 is connected with a power supply +VBATT, the first end of a capacitor C102 is connected with the power supply +VBATT, the first end of a resistor R140 is connected with the power supply +VBATT, the second end of the capacitor C102 and the second end of the resistor R140 are both connected with the base electrode of the triode Q11, the collector electrode of the triode Q11 outputs a power supply PWR_KEY, the base electrode of the triode Q11 is connected with the first end of a resistor R139, the second end of the resistor R139 is connected with the collector electrode of a triode Q10, the emitter of the triode Q10 is connected with power supply ground, the base electrode of the triode Q10 is connected with the first end of a resistor R136, the second end of the resistor R136 is connected with power supply ground, and the base electrode of the triode Q10 is connected with the first end of a resistor R137, and the second end of the resistor R137 is connected with the control end PTC2 of a controller U6. When the control end PTC2 of the controller U6 inputs a cut-off level to the base electrode of the triode Q10, the triode Q10 is in a cut-off state, the potential of the base electrode of the triode Q11 is equal to that of the emitter electrode of the triode Q10, and the collector electrode of the triode Q10 has no power supply output; when the control terminal PTC2 of the controller U6 inputs a conduction level to the base of the transistor Q10, the transistor Q10 is in a conduction state, the base voltage of the transistor Q11 is pulled down, the transistor Q11 is in a conduction state, and the collector of the transistor Q10 outputs the power pwr_key to provide the power pwr_key for the KEY module.

In a preferred embodiment of the present utility model, a fourth voltage conversion module is further included, the fourth voltage conversion module including: the first end of the resistor R115 is connected with the power supply +VBATT, the second end of the resistor R115 is connected with the first end of the capacitor C53, the first end of the capacitor C58 and the first end of the capacitor C54, the second end of the capacitor C53, the second end of the capacitor C58 and the second end of the capacitor C54 are connected with the power supply ground, the second end of the resistor R115 is connected with the power supply end VIN of the DCDC buck converter U2, the bootstrap capacitor end BOOT of the DCDC buck converter U2 is connected with the first end of the resistor R52, the second end of the resistor R52 is connected with the first end of the capacitor C48, the second end of the capacitor C48 is connected with the output end SW of the DCDC buck converter U2, the output end SW of the DCDC buck converter U2 is connected with the first end of the inductor L6, the second end of the inductor L6 is connected with the first end of the capacitor C49, the first end of the capacitor C50, the first end of the capacitor C51 and the first end of the capacitor C52, the second end of the capacitor C49 is connected with the second end of the capacitor C50, the second end of the capacitor C52 is connected with the power supply ground, the second end of the inductor L6 outputs a power +3.3VSW, the second end of the inductor L6 is connected with the first end of the resistor R62, the second end of the resistor R62 is connected with the first end of the resistor R61, the second end of the resistor R61 is connected with the first end of the resistor R63 and the feedback end FB of the DCDC buck converter U2, the second end of the resistor R63 is connected with the power ground, the enabling end EN of the DCDC buck converter U2 is connected with the control end PTD16 of the controller U6, the enabling end EN of the DCDC buck converter U2 is connected with the first end of the resistor R11, the second end of the resistor R11 is connected with the power ground, the clock frequency end RT/CLK of the DCDC buck converter U2 is connected with the first end of the resistor R51, the second end of the resistor R51 is connected with the power ground, the heat dissipation end EPGND of the DCDC buck converter U2 is in contact with the heat dissipation pad of the DCDC buck converter U2, the power ground GND of the DCDC buck converter U2 is connected with the power ground, the SOFT START end SOFT-START of the DCDC buck converter U2 is respectively connected with the first end of the capacitor C56 and the first end of the capacitor C92, the second end of the capacitor C92 is connected with the first end of the resistor R101, and the second end of the resistor R101 and the second end of the capacitor C56 are respectively connected with power ground. When the output power +3.3vsw is needed, the control end PTD16 of the controller U6 inputs a high level to the enable end EN of the DCDC buck converter U2 to enable the DCDC buck converter U2 to operate, converts the input power +vbatt into a stable power +3.3vsw for output through the DCDC buck converter U2, and can also connect a resistor R65 at the second end of the inductor L6, and the resistor R65 outputs the power +3.3v_mcu to provide power for the controller module; in order to prevent the DCDC buck converter U2 from outputting power, the control terminal PTD16 of the controller U6 inputs a low level to the enable terminal EN of the DCDC buck converter U2, so that the DCDC buck converter U2 does not operate, and the DCDC buck converter U2 does not output power.

In a preferred embodiment of the present utility model, further comprising a fifth voltage conversion module, the fifth voltage conversion module comprising: the first end of the capacitor C69 is connected with the power supply +3.3VSW, the second end of the capacitor C69 is connected with the power supply ground, the first end of the resistor R74 is connected with the power supply +3.3VSW, the second end of the resistor R74 is connected with the enabling end EN of the positive voltage regulator U4, the second end of the resistor R74 is connected with the first end of the resistor R72, the second end of the resistor R72 is connected with the power supply ground, the power supply input end VIN of the positive voltage regulator U4 is connected with the power supply +3.3VSW, the output end VOUT of the positive voltage regulator U4 is connected with the first end of the resistor R75, the second end of the resistor R75 is connected with the regulating end ADJ of the positive voltage regulator U4, the second end of the resistor R76 is connected with the power supply ground, the power supply output end VOUT of the positive voltage regulator U4 is connected with the first end of the capacitor C68, the second end of the capacitor C68 is connected with the power supply ground, and the power supply output end VOUT of the positive voltage regulator U4 is +1.8W. The input power +3.3vsw is converted into a stable power +1.8vsw by the positive voltage regulator U4 to be output.

In a preferred embodiment of the present utility model, further comprising a sixth voltage conversion module, the sixth voltage conversion module comprising: the first end of the capacitor C24 is connected with the power supply +3.3VSW, the second end of the capacitor C24 is connected with the power supply ground, the first end of the resistor R26 is connected with the power supply +3.3VSW, the second end of the resistor R26 is connected with the enabling end EN of the positive voltage regulator U10, the second end of the resistor R26 is connected with the first end of the resistor R31, the second end of the resistor R31 is connected with the power supply ground, the power supply input end VIN of the positive voltage regulator U10 is connected with the power supply +3.3VSW, the power supply output end VOUT of the positive voltage regulator U10 is connected with the first end of the resistor R30, the second end of the resistor R30 is connected with the regulating end ADJ of the positive voltage regulator U10, the second end of the resistor R30 is connected with the first end of the resistor R27, the second end of the resistor R27 is connected with the power supply ground, the power supply output end VOUT of the positive voltage regulator U10 is connected with the first end of the capacitor C29, the second end of the capacitor C29 is connected with the power supply ground, and the power supply output end VOUT of the positive voltage regulator U10 outputs the power supply +1.0VSW. The input power +3.3vsw is converted into a stable power +1.0vsw by the positive voltage regulator U10 to be output.

In a preferred embodiment of the present utility model, further comprising a seventh voltage conversion module, the seventh voltage conversion module comprising: the first end of the inductor L8 is connected with the power supply +3.3VSW, the second end of the inductor L8 is connected with the first end of the capacitor C36, the first end of the capacitor C37, the first end of the capacitor C38 and the first end of the capacitor C35, the second end of the capacitor C36, the second end of the capacitor C37, the second end of the capacitor C38 and the second end of the capacitor C35 are connected with the power supply ground, and the second end of the inductor L8 outputs a power supply VDDIO. And filtering the input power supply +3.3VSW through an L-shaped filter circuit formed by a capacitor C38 and an inductor L8 to output a stable power supply VDDIO, and providing power for the deserializer module.

In a preferred embodiment of the present utility model, further comprising an eighth voltage conversion module, the eighth voltage conversion module comprising: the source electrode of the field effect transistor Q5 is connected with a power supply +3.3VSW, the drain electrode of the field effect transistor Q5 is connected with the first end of a resistor R81, the second end of the resistor R81 is connected with power supply ground, the drain electrode of the field effect transistor Q5 outputs a power supply +3.3V_TFT, the first end of a capacitor C45 and the first end of a resistor R80 are connected with the power supply +3.3VSW, the second end of the capacitor C45 and the second end of the resistor R80 are connected with the grid electrode of the field effect transistor Q5, the grid electrode of the field effect transistor Q5 is connected with the first end of a resistor R79, the second end of the resistor R79 is connected with the collector electrode of a triode Q4, the emitter electrode of the triode Q4 is connected with power supply ground, the base electrode of the triode Q4 is connected with the first end of a resistor R78, the second end of the resistor R78 is connected with power supply ground, the base electrode of the triode Q4 is connected with the first end of the resistor R77, and the second end of the resistor R77 is connected with the control end PTC15 of the controller U6. When the control end PTC15 of the controller U6 inputs a cut-off level to the base electrode of the triode Q4, the triode Q4 is in a cut-off state, the grid electrode of the field effect tube Q5 is equal to the source electrode potential of the field effect tube Q5, and the drain electrode of the field effect tube Q5 has no power supply output; when the control terminal PTC15 of the controller U6 inputs the on level to the base of the transistor Q4, the transistor Q4 is in the on state, the gate voltage of the fet Q5 is pulled down, the fet Q5 is in the on state, and the drain of the fet Q5 outputs the power +3.3v_tft, which provides the power +3.3v_tft for the TFT screen interface J2 module.

In a preferred embodiment of the present utility model, further comprising a ninth voltage conversion module, the ninth voltage conversion module comprising: the first end of the inductor L1 is connected with the power supply +1.8VSW, the second end of the inductor L1 is connected with the first end of the capacitor C19, the first end of the capacitor C20, the first end of the capacitor C21, the first end of the capacitor C22, the first end of the capacitor C27 and the first end of the capacitor C28, the second end of the capacitor C19, the second end of the capacitor C20, the second end of the capacitor C21, the second end of the capacitor C22, the second end of the capacitor C27 and the second end of the capacitor C28 are connected with the power supply ground, and the second end of the inductor L1 outputs the power supply VDD18. The input power +1.8VSW is filtered by an L-shaped filter circuit formed by an inductor L1 and a capacitor C61 to output a stable power supply VDD18, and the power supply is provided for the deserializer module.

In a preferred embodiment of the present utility model, further comprising a tenth voltage conversion module, the tenth voltage conversion module comprising: the first end of the inductor L2 is connected with the power supply +1.0VSW, the second end of the inductor L2 is connected with the first end of the capacitor C23, the first end of the capacitor C26, the first end of the capacitor C97 and the first end of the capacitor C25, the second end of the capacitor C23, the second end of the capacitor C26, the second end of the capacitor C97 and the second end of the capacitor C25 are connected with the power supply ground, and the second end of the inductor L2 outputs the power supply VDDA. And filtering the input power supply +1.0VSW by an L-shaped filter circuit formed by an inductor L2 and a capacitor C23, and outputting a stable power supply VDDA to provide an analog power supply for the controller module.

In a preferred embodiment of the present utility model, further comprising an eleventh voltage conversion module, the eleventh voltage conversion module comprising: the first end of the inductor L14 is connected to the power supply +1.0vsw, the second end of the inductor L14 is connected to the first end of the capacitor C13, the first end of the capacitor C14, the first end of the capacitor C15, the first end of the capacitor C18, the second end of the capacitor C13, the second end of the capacitor C14, the second end of the capacitor C15, and the second end of the capacitor C18, and the power supply ground, and the second end of the inductor L14 outputs the power supply VDDD. The input power +1.0VSW is filtered by an L-shaped filter circuit formed by an inductor L14 and a capacitor C18 to output a stable power supply VDDD, a digital power supply is provided for the controller module, and a digital power supply end VDDD of the controller U6 is connected with the power supply VDDD.

In a preferred embodiment of the present utility model, further comprising a twelfth voltage conversion module, the twelfth voltage conversion module comprising: the first end of the capacitor C123 is connected with the power supply +VBAT2, the second end of the capacitor C123 is connected with the power supply ground, the power supply end VIN of the linear voltage stabilizer U9 and the enable end EN of the linear voltage stabilizer U9 are connected with the power supply +VBAT2, the power supply output end VOUT of the linear voltage stabilizer U9 outputs a power supply VCC_5V, the power supply output end VOUT of the linear voltage stabilizer U9 is connected with the first end of the capacitor C124, the second end of the capacitor C124 is connected with the power supply ground, and the power supply ground end GND of the linear voltage stabilizer U9 is connected with the power supply ground. The input power +VBAT2 is converted into a stable power VCC_5V by a linear voltage stabilizer U9, and power is provided for the CAN communication module.

In a preferred embodiment of the present utility model, further comprising a thirteenth voltage conversion module, the thirteenth voltage conversion module comprising: the emitter of triode Q7 links to each other with power VCC_5V, the first end of resistance R145 links to each other with power VCC_5V, the second end of R145 links to each other with triode Q7's base, triode Q7's collector output power PWR_SOR, triode Q7's base links to each other with resistance R144's first end, resistance R144's second end links to each other with triode Q6's collector, triode Q6's emitter links to each other with power ground, triode Q6's base links to each other with resistance R141's first end, resistance R141's second end links to each other with power ground, triode Q6's base links to each other with resistance R142's first end, resistance R142's second end links to each other with controller U6's control end PTB 4. When the control end PTB4 of the controller U6 inputs a cut-off level to the base electrode of the triode Q6, the triode Q6 is in a cut-off state, the potential of the emitter electrode of the triode Q7 is equal to that of the emitter electrode of the triode Q7, and the collector electrode of the triode Q7 has no power supply output; when the control terminal PTB4 of the controller U6 inputs a conduction level to the base of the transistor Q6, the transistor Q6 is in a conduction state, the base voltage of the transistor Q7 is pulled down, the transistor Q7 is in a conduction state, and the collector of the transistor Q7 outputs a power supply pwr_sor to provide a sampling power supply for the current sampling module.

In a preferred embodiment of the present utility model, the key module further comprises: the first end of the resistor R131 is connected with the power supply PWR_KEY, the second end of the resistor R131 is connected with the folding signal end of the interface J3, the second end of the resistor R131 is connected with the first end of the electrostatic protection diode TVS1, the second end of the electrostatic protection diode TVS1 is connected with the first end of the electrostatic protection diode TVS2, the second end of the electrostatic protection diode TVS2 is connected with the unfolding signal end of the interface J3, the first end of the electrostatic protection diode TVS2 is connected with the power supply ground, the second end of the resistor R131 is connected with the first end of the capacitor C98, the second end of the capacitor C98 is connected with the power supply ground, the second end of the resistor R131 is connected with the first end of the resistor R133, the second end of the resistor R151 is connected with the power supply ground, the second end of the resistor R133 is connected with the first end of the capacitor C101, the second end of the resistor R133 is connected with the power supply ground, and the second end of the resistor R133 is connected with the folding signal end PTD7 of the controller U6;

the first end of the resistor R135 is connected with the power supply PWR_KEY, the second end of the resistor R135 is connected with the first end of the capacitor C99, the second end of the capacitor C99 is connected with the power supply ground, the second end of the resistor R135 is connected with the unfolding signal end of the interface J3, the second end of the resistor R135 is connected with the first end of the resistor R134, the second end of the resistor R134 is respectively connected with the first end of the resistor R150 and the first end of the capacitor C100, the second end of the resistor R150 and the second end of the capacitor C100 are both connected with the power supply ground, and the second end of the resistor R134 is connected with the unfolding signal acquisition end PTD6 of the controller U6. The folding signal end of the interface J3 is connected with the folding key, and a folding signal is input to a folding signal acquisition end PTD7 of the controller U6; the expansion signal end of the interface J3 is connected with the expansion key, and an expansion signal is input to the expansion signal acquisition end PTD6 of the controller U6. Typically, the other end of the folding key and the other end of the unfolding key are connected to a power ground.

In a preferred embodiment of the present utility model, further comprising a deserializer module, the deserializer module comprising: the differential signal negative end SIOB-of the deserializing chip U1 is connected with the first end of a capacitor C7, the second end of the capacitor C7 is connected with the first end of a resistor R161, the second end of the resistor R161 is connected with the power ground, the differential signal positive end SIOB+ of the deserializing chip U1 is connected with the first end of a capacitor C12, the second end of the capacitor C12 is connected with the first end of a resistor R47, the second end of the resistor R47 is connected with the power ground, the first end of the resistor R47 is connected with the first end of an electrostatic protection diode ESD5, the second end of the electrostatic protection diode ESD5 is connected with the power ground, the first end of the electrostatic protection diode ESD5 is connected with a video signal data end RF of an interface J4, and a power ground end GND of the interface J4 is connected with the power ground; the interface J4 is connected with the video line, so that video data transmitted from the interface J4 can be played on a screen.

The power supply end VDD18 of the deserializing chip U1 is connected with the power supply VDD18, the first end of the resistor R28 is connected with the power supply VDDIO, the second end of the resistor R28 is connected with the data end SDA_RX of the deserializing chip U1, the first end of the resistor R29 is connected with the power supply VDDIO, the second end of the resistor R29 is connected with the serial clock signal end SCL_TX of the deserializing chip U1, the first end of the resistor R123 is connected with the first end of the resistor R7, the second end of the resistor R7 is connected with the clock end PTA0 of the controller U6 and the first end of the resistor R121, the second end of the resistor R121 is connected with the serial clock signal end SCL_TX of the power supply +3.3V_MCU, the second end of the resistor R123 is connected with the serial clock signal end SCL_TX of the deserializing chip U1, the first end of the resistor R122 is connected with the first end of the resistor R8, the second end of the resistor R8 is connected with the data end PTA1 of the controller U6 and the serial clock signal end SCL_TX of the resistor R120, the second end of the resistor R120 is connected with the data end of the deserializing chip R122 is connected with the serial clock signal end PTA1 of the serial clock signal end of the resistor R116;

The power supply end VDDA of the deserializing chip U1 is connected with the power supply VDDA, the first end of the resistor R102 is connected with the power supply VDDIO, the second end of the resistor R102 is connected with the twisted pair/coaxial line mode selection end CXTP/GPIO09 of the deserializing chip U1, the twisted pair/coaxial line mode selection end CXTP/GPIO09 of the deserializing chip U1 is connected with the first end of the resistor R96, and the second end of the resistor R96 is connected with the power supply ground;

the first end of the resistor R35 is connected with the power supply VDDIO, the second end of the resistor R35 is connected with the LOCK end LOCK of the deserializing chip U1, the first end of the resistor R32 is connected with the LOCK control end PTE9 of the controller U6, and the second end of the resistor R32 is connected with the LOCK end LOCK of the deserializing chip U1; the first end of the resistor R40 is connected with the error indication receiving end PTD15 of the controller U6, the second end of the resistor R40 is connected with the error indication end ERRORB of the deserializing chip U1, the first end of the resistor R34 is connected with the power supply VDDIO, and the second end of the resistor R34 is connected with the error indication end ERRORB of the deserializing chip U1;

the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the first end of the capacitor C16, the second end of the capacitor C16 is connected with the power ground, the first end X1/SOC of the crystal oscillator of the deserializing chip U1 is connected with the first end of the crystal oscillator Y2, the ground end GND of the crystal oscillator Y2 is connected with the power ground, the second end of the crystal oscillator Y2 is connected with the second end X2 of the crystal oscillator of the deserializing chip U1 and the first end of the capacitor C17, and the second end of the capacitor C17 is connected with the power ground; a clock oscillation signal is provided to the deserializing chip U1.

The transmitting reset end TXRES of the deserializing chip U1 is connected with the first end of a resistor R49, the second end of the resistor R49 is connected with power ground, the I2C mode selection end GPIO01/I2CSEL of the deserializing chip U1 is connected with the first end of a resistor R46, the second end of the resistor R46 is connected with a power supply VDDIO, the differential signal end SIOA+ of the deserializing chip U1 is connected with the first end of a capacitor C8, the second end of the capacitor C8 is connected with the first end of a resistor R44, the second end of the resistor R44 is connected with power ground, the differential signal end SIOA-of the deserializing chip U1 is connected with the first end of a capacitor C11, the second end of the capacitor C11 is connected with the first end of a resistor R43, the second end of the resistor R43 is connected with power ground, the power-off mode selection end PWB of the deserializing chip U1 is connected with the first end of a resistor R21, the second end of the resistor R21 is connected with power ground, the power-off mode selection end PWB of the deserializing chip U1 is connected with the first end of a resistor R48, and the second end of the resistor R48 is connected with the first end of a controller U9 of the resistor U6;

the address end SD/ADD0/GPIO11 of the deserializing chip U1 is connected with the power supply VDDIO, the address end SD/ADD0/GPIO11 of the deserializing chip U1 is connected with the first end of the resistor R23, and the second end of the resistor R23 is connected with the power supply ground; the address end SCK/ADD1/GPIO12 of the deserializing chip U1 is connected with a power supply VDDIO, the address end SCK/ADD1/GPIO12 of the deserializing chip U1 is connected with the first end of a resistor R24, and the second end of the resistor R24 is connected with the power supply ground; the address end WS/ADD2/GPIO13 of the deserializing chip U1 is connected with the first end of a resistor R42, the second end of the resistor R42 is connected with a power supply VDDIO, and the address end WS/ADD2/GPIO13 of the deserializing chip U1 is connected with a power supply ground; the interrupt signal end SDIR/GPIO06 of the deserializing chip U1 is connected with the first end of the resistor R118, and the second end of the resistor R118 is connected with the interrupt signal end PTC5 of the controller U6; or the interrupt signal end SDIR/GPIO06 of the deserializing chip U1 is connected with the first end of the resistor R124, the second end of the resistor R124 is connected with the interrupt signal end of the TFT screen interface J2 and the first end of the resistor R15, and the second end of the resistor R15 is connected with the power supply +3.3V_TFT; an address code is provided for the deserializing chip U1.

The data end TXOUT_B0-of the deserializing chip U1 is connected with the first data negative end of the TFT screen interface J2, the data end TXOUT_B0+ of the deserializing chip U1 is connected with the first data positive end of the TFT screen interface J2, the data end TXOUT_B1-of the deserializing chip U1 is connected with the second data negative end of the TFT screen interface J2, the data end TXOOUT_B0+ of the deserializing chip U1 is connected with the second data positive end of the TFT screen interface J2, the clock end TXCLK_OUTB+ of the deserializing chip U1 is connected with the first clock positive end of the TFT screen interface J2, the data end TXOUT_B2-of the deserializing chip U1 is connected with the third data negative end of the TFT screen interface J2, the data end TXOUT_B2+ of the deserializing chip U1 is connected with the third data positive end of the TFT screen interface J2, and the data end TXOUT_B3+ of the deserializing chip U1 is connected with the fourth data end TXOTXOTXOTXJ2 of the fourth interface;

the data end TXOUT_A0-of the deserializing chip U1 is connected with the fifth data negative end of the TFT screen interface J2, the data end TXOUT_A0+ of the deserializing chip U1 is connected with the fifth data positive end of the TFT screen interface J2, the data end TXOUT_A1-of the deserializing chip U1 is connected with the sixth data positive end of the TFT screen interface J2, the clock end TXOCLK_OUTA-of the deserializing chip U1 is connected with the second clock negative end of the TFT screen interface J2, the clock end TXOCLK_OUTA+ of the deserializing chip U1 is connected with the second clock positive end of the TFT screen interface J2, the data end TXOUT_A2-of the deserializing chip U1 is connected with the seventh data negative end of the TFT screen interface J2, the data end TXOUT_A2+ of the deserializing chip U1 is connected with the seventh data positive end of the TFT screen interface J2, and the data end TXOUT_A3+ of the deserializing chip U1 is connected with the eighth data end of the data screen interface J2;

The TFT screen enabling control end GPIO02 of the deserializing chip U1 is connected with the first end of a resistor R36, the second end of the resistor R36 is connected with the TFT screen enabling detection end PTE7 of a controller U6, the TFT screen enabling control end GPIO02 of the deserializing chip U1 is connected with the first end of a resistor R37, the second end of the resistor R37 is connected with the first end of a resistor R130, and the second end of the resistor R130 is connected with the backlight enabling control end PTC8 of the controller U6;

the PWM regulating end WSIR/GPIO08 of the deserializing chip U1 is connected with the first end of a resistor R38, the second end of the resistor R38 is connected with the PWM detecting end PTC3 of a controller U6, the PWM regulating end WSIR/GPIO08 of the deserializing chip U1 is connected with the first end of a resistor R39, the second end of the resistor R39 is connected with the first end of a resistor R129, the second end of the resistor R129 is connected with the backlight regulating end PTB2 of the controller U6, the first end of the resistor R129 is connected with the first end of a capacitor C93, and the second end of the capacitor C93 is connected with power ground;

the power supply terminal VDDD of the deserializing chip U1 is connected to the power supply VDDD, and the power supply terminal EPGND of the deserializing chip U1 is connected to the power supply ground. And the data are played on the screen by connecting the TFT screen interface J2 with the TFT screen.

In a preferred embodiment of the present utility model, further comprising a three-phase pre-drive module, the three-phase pre-drive module comprising: the power end VIN of the pre-driving chip U8 is connected with a power supply +VBATT, the power end VIN of the pre-driving chip U8 is connected with a first end of a capacitor C129, a second end of the capacitor C129 is connected with a power supply ground, the power end VIN of the pre-driving chip U8 is connected with a first end of a capacitor C40, a second end of the capacitor C40 is connected with a power supply ground, a charge pump capacitor end CPA of the pre-driving chip U8 is connected with a first end of a capacitor C30, a second end of the capacitor C30 is connected with a charge pump capacitor end CPB of the pre-driving chip U8, a power source end VREG of the pre-driving chip U8 is connected with a first end of a capacitor C31, and a second end of the capacitor C31 is connected with the power supply ground;

The A-phase high-level driving end GHA of the pre-driving chip U8 is connected with the first end of a resistor R57 and the cathode of a diode D6, the A-phase low-level driving end GLA of the pre-driving chip U8 is connected with the first end of a resistor R158 and the cathode of a diode D12, the B-phase high-level driving end GHB of the pre-driving chip U8 is connected with the first end of a resistor R82 and the cathode of a diode D10, the B-phase low-level driving end GLB of the pre-driving chip U8 is connected with the first end of a resistor R159 and the cathode of a diode D14, the C-phase high-level driving end GHC of the pre-driving chip U8 is connected with the first end of a resistor R157 and the cathode of a diode D11, and the C-phase low-level driving end GLC of the pre-driving chip U8 is connected with the first end of a resistor R160 and the cathode of a diode D15;

the over-current protection end LSS of the pre-driving chip U8 is connected with the over-current protection end OCP, the high-level A phase end HA of the pre-driving chip U8 is connected with the first end of a resistor R178, the second end of the resistor R178 is connected with the high-level A phase end PTD2 of a controller U6, the high-level B phase end HB of the pre-driving chip U8 is connected with the first end of a resistor R180, the second end of the resistor R180 is connected with the high-level B phase end PTC6 of the controller U6, the high-level C phase end HC of the pre-driving chip U8 is connected with the first end of a resistor R182, the second end LA of the pre-driving chip U8 is connected with the first end PTD3 of a resistor R179, the second end LB of the pre-driving chip U8 is connected with the first end of a resistor R181, the second end of the resistor R181 is connected with the first end HC of the controller U6, the second end of the pre-driving chip U8 is connected with the first end PTE2 of the resistor R6, and the first end 183 of the low-level C phase end PTC 8 of the pre-driving chip U6 is connected with the first end PTC 6;

The heat dissipation end GND of the pre-driving chip U8 is in contact with a heat dissipation cushion of the pre-driving chip, the dead time end DT of the pre-driving chip U8 is connected with the first end of a resistor R54, the second end of the resistor R54 is connected with the power ground, the overcurrent input protection end OC_REF of the pre-driving chip U8 is connected with the first end of a resistor R185, the second end of the resistor R185 is connected with a power PWR_SOR, the first end of the resistor R185 is connected with the first end of a resistor R186, the second end of the resistor R186 is connected with the power ground, the sleep mode end NSLEEP of the pre-driving chip U8 is connected with the sleep control end PTE8 of a controller U6, and the fault indication end NFAULT of the pre-driving chip U8 is connected with the acquisition end PTB5 of the controller U6;

the capacitor end BSTA of the pre-driving chip U8 is connected with the first end of the capacitor C32, the second end of the capacitor C32 is connected with the driving motor A end of the interface J1, the second end of the capacitor C32 is connected with the capacitor end SHA of the pre-driving chip U8, the capacitor end BSTB of the pre-driving chip U8 is connected with the first end of the capacitor C33, the second end of the capacitor C33 is connected with the driving motor B end of the interface J1, the second end of the capacitor C33 is connected with the capacitor end SHB of the pre-driving chip U8, the capacitor end BSTC of the pre-driving chip U8 is connected with the first end of the capacitor C34, the second end of the capacitor C34 is connected with the driving motor C end of the interface J1, and the second end of the capacitor C34 is connected with the capacitor end SHC of the pre-driving chip U8. The three-phase driving motor is connected with the interface J1 through the driving motor, and a pre-driving power supply, short-circuit protection, overcurrent protection and the like are provided for the three-phase driving motor.

In a preferred embodiment of the present utility model, further comprising a motor driving module, the motor driving module comprising: the first end of the resistor R57 is connected with the A-phase high-level driving end GHA of the pre-driving chip U8, the second end of the resistor R57 is connected with the first end of the resistor R172, the negative electrode of the diode D6 is connected with the A-phase high-level driving end GHA of the pre-driving chip U8, the positive electrode of the diode D6 is connected with the first end of the resistor R172, the positive electrode of the diode D6 is connected with the first end of the capacitor C122, the positive electrode of the diode D6 is connected with the grid electrode of the field effect transistor Q8, the second end of the resistor R172 and the second end of the capacitor C122 are connected with the source electrode of the field effect transistor Q8, the drain electrode of the field effect transistor Q8 is connected with the first end of the capacitor C39 and the first end of the capacitor C41, the second end of the capacitor C39 and the second end of the capacitor C41 are connected with the power ground, and the drain electrode of the field effect transistor Q8 is connected with the power source +VBATT;

the first end of a resistor R82 is connected with the B-phase high-level driving end GHB of the pre-driving chip U8, the second end of the resistor R82 is connected with the first end of a resistor R171 and the first end of a capacitor C111, the cathode of a diode D10 is connected with the B-phase high-level driving end GHB of the pre-driving chip U8, the anode of the diode D10 is connected with the second end of the resistor R82, the first end of the resistor R171 and the first end of a capacitor C111 are connected with the grid electrode of a field effect transistor Q12, the second end of the resistor R171 and the second end of the capacitor C111 are connected with the source electrode of the field effect transistor Q12, and the drain electrode of the field effect transistor Q12 is connected with a power supply +VBATT;

The first end of a resistor R157 is connected with a C-phase high-level driving end GHC of the pre-driving chip U8, the second end of the resistor R157 is connected with the first end of a resistor R170 and the first end of a capacitor C112, the cathode of a diode D11 is connected with the C-phase high-level driving end GHC of the pre-driving chip U8, the anode of the diode D11 is connected with the second end of the resistor R157, the first end of the resistor R170 and the first end of a capacitor C112 are connected with the grid electrode of a field effect transistor Q14, the second end of the resistor R170 and the second end of the capacitor C112 are connected with the source electrode of the field effect transistor Q14, and the drain electrode of the field effect transistor Q14 is connected with a power source +VBATT;

the source electrode of the field effect tube Q8 is connected with the phase end of the driving motor A of the interface J1 and the first end of the capacitor C138, the second end of the capacitor C138 is connected with the power ground, the source electrode of the field effect tube Q12 is connected with the phase end of the driving motor B of the interface J1 and the first end of the capacitor C139, the second end of the capacitor C139 is connected with the power ground, the source electrode of the field effect tube Q14 is connected with the phase end of the driving motor C of the interface J1 and the first end of the capacitor C140, and the second end of the capacitor C140 is connected with the power ground;

the cathode of the diode D12 and the first end of the resistor R158 are respectively connected with the A-phase low-level driving end GLA of the pre-driving chip U8, the anode of the diode D12 and the second end of the resistor R158 are both connected with the grid electrode of the field effect transistor Q9, the anode of the diode D12 is respectively connected with the first end of the resistor R167 and the first end of the capacitor C121, the second end of the resistor R167 and the second end of the capacitor C121 are both connected with the source electrode of the field effect transistor Q9, and the drain electrode of the field effect transistor Q9 is connected with the source electrode of the field effect transistor Q8;

The cathode of the diode D14 and the first end of the resistor R159 are respectively connected with the B-phase low-level driving end GLB of the pre-driving chip U8, the anode of the diode D14 and the second end of the resistor R159 are both connected with the grid electrode of the field effect transistor Q9, the anode of the diode D14 is respectively connected with the first end of the resistor R168 and the first end of the capacitor C120, the second end of the resistor R168 and the second end of the capacitor C120 are both connected with the source electrode of the field effect transistor Q13, and the drain electrode of the field effect transistor Q13 is connected with the source electrode of the field effect transistor Q12;

the cathode of the diode D15 and the first end of the resistor R160 are respectively connected with the C-phase low-level driving end GLC of the pre-driving chip U8, the anode of the diode D15 and the second end of the resistor R160 are respectively connected with the first end of the resistor R169 and the first end of the capacitor C119, the anode of the diode D15 is connected with the grid electrode of the field effect transistor Q15, the second end of the resistor R169 and the second end of the capacitor C119 are both connected with the source electrode of the field effect transistor Q15, and the drain electrode of the field effect transistor Q15 is connected with the source electrode of the field effect transistor Q14;

the source electrode of the field effect transistor Q9 is connected with the first end of the resistor R192, the source electrode of the field effect transistor Q9 is connected with the first end of the resistor R187, the second end of the resistor R187 is connected with the first end of the resistor R50, and the second end of the resistor R50 is connected with the power ground; the source electrode of the field effect transistor Q13 is connected with the first end of the resistor R199, the source electrode of the field effect transistor Q13 is connected with the first end of the resistor R188, and the second end of the resistor R188 is connected with the first end of the resistor R50; the source electrode of the field effect transistor Q15 is connected with the first end of the resistor R205, the source electrode of the field effect transistor Q15 is connected with the first end of the resistor R189, and the second end of the resistor R189 is connected with the first end of the resistor R50; the first end of the capacitor C42 is connected to the first end of the resistor R50, the second end of the capacitor C42 is connected to the power ground, and the first end of the capacitor C42 is the over-current protection end OCP. May further include: the first end of the resistor R162 is connected with the drain electrode of the field effect transistor Q8, the second end of the resistor R162 is connected with the first end of the capacitor C46, and the second end of the capacitor C46 is connected with the source electrode of the field effect transistor Q8; the first end of the resistor R166 is connected with the drain electrode of the field effect transistor Q9, the second end of the resistor R166 is connected with the first end of the capacitor C110, and the second end of the capacitor C110 is connected with the source electrode of the field effect transistor Q9; the first end of the resistor R53 is connected with the drain electrode of the field effect transistor Q12, the second end of the resistor R53 is connected with the first end of the capacitor C44, and the second end of the capacitor C44 is connected with the source electrode of the field effect transistor Q12; the first end of the resistor R164 is connected with the drain electrode of the field effect transistor Q13, the second end of the resistor R164 is connected with the first end of the capacitor C106, and the second end of the capacitor C106 is connected with the source electrode of the field effect transistor Q13; the first end of the resistor R45 is connected with the drain electrode of the field effect transistor Q14, the second end of the resistor R45 is connected with the first end of the capacitor C43, and the second end of the capacitor C43 is connected with the source electrode of the field effect transistor Q14; the first end of the resistor R163 is connected to the drain of the field effect transistor Q15, the second end of the resistor R163 is connected to the first end of the capacitor C47, and the second end of the capacitor C47 is connected to the source of the field effect transistor Q15. The driving circuit formed by six field effect transistors, namely a field effect transistor Q8, a field effect transistor Q9, a field effect transistor Q12, a field effect transistor Q13, a field effect transistor Q14 and a field effect transistor Q15, provides a driving power supply for the driving motor.

In a preferred embodiment of the present utility model, further comprising a current sampling module, the current sampling module comprising: the A phase output end OUT_A of the sampling chip U11 is respectively connected with the first end of a resistor R190 and a sampling end PTB13 of a controller U6, the A phase input negative end-IN_A of the sampling chip U11 is respectively connected with the first end of a resistor R195 and the second end of the resistor R190, the second end of the resistor R195 is connected with the first end of a resistor R193, the second end of the resistor R193 is connected with an overcurrent protection end OCP, the second end of the resistor R195 is connected with the first end of a capacitor C131, the second end of the capacitor C131 is connected with power ground, the second end of the capacitor C131 is connected with the first end of a capacitor C132, the second end of the capacitor C132 is connected with the first end of a resistor R192, the second end of the resistor R192 is connected with the source of an effect tube Q9, the second end of the capacitor C132 is connected with the first end of a resistor R196, the second end of the resistor R196 is connected with the positive end +IN_A of the sampling chip U11, the second end of the A phase input positive end +IN_A of the resistor R193 is connected with the positive end of the resistor R193, the second end of the resistor R194 is connected with the positive end of the resistor R194, the second end of the resistor R194 is connected with the second end of the resistor R194 is connected with the positive end of the resistor R11, the second end of the resistor R194 is connected with the positive end of the resistor R11, the resistor R194 is connected with the second end of the resistor R11;

The negative power supply end V-of the sampling chip U11 is connected with power supply ground, the output end OUT_D of the sampling chip U11 is connected with the sampling end PTB12 of the controller U6, the output end OUT_D of the sampling chip U11 is connected with the first end of a resistor R198, the second end of the resistor R198 is connected with the negative reference voltage input end IN_D of the sampling chip U11, the second end of the resistor R198 is connected with the first end of a resistor R202, the second end of the resistor R202 is connected with the first end of a capacitor C134, the second end of the resistor R202 is connected with the first end of a resistor R200, the second end of the resistor R200 is connected with an over-current protection end OCP, the second end of the capacitor C134 is connected with power supply ground, the second end of the capacitor C134 is connected with the first end of a capacitor C135, the second end of the capacitor C135 is connected with the first end of a resistor R203, the second end of the resistor R203 is connected with the positive input end +IN_D of the sampling chip U11, the second end of the resistor R203 is connected with the second end of the resistor R201, the second end of the capacitor C135 is connected with the second end of the resistor R200, and the second end of the resistor C135 is connected with the second end of the resistor R199 is connected with the source end of a resistor R13;

the C-phase input positive end +IN_C of the sampling chip U11 is connected with the second end of a resistor R207, the C-phase input positive end +IN_C of the sampling chip U11 is connected with the first end of a resistor R209, the second end of the resistor R209 is connected with the first end of a resistor R205, the second end of the resistor R205 is connected with the source electrode of a field effect transistor Q15, the second end of the resistor R209 is connected with the first end of a capacitor C136, the second end of the capacitor C136 is connected with the power ground, the second end of the capacitor C136 is connected with the first end of a capacitor C137, the second end of the capacitor C137 is connected with the first end of a resistor R206, the second end of the resistor R206 is connected with an over-current protection end OCP, the second end of the capacitor C137 is connected with the first end of a resistor R208, the second end of the resistor R208 is connected with the C-phase input negative end-IN_C of the sampling chip U11, the second end of the resistor R208 is connected with the first end of the resistor R204, the second end of the resistor R204 is connected with the C-phase output end OUT 11 of the sampling chip, the second end of the resistor R204 is connected with the C-phase output end OUT of the sampling chip U11, and the second end of the controller U4 is connected with the output end of the sampling chip U11B is connected with the sampling chip 4. The current of the driving motor is collected through the sampling chip U11, and the safety of the driving motor is guaranteed.

In a preferred embodiment of the present utility model, the TFT screen interface module further includes: the first power end of the TFT screen interface J2 is connected with the first end of the capacitor C5 and the first end of the capacitor C6, the second ends of the capacitor C5 and the capacitor C6 are connected with power ground, the second power end of the TFT screen interface J2 is connected with the first end of the resistor R14, and the second end of the resistor R14 is connected with the power +3.3V_TFT;

the third power terminal of the TFT screen interface J2 is connected to the first terminal of the resistor R184, and the second terminal of the resistor R184 is connected to the power +3.3v_tft.

In a preferred embodiment of the present utility model, the motor interface module further comprises: the power end of the interface J1 is connected with the power PWR_SOR, the power end of the interface J1 is connected with the first end of the capacitor C109, the second end of the capacitor C109 is connected with the power ground, the power end of the interface J1 is connected with the first end of the capacitor C103, the second end of the capacitor C103 is connected with the power ground, and the power end of the interface J1 is connected with the power ground.

While embodiments of the present utility model have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the utility model, the scope of which is defined by the claims and their equivalents.

Claims

1. The screen backlight circuit for the ceiling screen is characterized by comprising a power supply module, a controller module, a screen backlight module and an LED lamp group;

2. The screen backlight circuit for a ceiling screen of claim 1, wherein the power module comprises a first voltage conversion module and a second voltage conversion module;

3. The screen backlight circuit for a ceiling screen of claim 2, wherein the first voltage conversion module comprises: the power output end of the interface J3 is connected with the first end of the capacitor C64, the second end of the capacitor C64 is connected with the first end of the capacitor C65, the second end of the capacitor C65 is connected with the power ground, the power output end of the interface J3 is connected with the drain electrode of the field effect tube Q17, the grid electrode of the field effect tube Q17 is respectively connected with the first end of the resistor R99, the first end of the resistor R100, the anode of the diode D8 and the first end of the capacitor C91, the second end of the resistor R99 is connected with the power ground, the source electrode of the field effect tube Q17 is respectively connected with the second end of the resistor R100, the cathode of the diode D8 and the second end of the capacitor C91, the source electrode of the field effect tube Q17 is also connected with the first end of the capacitor C117, the second end of the capacitor C117 is connected with the power ground, the source electrode of the field effect tube Q17 is connected with the first end of the inductor L3, the second end of the inductor L3 is connected with the first end of the capacitor C70 and the first end of the capacitor C62, the second end of the capacitor C70 is connected with the second end of the inductor C62 is connected with the power ground, and the second end of the VBL 3 is connected with the second end of the power source +ATT.

4. The screen backlight circuit for a ceiling screen of claim 2, wherein the second voltage conversion module comprises: the positive pole of diode D13 links to each other with power BATTERY, the negative pole of diode D13 links to each other with the first end of electric capacity C113, the first end of electric capacity C114, the second end of electric capacity C113 links to each other with power ground, the negative pole of diode D13 links to each other with the power end VIN of linear regulator U5, the power output end VOUT of linear regulator U5 links to each other with the first end of electric capacity C115, the second end of electric capacity C115 links to each other with power ground, the power output end VOUT of linear regulator U5 outputs power +3.3V_MCU, the power end VIN of linear regulator U5 links to each other with the first end of resistance R33, the second end of resistance R33 links to each other with the enabling end EN of linear regulator U5, the power ground end GND of linear regulator U5 links to each other with power ground.

5. The screen backlight circuit for a ceiling screen of claim 1, further comprising a wake-up module comprising: the first end of the resistor R58 is connected with the power +3.3V_MCU, the second end of the resistor R58 is connected with the collector of the triode Q1, the collector of the triode Q1 is connected with the first end of the resistor R132, the second end of the resistor R132 is connected with the wake-up end PTD5 of the controller U6, the emitter of the triode Q1 is connected with the power ground, the base of the triode Q1 is connected with the first end of the capacitor C61 and the first end of the resistor R56, the second end of the capacitor C61 and the second end of the resistor R56 are connected with the power ground, the base of the triode Q1 is connected with the first end of the resistor R73, the second end of the resistor R73 is connected with the negative electrode of the diode D3, the positive electrode of the diode D3 is connected with the wake-up end of the interface J3, the positive electrode of the diode D3 is connected with the first end of the capacitor C66, the second end of the capacitor C66 is connected with the power ground, the second end of the resistor R73 is connected with the first end of the resistor R59, the second end of the resistor R59 is connected with the first end of the resistor R60 and the second end of the resistor R59 is connected with the power ground, and the second end of the resistor R59 is connected with the second end of the resistor C59 is connected with the power ground.

6. The screen backlight circuit for a ceiling screen of claim 2, further comprising a voltage sampling module comprising: the emitter of the triode Q2 is connected with a power supply BATTERY, the collector of the triode Q2 is connected with a first end of a resistor R67, a second end of the resistor R67 is connected with a first end of a resistor R68 and a first end of a capacitor C67, the second end of the resistor R68 and the second end of the capacitor C67 are both connected with power supply ground, the second end of the resistor R68 is connected with a voltage sampling end PTC0 of a controller U6, the first end of the resistor R71 is connected with the power supply BATTERY, the second end of the resistor R71 is connected with a base of the triode Q2, the second end of the resistor R71 is connected with a first end of a resistor R66, the second end of the resistor R66 is connected with a collector of the triode Q3, the emitter of the triode Q3 is connected with power supply ground, the base of the triode Q3 is connected with a first end of the resistor R70, the second end of the resistor R70 is connected with power supply ground, the base of the triode Q3 is connected with the first end of the resistor R69, and the second end of the resistor R69 is connected with a voltage sampling control end PTC16 of the controller U6.

The emitter of the triode Q16 is connected with a power supply +VBATT, the collector of the triode Q16 is connected with a first end of a resistor R217, a second end of the resistor R217 is connected with a first end of a resistor R216 and a first end of a capacitor C141, a second end of the resistor R216 and a second end of the capacitor C141 are both connected with power supply ground, a second end of the resistor R217 is connected with a voltage sampling end PTB3 of a controller U6, a first end of the resistor R218 is connected with the power supply +VBATT, a second end of the resistor R218 is connected with a base of the triode Q16, a second end of the resistor R218 is connected with a first end of a resistor R215, and a second end of the resistor R215 is connected with a second end of a resistor R66.

7. The screen backlight circuit for a ceiling screen of claim 1, further comprising a CAN communication module, the CAN communication module comprising: the level end NC of the communication chip U3 is connected with a power supply +3.3V_MCU, the first end of the capacitor C142 is connected with the power supply +3.3V_MCU, the second end of the capacitor C142 is connected with a power supply ground, the first end of the capacitor C107 and the first end of the capacitor C108 are connected with a power supply VCC_5V, the second end of the capacitor C107 and the second end of the capacitor C108 are connected with the power supply ground, and the power supply end VCC of the communication chip U3 is connected with the power supply VCC_5V;

The standby mode selection end STB-IN of the communication chip U3 is connected with the control end PTE10 of the controller U6, the data transmission end TXD-IN of the communication chip U3 is connected with the first end of the resistor R154, the second end of the resistor R154 is connected with the data receiving end PTE5 of the controller U6, the data receiving end RXD-OUT of the communication chip U3 is connected with the first end of the resistor R155, and the second end of the resistor R155 is connected with the data transmission end PTE4 of the controller U6.

8. The screen backlight circuit for a ceiling screen of claim 1, wherein the screen backlight module comprises: the power end VCC of the backlight chip U7 is connected with the first end of a capacitor C87, the second end of the capacitor C87 is connected with the power ground, the power end VCC of the backlight chip U7 is connected with the first end of a resistor R98, the second end of the resistor R98 is connected with a power supply VBATT, the second end of the resistor R98 is connected with the first end of the capacitor C71, the second end of the capacitor C71 is connected with the power ground, the first end of the capacitor C71 is connected with the first end of the capacitor C81, the first end of the capacitor C82 and the first end of the capacitor C83, the second end of the capacitor C81 is connected with the power ground, the first end of the capacitor C71 is connected with the first end of a resistor L4, the second end of the resistor L4 is connected with the positive electrode of a diode D5, the negative electrode of the diode D5 is connected with the first end of a resistor R86, the second end of the resistor R86 is connected with the voltage protection end OVP of the backlight chip U7, the second end of the resistor R86 is connected with the first end of the resistor R87, the second end of the resistor R87 is connected with the power ground, the cathode of the diode D5 is connected with the first end of the capacitor C85, the first end of the capacitor C84, the first end of the capacitor C86 and the first end of the capacitor C80, the second end of the capacitor C85, the second end of the capacitor C84, the second end of the capacitor C86 and the second end of the capacitor C80 are all connected with the power ground, the cathode of the diode D5 is connected with the first end of the resistor R9, the second end of the resistor R9 outputs a power TFT_BL+, the second end of the inductor L4 is connected with the drain electrode of the field effect transistor Q18, the grid electrode of the field effect transistor Q18 is connected with the first end of the resistor R89, the second end of the resistor R89 is connected with the driving voltage end DRV of the backlight chip U7, the source electrode of the field effect transistor Q18 is connected with the first end of the resistor R88, the second end of the resistor R88 is connected with the current sampling end SEN of the backlight chip U7, the source electrode of the field effect transistor Q18 is connected with the first end of the resistor R97, the second end of the resistor R97 is connected with power ground, the second end of the resistor R97 is connected with the first end of the capacitor C88, and the second end of the capacitor C88 is connected with the current sampling end SEN of the backlight chip U7;

The first backlight starting end LED1 of the backlight chip U7 is connected with the first end of the resistor R2, the second end of the resistor R2 is connected with the first backlight starting end of the TFT screen interface J2, the first backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C1, and the second end of the capacitor C1 is connected with the power supply TFT_BL+; the second backlight starting end LED2 of the backlight chip U7 is connected with the first end of the resistor R3, the second end of the resistor R3 is connected with the second backlight starting end of the TFT screen interface J2, the second backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C2, and the second end of the capacitor C2 is connected with the power supply TFT_BL+; the third backlight starting end LED3 of the backlight chip U7 is connected with the first end of the resistor R4, the second end of the resistor R4 is connected with the third backlight starting end of the TFT screen interface J2, the third backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C3, and the second end of the capacitor C3 is connected with the power supply TFT_BL+; the fourth backlight starting end LED4 of the backlight chip U7 is connected with the first end of the resistor R5, the second end of the resistor R5 is connected with the fourth backlight starting end of the TFT screen interface J2, the fourth backlight starting end of the TFT screen interface J2 is connected with the first end of the capacitor C4, the second end of the capacitor C4 is connected with the power supply TFT_BL+, the second end of the capacitor C1, the second end of the capacitor C2, the second end of the capacitor C3 and the second end of the capacitor C4 are connected with the power supply end of the TFT screen interface J2.