CN220604684U

CN220604684U - Lead frame, semiconductor packaging structure and terminal equipment

Info

Publication number: CN220604684U
Application number: CN202322237770.5U
Authority: CN
Inventors: 朱青
Original assignee: Shanghai Qinqian Semiconductor Technology Co ltd
Current assignee: Shanghai Qinqian Semiconductor Technology Co ltd
Priority date: 2023-08-18
Filing date: 2023-08-18
Publication date: 2024-03-15
Anticipated expiration: 2033-08-18

Abstract

The application discloses lead frame, semiconductor packaging structure and terminal equipment, this lead frame includes the base island, encloses the frame body of locating the base island circumference, and the frame body is enclosed by predetermineeing quantity pin and is established the constitution, and the frame body is including the first pin and the second pin of transmission similar signal, first pin with the adjacent setting of second pin, first pin includes the first routing district that sets up towards the base island, and the second pin includes the second routing district that sets up towards the base island, and first routing district and second routing district extend relatively and connect and form first target routing district, and the permitted routing quantity of first target routing district is greater than the sum of the permitted routing quantity of first routing district and the permitted routing quantity of second routing district; the method and the device can realize reasonable layout on the frame body and reasonable realization of chip functions when the number of wires with the same function is large, effectively improve the reliability and stability of the chip and effectively increase the input power of the chip.

Description

Lead frame, semiconductor packaging structure and terminal equipment

Technical Field

The present disclosure relates to the field of integrated circuit packaging technology, and in particular, to a lead frame, a semiconductor package structure, and a terminal device.

Background

Along with the miniaturization and integration development of chip packaging technology, input and output signal types of one chip are more and more complex, and the quantity of the input and output signal types is also more and more. In the packaging process, the surface of the semiconductor bare chip is provided with pads for different signals/functions, any pad is connected with a corresponding pin through a wire, and signal transmission between the chip and external equipment is realized through the pin. Since there may be one or more pads with the same function in a semiconductor die, n pads of more concentrated, same function are typically connected to a corresponding pin or pins, respectively, by n wires. For example, because of the large number of wires, such as five wires of the same function, that need to be soldered to two or three pins, the sum of the wires that can be soldered in the wire bonding area of these two or three pins may be less than the total number of wires that need to be soldered, this would result in some pads being disconnected from the corresponding close pins, even when it may be necessary to cross over to connect with other pins of the same function.

On the premise of determining the applicable field or the applicable terminal equipment type, the positions and the number of pins included in the chip are determined, so that corresponding connection between the wires and the pins is required on the premise of relatively determining the positions and the number of pins and the number of pads.

In order to avoid overline connection or increase the chip area, in an existing improvement scheme, two or even more functional pads with the same function and close to the surface of the semiconductor bare chip are combined into one pad, and the combined pad is connected to the same pin through one wire, so that the total number of wires is reduced, and the purpose of reducing the area requirement of a wire bonding area is achieved. However, in this solution, the wires corresponding to the combined pad need to bear a larger current value, and when the current value exceeds the fusing current of the wires, the wires are easily blown, and even the chip is easily burned. Moreover, the thicker the wires are, the more unfavorable the heat dissipation of the chip, and the performance of the chip is seriously affected. To avoid this, a thicker wire may be used, but additional process steps and costs are added, and the larger the wire diameter, the poorer the heat dissipation of the wire.

Therefore, there is a need to find a semiconductor package structure that can effectively overcome the above-mentioned drawbacks.

Disclosure of Invention

The purpose of the application is to provide a lead frame, a semiconductor packaging structure and terminal equipment, which can effectively realize reasonable connection of a plurality of welding pads of a semiconductor bare chip and corresponding pins, thereby effectively improving the reliability and stability of a chip on the premise of ensuring the realization of the chip function.

In order to achieve the above-mentioned purpose, a first aspect of the present application provides a lead frame, where the lead frame includes a base island and a frame body surrounding the base island, the frame body is formed by surrounding a preset number of pins, the frame body includes a first pin and a second pin for transmitting similar signals, and the first pin and the second pin are disposed adjacently;

the first pin comprises a first wire bonding area arranged towards the base island, the second pin comprises a second wire bonding area arranged towards the base island, the first wire bonding area and the second wire bonding area extend oppositely and are connected to form a first target wire bonding area, and the allowed wire bonding number of the first target wire bonding area is larger than the sum of the allowed wire bonding number of the first wire bonding area and the allowed wire bonding number of the second wire bonding area.

In a preferred embodiment, the top surface of the base island is in a rectangular structure, and the first wire bonding area and the second wire bonding area are arranged along the long side of the base island.

In a preferred embodiment, the first pin further includes a first pin body connected to the first wire bonding area, the second pin further includes a second pin body connected to the second wire bonding area, and the first pin body and the second pin body extend along a direction perpendicular to a long side of the base island.

In a preferred embodiment, the frame body further includes a third pin and a fourth pin for transmitting signals of the same type, and the third pin and the fourth pin are disposed adjacently;

the third pin comprises a third wire bonding area arranged towards the base island and a third pin body connected with the third wire bonding area, the fourth pin comprises a fourth wire bonding area arranged towards the base island and a fourth pin body connected with the fourth wire bonding area, the third wire bonding area and the fourth wire bonding area extend oppositely and are connected to form a second target wire bonding area, and the allowable wire bonding number of the second target wire bonding area is larger than the sum of the allowable wire bonding number of the third wire bonding area and the allowable wire bonding number of the fourth wire bonding area;

the third wire bonding area and the fourth wire bonding area are arranged along the short sides of the base island, and the third pin body and the fourth pipe script body extend to be perpendicular to the same long side of the base island towards the direction away from the base island respectively.

In a preferred embodiment, the frame body further includes at least one connection structure, one end of any one connection structure is connected with the third pin body, the other end is connected with the fourth pin body, and the third pin body, the fourth pin body and any one connection structure enclose to form at least one opening.

In a preferred embodiment, the frame body further includes a fifth pin, a sixth pin, and a seventh pin, where the number of allowed wires of the sixth pin and the seventh pin is greater than the number of allowed wires of the fifth pin;

the fifth pin is positioned between the sixth pin and the seventh pin, or positioned at one side of the sixth pin and the seventh key;

the area of the sixth wire bonding area included in the sixth pin and the area of the seventh wire bonding area included in the seventh pin are larger than the area of the fifth wire bonding area included in the fifth pin.

In a preferred embodiment, the minimum distance between the fifth wire bonding area and the base island is greater than the minimum distance between the sixth wire bonding area and the base island, and the minimum distance between the fifth wire bonding area and the base island is greater than the minimum distance between the seventh wire bonding area and the base island.

In a preferred embodiment, the frame body includes 56 pins, wherein 28 of the pins extend toward one side away from the base island and the remaining 28 of the pins extend toward the other side away from the base island.

In a preferred embodiment, the first pin and the second pin are each used for transmitting a power supply voltage.

A second aspect of the present application provides a semiconductor package structure comprising a leadframe according to any one of the first aspects.

In a preferred embodiment, the semiconductor package structure further includes a semiconductor die and a plurality of wires disposed on the base island, wherein one end of any wire is connected to the semiconductor die, and the other end is connected to a corresponding pin.

A third aspect of the present application provides a terminal device comprising the semiconductor package structure according to any one of the second aspects.

Compared with the prior art, the application has the following beneficial effects:

the application provides a lead frame, a semiconductor packaging structure and terminal equipment, the lead frame comprises a base island and a frame body which is arranged around the periphery of the base island in an enclosing mode, the frame body is formed by adjacently enclosing a preset number of pins, the frame body comprises a first pin and a second pin which are used for transmitting similar signals, the first pin and the second pin are arranged adjacently, the first pin comprises a first wire bonding area which is arranged towards the base island, the second pin comprises a second wire bonding area which is arranged towards the base island, the first wire bonding area and the second wire bonding area extend relatively and are connected to form a first target wire bonding area, and the allowed wire bonding number of the first target wire bonding area is larger than the sum of the allowed wire bonding number of the first wire bonding area and the allowed wire bonding number of the second wire bonding area; according to the method, the total number of wires which can be connected with two or more adjacent pins is increased in a targeted manner by optimizing the structure of the frame body, so that reasonable layout connection on the frame body and reasonable realization of chip functions are realized when the number of wires with the same function is large on the premise that the layout mode of other wires is not influenced and overwires are effectively avoided, the reliability and the stability of the chip are effectively improved, and the input power of the chip is effectively increased;

the third pin body and the fourth tube script body are respectively extended to be perpendicular to the same long side of the base island towards the direction far away from the base island, one end of any connecting structure is connected with the third pin body, the other end of any connecting structure is connected with the fourth tube script body, the third pin body and the fourth tube script body are enclosed with any connecting structure to form at least one open pore, and the stress of two pins in a combined state when the two pins are bent in the thickness direction of the base island is reduced in a mode of opening the open pore between two adjacent pins with a certain radian;

and the minimum distance between the fifth routing area and the base island is larger than the minimum distance between the sixth routing area and the base island, and the minimum distance between the fifth routing area and the base island is larger than the minimum distance between the seventh routing area and the base island;

the application needs to achieve at least one technical effect.

Drawings

Fig. 1 is a schematic structural view of a lead frame;

FIG. 2 is an enlarged view at b in FIG. 1;

FIG. 3 is a schematic view of a semiconductor package structure at the time of packaging;

fig. 4 is a cross-sectional view of section A-A of fig. 1.

Reference numerals:

100-lead frame, 10-base island, 11-pad, 12-wire, 13-semiconductor die, 14-packaging material layer, 20-frame body, 21-first pin group, 22-second pin group, 23-third pin group, 24-fourth pin group, 30-first pin, 31-first pin body, 40-second pin, 41-second pin body, 50-first target routing area, 60-third pin, 61-third pin body, 62-connection structure, 70-fourth pin, 71-fourth pin body, 80-second target routing area, 91-fifth pin, 911-fifth routing area, 92-sixth pin, 921-sixth routing area, 93-seventh pin, 931-seventh routing area, 201-support structure, 202-groove.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the present application more apparent, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

In the description of the present application, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.

In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "connected," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.

Examples

As shown in fig. 1, the present embodiment provides a lead frame 100, where the lead frame 100 includes a base island 10 and a frame body 20 surrounding the base island 10, and the frame body 20 is formed by surrounding a predetermined number of pins. The lead frame 100 in this embodiment is used as a carrier for the integrated semiconductor die 13, and is a key structural member for electrically connecting the internal circuit terminals of the semiconductor die 13 with external circuits by means of a plurality of wires (gold wires, aluminum wires, copper wires, etc.), so as to form an electrical circuit. As shown in fig. 3, when the semiconductor package structure is obtained by packaging, one end of any wire 12 is connected to a pad 11 on a semiconductor die 13 on a submount 10, and the other end is connected to a corresponding pin.

In general, when no package or no dicing is completed, the frame bodies 20 do not exist individually, but rather, a plurality of frame bodies 20 are arranged in an array on the same lead frame group board, and a connection portion remains between any two adjacent frame bodies 20, as shown in fig. 2.

Of course, the structure and state of the frame body 20, whether before or after packaging, are within the scope of the embodiment. After packaging, as shown in fig. 4, the base island 10 is higher than the frame body 20, and any pin of the frame body 20 is bent downwards at least once in the thickness direction of the base island to realize stepped sinking.

Further, the top surface of the base island 10 is rectangular. Two pins are arranged at intervals, and any pin is not connected with the base island 10. Any pin includes a pin body and a wire bonding area disposed toward one end of the base island 10, the upper surface of the wire bonding area being silver plated for wire bonding, such as the circles in fig. 1-2 being exemplary bonding points. In this embodiment, all the routing areas are arranged around the island 10 at substantially uniform intervals. One end of any pin far away from the base island 10 is used as an external connection end connected with the PCB after packaging. For convenience of description, as shown in fig. 1, the frame body 20 includes a first pin group 21, a second pin group 22, a third pin group 23, a fourth pin group 24, each of which includes the same number of pins, as part of the pins of the first pin group 21 are exemplarily marked in the dotted line frame of fig. 1, and so on. Wherein the first pin group 21 and the second pin group 22 are located at one side of the symmetry axis a of the base island 10, and the third pin group 23 and the fourth pin group 24 are located at the other side of the symmetry axis a of the base island 10, and the symmetry axis a is parallel to the long side of the base island 10. The pin body of any pin extends perpendicular to the long side of the base island 10. Therefore, all pins included in the frame body 20 are radially arranged towards a direction far away from the long side of the base island 10, and the external connection end of any pin is perpendicular to the long side of the base island 10. Preferably, the number of pins is 56 in the present embodiment, and each of the first pin group 21 to the fourth pin group 24 includes 14 pins, and the two groups of pins located on the same side of the symmetry axis a are radially arranged in a direction away from the same long side of the base island 10, as shown in fig. 1. That is, 28 pins in the frame body 20 extend toward one side away from the base island 10, and the remaining 28 pins extend toward the other side away from the base island 10.

The frame body 20 includes a first pin 30 and a second pin 40 for transmitting the same type of signals, and the first pin 30 and the second pin 40 are disposed adjacent to each other. As further shown in fig. 3, the first pin 30 includes a first wire bonding area disposed toward the base island 10 and a first pin body 31 connected to the first wire bonding area, and the second pin 40 includes a second wire bonding area disposed toward the base island 10 and a second pin body 41 connected to the second wire bonding area. The first wire bonding area and the second wire bonding area are arranged along the long side of the base island 10, and the first pin body 31 and the second pin body 41 extend along the direction perpendicular to the long side of the base island 10. The first routing area and the second routing area extend opposite to each other and are connected to form a first target routing area 50. The allowable number of wires of the first target wire bonding area 50 is greater than the sum of the allowable number of wires of the first wire bonding area and the allowable number of wires of the second wire bonding area. It should be noted that, the number of wires allowed to be routed refers to the maximum number of wires that can be soldered in each wire bonding area under the premise of other factors.

The total allowable routing number is increased by combining the routing areas, and the method is generally used for structures with more wires with the same function and cannot be arranged, and is particularly suitable for PVDD pins, GVGDD pins and the like. And when the number of wires with the same function is greater, 3 or more adjacent bonding areas are combined to form a larger target bonding area, which is also an implementation range of the embodiment, and further description of this embodiment is omitted.

In the same bonding area, the bonding pads 11 welded by any two wires cannot be overlapped. The number of allowable wires per pin is affected by its wire bond area length, wire bond area width, and wire diameter (wire diameter). In one embodiment, the number of wires that the wire bonding area allows to bond is calculated according to the following formula (1) or formula (2):

n*D*1.6<L-d (1)

n*D*1.6<W (2)

and n is the allowable wire bonding quantity, D is the wire diameter, L is the length of the wire bonding area, W is the width of the wire bonding area, and D is the minimum distance between any welding point of the wire bonding area and the edge of the wire bonding area, wherein 0<d mil is less than or equal to 4mil.

After the first pin 30 and the second pin 40 are combined to obtain the first target routing area 50, the first pin 30 and the second pin 40 are equivalent to the same pin, and the number of allowed routing is calculated by using the formula (1) or (2).

It should be noted that, the wire generally has a certain fusing current, and the current passing through the wire should be smaller than the fusing current. The fusing current has a certain corresponding relation with the material, the wire length and the wire diameter of the lead, for example, copper wire lead is adopted, the wire length is 2.5mm, and the wire diameter is 5.2A when the fusing current is 50 mu m. Therefore, when the number of pads is increased, compared with the mode of combining pads and thickening wires, the mode of combining wire bonding areas in the embodiment can effectively avoid the defects of increased wire current and poor heat dissipation performance of thicker wires. Illustratively, as shown in fig. 1, the first pin 30 and the second pin 40 are PVDD pins, and when the first wire bonding area and the second wire bonding area are not combined, the number of wires is allowed to be 3 PVDD wires, respectively, and the remaining 2 adjacent PVDD wires on the semiconductor die 13 cannot be soldered. The first wire bonding area and the second wire bonding area are combined to form a first target wire bonding area 50, the wire bonding area width W of the first target wire bonding area 50 is increased, and the allowable wire bonding number of the first target wire bonding area 50 is 8 through calculation and welding verification. It can be seen that the number of allowable wires can be effectively increased by combining the wire bonding areas, and the existing structure of the frame body 20 is not affected.

As described above, with continued reference to FIG. 1, the frame body 20 further includes a third pin 60 and a fourth pin 70 disposed adjacent to each other and transmitting like signals. The third pin 60 includes a third routing area disposed toward the base island 10, a third tube script 62 connected to the third routing area. The fourth pin 70 includes a fourth wire bonding area disposed toward the base island 10 and a fourth pin body 71 connected to the fourth wire bonding area. The third wire bonding area and the fourth wire bonding area extend oppositely and are connected to form a second target wire bonding area 80, and in the structure, the allowable wire bonding number of the second target wire bonding area 80 is larger than the sum of the allowable wire bonding number of the third wire bonding area and the allowable wire bonding number of the fourth wire bonding area. The difference between the first pin 30 and the second pin 40 is that the third wire bonding area and the fourth wire bonding area are arranged along the short side of the base island 10, and similarly, the third pin body 61 and the fourth pin body 71 extend to be perpendicular to the same long side of the base island 10.

It can be understood that the third pin body 61 and the fourth pin body 71 have longer lengths and have certain corners and bends in the extending process. For this purpose, the frame body 20 further includes at least one connection structure 62, one end of any connection structure 62 is connected to the third pin body 61, the other end is connected to the fourth pin body 71, and the third pin body 61 and the fourth pin body 71 are enclosed with any connection structure 62 to form at least one opening. Therefore, for the third pin 60 and the fourth pin 70 combined into one pin, the structural stability of such longer pins is improved by providing the connection structure 62, and the stress when the pins are bent in the thickness direction of the base island 10 is reduced by forming the opening, and the contact area of the upper package material and the lower package material is increased, so that the adhesive strength is improved to improve the structural stability.

The frame body 20 further includes a fifth pin 91, a sixth pin 92, and a seventh pin 93, and the three pins are independently and adjacently disposed. Wherein, the number of allowed wires of the sixth pin 92 and the seventh pin 93 is larger than the number of allowed wires of the fifth pin 91. As can be seen from the foregoing calculation method of the number of allowable wires, the sixth pin 92 includes the sixth wire bonding area 921 that is larger than the fifth wire bonding area 911 of the fifth pin 91, and the seventh pin 93 includes the seventh wire bonding area 931 that is larger than the fifth wire bonding area 911 of the fifth pin 91. Further, the minimum distance between the fifth wire bonding area 911 and the island 10 is greater than the minimum distance between the sixth wire bonding area 921 and the island 10, and the minimum distance between the fifth wire bonding area 911 and the island 10 is greater than the minimum distance between the seventh wire bonding area 931 and the island 10. That is, the fifth routing region 911 is a yielding position of the sixth routing region 921 and/or the seventh routing region 931 in a manner of being away from the base island 10 so that the sixth routing region 921 and/or the seventh routing region 931 increases in area, thereby increasing the number of allowable routing of the sixth routing region 921 and/or the seventh routing region 931. The fifth routing region 911 may selectively bond the wire 12 or not bond the wire 12 after the let-off position. Of course, the relative positions of the three pins are not limited in this embodiment, and the fifth pin 91 may be located between the sixth pin 92 and the seventh pin 93, or the fifth pin 91 may be located on a side of the sixth pin 92 away from the seventh pin 93, or the fifth pin 91 may be located on a side of the seventh pin 93 away from the sixth pin 92. As shown in fig. 1, the manner in which the fifth pin 91 is located on the side of the sixth pin 92 away from the seventh pin 93 is exemplarily shown in the present embodiment.

In addition, as shown in fig. 1, the lead frame 100 further includes a pair of support structures 201 for supporting the base island 10 during plastic packaging. One end of any support structure 201 is connected with the short side of the base island 10, the other end extends towards the direction away from the base island 10, and any support structure 201 is perpendicular to the base island 10. The support structure 201 is far away from the base island 10, and one end is bifurcated to form a groove 202, and the groove 202 is used for increasing the contact area between the upper plastic package material and the lower plastic package material during plastic package, so that the plastic package strength is improved, and the product stability is further improved.

The present embodiment further provides a semiconductor package structure including a semiconductor die 13, a plurality of wires 12, a lead frame 100 as referred to in embodiment 1, and a package material layer 14. The semiconductor die 13 is disposed on the base island 10, one end of any wire 12 is connected with the semiconductor die 13, specifically, with a bonding pad 11 on the top surface of the semiconductor die 13, and the other end is connected with a corresponding pin. And, the semiconductor die 13, the lead frame 100, and all the wires 12 are encapsulated in a layer of encapsulation material 14, including but not limited to one of plastic, ceramic.

The embodiment also provides a terminal device, which comprises a power amplifier electronic control device (power amplifier ECU) and comprises the semiconductor packaging structure. The power amplifier sub-control device is connected with a plurality of loudspeakers to realize audio playing. Typically, the terminal device is a vehicle-mounted Class D audio power amplifier.

In summary, the present embodiment optimizes the structure of the frame body to increase the total number of wires that can be connected to two or more adjacent pins, so as to achieve reasonable layout connection on the frame body and reasonable implementation of chip functions when the number of wires with the same function is large, effectively improve the reliability and stability of the chip, and prolong the service life on the premise of not affecting the layout modes of other wires and effectively avoiding overwiring; the input power of the chip is effectively increased, and the chip can be better applied to severe scenes of high voltage, high current and high power; compared with the prior art, the method for thickening the lead by combining the pad can effectively improve the heat dissipation; compared with the prior art, the method for increasing pins by adding wires can effectively reduce the chip size, realize chip miniaturization and reduce the cost;

and the minimum distance between the fifth routing area and the base island is greater than the minimum distance between the sixth routing area and the base island, and the minimum distance between the fifth routing area and the base island is greater than the minimum distance between the seventh routing area and the base island.

All the above-mentioned optional technical schemes can be combined arbitrarily to form optional embodiments of the application, and any plurality of embodiments can be combined, so that the requirements for coping with different application scenes are obtained, and are all within the protection scope of the application, and are not described in detail herein.

It should be noted that the foregoing description is only a preferred embodiment of the present application, and is not intended to limit the present application, but any modifications, equivalents, improvements, etc. within the spirit and principles of the present application are intended to be included in the scope of the present application.

Claims

1. The lead frame comprises a base island and a frame body which is arranged around the periphery of the base island in an enclosing mode, wherein the frame body is formed by adjacently arranging a preset number of pins;

2. The lead frame of claim 1, wherein the top surface of the base island is rectangular in structure, and the first routing area and the second routing area are arranged along the long side of the base island.

3. The leadframe of claim 2, wherein the first pin further comprises a first pin body connected to the first routing region, the second pin further comprises a second pin body connected to the second routing region, and the first pin body and the second pin body each extend in a direction perpendicular to a long side of the island.

4. The leadframe of claim 2 wherein the frame body further comprises a third pin and a fourth pin for transmitting like signals, the third pin and the fourth pin being disposed adjacent;

the third wire bonding area and the fourth wire bonding area are arranged along the short side of the base island, and the third pin body and the fourth pipe script body extend to be perpendicular to the same long side of the base island in the direction away from the base island respectively.

5. The leadframe of claim 4 wherein the frame body further comprises at least one connecting structure, one end of any of the connecting structures being connected to the third pin body and the other end being connected to the fourth pin body, the third pin body, the fourth pin body and any of the connecting structures enclosing at least one opening.

6. The lead frame of claim 1, wherein the frame body further comprises a fifth pin, a sixth pin, and a seventh pin, the sixth pin and the seventh pin each having a greater number of allowable routes than the fifth pin;

the fifth pin is positioned between the sixth pin and the seventh pin, or is positioned at one side of the sixth pin away from the seventh pin, or is positioned at one side of the seventh pin away from the sixth pin;

7. The leadframe of claim 6 wherein a minimum distance of the fifth routing region from the island is greater than a minimum distance of the sixth routing region from the island, the minimum distance of the fifth routing region from the island being greater than a minimum distance of the seventh routing region from the island.

8. The leadframe of claim 1 wherein the frame body includes 56 of the pins, 28 of the pins extending toward one side away from the submount and the remaining 28 of the pins extending toward the other side away from the submount.

9. The leadframe of claim 1, wherein the first pin and the second pin are each for transmitting a supply voltage.

10. A semiconductor package structure, characterized in that the semiconductor package structure comprises the lead frame according to any one of claims 1 to 9.

11. The semiconductor package according to claim 10, further comprising a semiconductor die and a plurality of wires disposed on the base island, wherein one end of any wire is connected to the semiconductor die and the other end is connected to a corresponding pin.

12. A terminal device, characterized in that the terminal device comprises the semiconductor package structure according to claim 10 or 11.