CN220501383U - Encapsulation box convenient for SERS substrate - Google Patents
Encapsulation box convenient for SERS substrate Download PDFInfo
- Publication number
- CN220501383U CN220501383U CN202322130643.5U CN202322130643U CN220501383U CN 220501383 U CN220501383 U CN 220501383U CN 202322130643 U CN202322130643 U CN 202322130643U CN 220501383 U CN220501383 U CN 220501383U
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- Prior art keywords
- storage body
- chip
- box
- package
- vertical
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- 239000000758 substrate Substances 0.000 title claims abstract description 18
- 238000004416 surface enhanced Raman spectroscopy Methods 0.000 title claims abstract description 18
- 238000005538 encapsulation Methods 0.000 title description 2
- 230000006835 compression Effects 0.000 claims abstract description 15
- 238000007906 compression Methods 0.000 claims abstract description 15
- 238000004806 packaging method and process Methods 0.000 claims abstract description 10
- 230000009471 action Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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- Packaging Frangible Articles (AREA)
Abstract
The utility model belongs to the technical field of chip packaging, and particularly relates to a packaging box for a SERS substrate. The utility model comprises a box body and a storage body for placing chips, wherein the interior of the box body is divided into a plurality of compartments, and the storage body is placed in the compartments; the storage body is provided with a placement groove for storing chips; the packaging box further comprises a limiting component for limiting the chip. According to the utility model, the chip is stored in the placing groove, after the box body is closed, the pressing block can press the elastic pressing rod downwards, so that the elastic pressing rod presses the periphery of the chip, the chip is convenient to fix, and the integrity of the chip in transportation or storage is ensured; the elastic compression bar is arranged on the storage body, so that the storage body can be conveniently taken out of the compartment, and the storage body can be conveniently taken out and used as required.
Description
Technical Field
The utility model belongs to the technical field of chip packaging, and particularly relates to a packaging box for a SERS substrate.
Background
The conventional SERS substrate (chip) has dimensions of 3mm×3mm×0.5mm, and no corresponding storage case is currently available on the market due to the small size. The existing technical staff generally adopts a small box with a deeper depth to store, but because the volume of the box is far larger than that of the chip, after the chip is put into the box, the chip can be turned inside when being transported or taken, so that the chip is easy to strike, and the area in the center of the chip is a core part in the actual use process of the chip, the chip is extremely easy to damage due to the striking, so that the chip can not be used, and extremely waste is caused.
Therefore, there is a need for a package that facilitates SERS substrates to address the above-described problems.
Disclosure of Invention
To overcome the above-mentioned drawbacks of the prior art, the present utility model provides a package for SERS substrates. The utility model is convenient for storing, transporting and using the chip.
In order to achieve the above purpose, the present utility model adopts the following technical scheme:
a packaging box for a SERS substrate comprises a box body and a storage body for placing chips, wherein the interior of the box body is divided into a plurality of compartments, and the storage body is placed in the compartments; the storage body is provided with a placement groove for storing chips; the packaging box further comprises a limiting component for limiting the chip.
Preferably, the limiting component comprises an elastic compression bar arranged on the storage body and a pressing block fixed on a box cover of the box body, and the positions of the compression bar and the pressing block correspond to each other one by one.
Preferably, each storage body is provided with two elastic compression bars, and the elastic compression bars are symmetrically arranged with the placement groove as a center.
Preferably, the elastic compression bar is in an inverted U shape; the elastic compression bar consists of a first vertical bar, a second vertical bar and a cross bar, the cross bar is connected with the first vertical bar and the second vertical bar, wherein the first vertical bar is far away from the placing groove, and the second vertical bar is close to the placing groove; the length of the first vertical rod is greater than the length of the second vertical rod.
Preferably, the length of one pressing block is larger than the distance between the two second vertical rods on the corresponding storage body, and the distance between the two second vertical rods on one storage body is smaller than the length of the chip.
Preferably, the distance between the bottom of the second vertical rod and the storage body is greater than the thickness of the chip.
Preferably, the box cover of the box body is provided with a plurality of through holes for vacuumizing.
Preferably, the dimensions of the reservoir are adapted to the dimensions of the compartment.
The utility model has the advantages that:
(1) According to the utility model, the chip is stored in the placing groove, after the box body is closed, the pressing block can press the elastic pressing rod downwards, so that the elastic pressing rod presses the periphery of the chip, the chip is convenient to fix, and the integrity of the chip in transportation or storage is ensured; the elastic compression bar is arranged on the storage body, so that the storage body can be conveniently taken out of the compartment, and the storage body can be conveniently taken out and used as required.
(2) The through holes are formed in the box body, so that the box body can be conveniently stored in a vacuumizing mode or transported.
Drawings
FIG. 1 is a schematic diagram of the structure of the present utility model.
Fig. 2 is a top view of the present utility model.
Fig. 3 is a side view of the present utility model.
Fig. 4 is a schematic view of a partially enlarged structure of the present utility model.
The meaning of the reference symbols in the figures is as follows:
1-box body, 2-compartment, 3-storage body, 4-standing groove, 51-elastic compression bar, 52-briquetting, 6-through hole.
Detailed Description
As shown in fig. 1-4, a package box for a SERS substrate is provided, which is composed of a box body 1, a storage body 3, and a limiting assembly, wherein the storage body 3 is used for storing chips (i.e. the SERS substrate), and the limiting assembly is used for positioning the chips placed in the storage body 3.
Specifically, the storage body 3 is provided with a placing groove 4, and the size of the placing groove 4 is larger than that of the chip, so that the chip can be taken out conveniently; the bottom of the case 1 is divided into a plurality of compartments 2 for holding the storage bodies 3, and the size of the storage bodies 3 is adapted to the size of the compartments 2.
Further, the limiting component comprises an elastic pressing rod 51 arranged on the storage body 3 and a pressing block 52 fixed on the box cover of the box body 1, the elastic pressing rod 51 is arranged on the storage body 3 to facilitate the storage body 3 to be taken out from the compartment 2, each storage body 3 is provided with two symmetrical elastic pressing rods 51, one pressing block 52 corresponds to the two symmetrical elastic pressing rods 51, namely, one pressing block 52 can simultaneously press the two elastic pressing rods 51 on one storage body 3, and then the elastic pressing rods 51 can limit the periphery of the chip.
Further, the elastic compression bar 51 is in an inverted "U" shape; the elastic compression bar 51 is composed of a first vertical bar, a second vertical bar and a cross bar, the cross bar is connected with the first vertical bar and the second vertical bar, wherein the first vertical bar is far away from the placing groove 4, and the second vertical bar is close to the placing groove 4; the length of the first vertical rod is greater than the length of the second vertical rod. The length of one pressing block 52 is larger than the distance between the two second vertical rods on the corresponding storage body 3, and the distance between the two second vertical rods on one storage body 3 is smaller than the length of the chip. The distance between the bottom of the second vertical rod and the storage body 3 is larger than the thickness of the chip.
In order to facilitate vacuumizing the box body 1, a plurality of through holes 6 are arranged on the box cover of the box body 1.
The operation of the device will be described in detail with reference to the drawings in the embodiments.
When the chip is specifically used, the chip is firstly placed in the placing groove 4 at an inclined angle, the box cover is covered, the pressing block 52 on the box cover can downwards press the elastic pressing rod 51, and the first vertical rod of the elastic pressing rod 51 downwards moves under the action of the pressure of the pressing block 52 due to the elasticity of the elastic pressing rod 51, so that the corner of the chip in the placing groove 4 can be pressed, the position of the chip is further limited, the chip is prevented from being disturbed during transportation or storage, the area in the center of the chip is protected, and the integrity of the chip is further ensured;
and then the whole packaging box is placed into an aluminum foil bag, and is connected with the through hole 6 on the box body 1 by using a vacuumizing device, so that the box body 1 is vacuumized, and then is transported or stored.
The above embodiments are merely preferred embodiments of the present utility model and are not intended to limit the present utility model, and any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included in the scope of the present utility model.
Claims (8)
1. The packaging box for the SERS substrate is convenient to use and is characterized by comprising a box body (1) and a storage body (3) for placing chips, wherein the interior of the box body (1) is divided into a plurality of compartments (2), and the storage body (3) is placed in the compartments (2); a placing groove (4) for storing chips is arranged on the storage body (3); the packaging box further comprises a limiting component for limiting the chip.
2. A package for facilitating SERS substrates according to claim 1, wherein: the limiting assembly comprises an elastic pressing rod (51) arranged on the storage body (3) and a pressing block (52) fixed on the box cover of the box body (1), and the positions of the pressing rods correspond to the positions of the pressing blocks (52) one by one.
3. A package for facilitating SERS substrates according to claim 2, wherein: two elastic compression bars (51) are arranged on each storage body (3), and the elastic compression bars (51) are symmetrically arranged with the placement groove (4) as a center.
4. A package for facilitating SERS substrates according to claim 3, wherein: the elastic compression bar (51) is in an inverted U shape; the elastic compression bar (51) consists of a first vertical bar, a second vertical bar and a cross bar, the cross bar is connected with the first vertical bar and the second vertical bar, wherein the first vertical bar is far away from the placing groove (4), and the second vertical bar is close to the placing groove (4); the length of the first vertical rod is greater than the length of the second vertical rod.
5. A package for facilitating SERS substrates according to claim 4, wherein: the length of one pressing block (52) is larger than the distance between the two second vertical rods on the corresponding storage body (3), and the distance between the two second vertical rods on one storage body (3) is smaller than the length of the chip.
6. A package for facilitating SERS substrates according to claim 4, wherein: the distance between the bottom of the second vertical rod and the storage body (3) is greater than the thickness of the chip.
7. A package for facilitating SERS substrates according to claim 1, wherein: the box cover of the box body (1) is provided with a plurality of through holes (6) for vacuumizing.
8. A package for facilitating SERS substrates according to claim 1, wherein: the dimensions of the storage body (3) are adapted to the dimensions of the compartment (2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322130643.5U CN220501383U (en) | 2023-08-09 | 2023-08-09 | Encapsulation box convenient for SERS substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322130643.5U CN220501383U (en) | 2023-08-09 | 2023-08-09 | Encapsulation box convenient for SERS substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220501383U true CN220501383U (en) | 2024-02-20 |
Family
ID=89870821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322130643.5U Active CN220501383U (en) | 2023-08-09 | 2023-08-09 | Encapsulation box convenient for SERS substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220501383U (en) |
-
2023
- 2023-08-09 CN CN202322130643.5U patent/CN220501383U/en active Active
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| GR01 | Patent grant | ||
| GR01 | Patent grant |