CN220457480U - Control circuit of recorder and recorder - Google Patents
Control circuit of recorder and recorder Download PDFInfo
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- CN220457480U CN220457480U CN202321971034.6U CN202321971034U CN220457480U CN 220457480 U CN220457480 U CN 220457480U CN 202321971034 U CN202321971034 U CN 202321971034U CN 220457480 U CN220457480 U CN 220457480U
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Abstract
The application provides a control circuit and record appearance of record appearance, the control circuit of record appearance includes: the control unit is connected with the memory, the first end of the switch is connected with the processor, the second end of the switch is connected with the control unit, and the third end of the switch is connected with the external equipment; wherein, when the recorder is in a shutdown state, the switch communicates the external equipment with the control unit, so that the external device accesses the memory through the control unit. In the scheme of the application, the external equipment is communicated with the control unit through the switch, so that the external equipment accesses the memory through the control unit when the recorder is in a shutdown state, the evidence collection of the external equipment in the shutdown state of the recorder is realized, the working environment temperature is effectively reduced, and the service lives of the recorder and various components in the external equipment are prolonged.
Description
Technical Field
The application relates to the technical field of recorders, in particular to a control circuit of a recorder and the recorder.
Background
The law enforcement recorder is used for collecting evidence files in the law enforcement process, storing the evidence files in the memory card, and when the law enforcement evidence needs to be uploaded, the evidence collection station is connected with the law enforcement recorder through a data line to collect the evidence files stored in the memory card.
Because some evidence collection stations are closed structures, in the process of collecting the evidence files, the law enforcement recorder is always in a starting-up state, and heat can be generated in the starting-up operation process of the law enforcement recorder, so that circuit elements and batteries inside the law enforcement recorder are in a high-temperature environment for a long time, and the service life of the law enforcement recorder can be reduced.
Disclosure of Invention
The application provides a control circuit of a recorder and the recorder so as to solve the problem.
The first aspect of the present application provides a control circuit of a recorder, the recorder including a processor and a memory, the memory being connected to the processor, the control circuit of the recorder comprising: a control unit connected to the processor and the memory; the first end of the switch is connected with the processor, the second end of the switch is connected with the control unit, and the third end of the switch is connected with external equipment; when the recorder is in a starting state, the switch communicates the external equipment with the processor, so that the external equipment accesses the memory through the processor; when the recorder is in a shutdown state, the switch communicates the external equipment with the control unit, so that the external equipment accesses the memory through the control unit.
In some embodiments, the external device includes a power supply circuit; the control unit comprises a controller and a switch group; the first end of the controller is connected with the memory, the second end of the controller is connected with the switch, the third end of the controller is connected with the first end of the switch group, the second end of the switch group is connected with the power supply circuit, and the third end of the switch group is connected with the processor; when the recorder is in a starting state, the switch group receives signals sent by the processor, and the switch group disconnects the power supply circuit from the controller; when the recorder is in a shutdown state, the switch group conducts connection between the power supply circuit and the controller.
In some embodiments, the external device further comprises a data circuit; the controller is provided with a control interface which is connected with the switch; when the recorder is in a shutdown state, the power supply circuit is connected with the controller, and the potential of the control interface is increased, so that the switch is used for communicating the data circuit with the controller.
In some embodiments, the switch set includes a first transistor and a second transistor; a first end of the first transistor is connected to the processor, a second end of the first transistor is connected to the power supply circuit and a first end of the second transistor, and a third end of the first transistor is grounded; the second end of the second transistor is connected to the power supply circuit, and the third end of the second transistor is connected to the controller.
In some embodiments, the control circuit of the recorder further comprises a power control circuit; when the recorder is in a shutdown state, the power supply control circuit is used for communicating the power supply circuit with a battery of the recorder.
In some embodiments, the data circuit is provided with a first protocol interface, the processor is provided with a second protocol interface, and the controller is provided with a third protocol interface; the switch is provided with a first transmission interface group, a second transmission interface group and a third transmission interface group, wherein the first transmission interface group is connected with the first protocol interface, the second transmission interface group is connected with the second protocol interface, and the third transmission interface group is connected with the third protocol interface; when the recorder is in a starting-up state, the first transmission interface group and the second transmission interface group communicate the first protocol interface with the second protocol interface, so that a preset authentication protocol is transmitted between the data circuit and the processor, and the recorder is powered off after authentication is successful; or when the recorder is in a shutdown state, the first transmission interface group and the third transmission interface group communicate the first protocol interface with the third protocol interface, so that a preset authentication protocol is transmitted between the data circuit and the controller, and the data circuit accesses the memory after authentication is successful.
In some embodiments, the controller comprises a micro-control unit.
In some embodiments, the control interface comprises a GPIO interface.
In some embodiments, the power control circuit comprises an integrated power management circuit.
A second aspect of the present application provides a recorder comprising a processor and a memory, the memory being connected to the processor, the recorder further comprising a control circuit of the recorder of the first aspect.
According to the scheme, the control unit and the switch are arranged, the control unit is connected to the memory, the first end of the switch is connected to the processor, the second end of the switch is connected to the control unit, and the third end of the switch is connected to the external equipment; when the recorder is in a starting state, the switch communicates the external equipment with the processor, so that the external equipment can access the memory through the processor; when the recorder is in a shutdown state, the switch communicates the external equipment with the control unit, so that the external equipment accesses the memory through the control unit; according to the scheme, the external equipment is communicated with the control unit through the switch, so that the external equipment accesses the memory through the control unit when the recorder is in a shutdown state, evidence collection of the external equipment in the shutdown state of the recorder is realized, the working environment temperature is effectively reduced, and the service lives of components in the recorder and the external equipment are prolonged.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and, together with the description, serve to explain the technical aspects of the application.
FIG. 1 is a schematic view of a scenario in which a recorder is connected to an external device in an embodiment of the present application;
fig. 2 is a schematic diagram of another scenario in which a recorder is connected to an external device in the embodiment of the present application;
FIG. 3 is a schematic circuit diagram of a control circuit according to an embodiment of the present application;
fig. 4 is a schematic circuit configuration of a switch in an embodiment of the present application.
Detailed Description
The present application is described in further detail below with reference to the drawings and examples. It is specifically noted that the following examples are only for illustration of the present application, but do not limit the scope of the present application. Likewise, the following embodiments are only some, but not all, of the embodiments of the present application, and all other embodiments obtained by one of ordinary skill in the art without making any inventive effort are within the scope of the present application.
Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship. Further, "a plurality" herein means two or more than two. In addition, the term "at least one" herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of A, B, C, and may mean including any one or more elements selected from the group consisting of A, B and C. Furthermore, the terms "first," "second," and "third" in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated.
Fig. 1 is a schematic view of a scenario in which a recorder is connected to an external device in an embodiment of the present application, and fig. 2 is a schematic view of another scenario in which a recorder is connected to an external device in an embodiment of the present application. Referring to fig. 1 and 2, the recorder 10 includes a processor 11 and a memory 12, the memory 12 is connected to the processor 11, wherein the recorder 10 further includes a control circuit, and the control circuit includes: a control unit 13 connected to the memory 12; the first end of the switch 14 is connected to the processor 11, the second end of the switch 14 is connected to the control unit 13, and the third end of the switch 14 is connected to the external device 20; when the recorder 10 is in a power-on state, the switch 14 communicates the external device 20 with the processor 11, so that the external device 20 accesses the memory 12 through the processor 11; when the recorder 10 is in the off state, the switch 14 communicates the external device 20 with the control unit 13, so that the external device 20 accesses the memory 12 through the control unit 13.
It can be appreciated that the recorder 10 is a recording tool with recording and video recording functions, for example, the recorder 10 may be a law enforcement recorder, the recorder 10 is used for recording file data, wherein the file data includes voice data and video data, and the recorder 10 may have an on state and an off state; wherein, the recorder 10 is in a starting state, i.e. the recorder 10 is running; the recorder 10 is in a shutdown state, i.e., the recorder 10 stops operating. The recorder 10 comprises a processor 11, a memory 12 and a control circuit of the recorder, wherein the processor 11 executes corresponding program instructions to record file data; the memory 12 is connected to the processor 11, and the processor 11 can read and write the memory 12, thereby storing the recorded file data in the memory 12.
The control circuit of the recorder comprises a control unit 13 and a switch 14, wherein a first end of the control unit 13 is connected with the processor 11 to receive signals sent by the processor 11, and a second end of the control unit 13 is connected with the memory 12 to realize reading and writing of the memory 12. A first end of the switch 14 is connected to the processor 11 for data transmission through the switch 14; a second end of the switch 14 is connected to the control unit 13 for data transmission through the switch 14; a third terminal of the switch 14 is connected to an external device 20 for data transmission via the switch 14.
For example, the external device 20 may be an evidence collection station, and the recorder 10 is connected to an evidence collection station circuit by using a data line, as shown in fig. 1, when the recorder 10 is in a power-on state, the switch 14 communicates the evidence collection station circuit with the processor 11, so that the evidence collection station circuit accesses the memory 12 through the processor 11, and then the evidence collection station circuit can read file data stored in the memory 12, so as to realize the evidence collection of the evidence collection station circuit.
As shown in fig. 2, when the recorder 10 is in a shutdown state, the recorder 10 does not generate a large amount of heat, and the switch 14 connects the evidence collection station circuit with the control unit 13, so that the evidence collection station circuit accesses the memory 12 through the control unit 13, and the evidence collection station circuit can read file data stored in the memory 12, thereby realizing the evidence collection of the evidence collection station circuit.
According to the scheme, the control circuit and the switch are arranged, the control circuit is connected with the processor and the memory, the first end of the switch is connected with the processor, the second end of the switch is connected with the control circuit, and the third end of the switch is connected with the external equipment; when the recorder is in a starting state, the switch communicates the external equipment with the processor, so that the external equipment can access the memory through the processor; when the recorder is in a shutdown state, the switch communicates the external equipment with the control circuit, the external equipment accesses the memory through the control circuit; according to the scheme, the external equipment is communicated with the control circuit through the switch, so that the external equipment accesses the memory through the control circuit when the recorder is in the shutdown state, evidence collection of the external equipment in the shutdown state of the recorder is realized, the working environment temperature is effectively reduced, and the service lives of components in the recorder and the external equipment are prolonged.
In an embodiment of the present application, the external device 20 includes a power supply circuit 21; the control unit 13 includes a controller 131 and a switch group 132; the first end of the controller 131 is connected to the memory 12, the second end of the controller 131 is connected to the switch 14, the third end of the controller 131 is connected to the first end of the switch set 132, the second end of the switch set 132 is connected to the power supply circuit 21, and the third end of the switch set 132 is connected to the processor 11; when the recorder 10 is in a power-on state, the switch group 132 receives a signal sent by the processor 11, and the switch group 132 is in a cut-off state so as to disconnect the power supply circuit 21 from the controller 131; when the recorder 10 is in the off state, the switch group 132 is in the on state, so that the power supply circuit 21 is connected with the controller 131.
Fig. 3 is a schematic circuit diagram of a control circuit in the embodiment of the present application, as shown in fig. 1, 2 and 3, the external device 20 includes a power supply circuit 21, where the power supply circuit 21 can supply power to the recorder 10, for example, the power supply circuit 21 may be a vusb_5v circuit, or any other circuit that can be implemented, and is not limited specifically. The control unit 13 comprises a controller 131 and a switch group 132, wherein a first end of the controller 131 is connected to the memory 12 for data transmission; a second terminal of the controller 131 is connected to the switch 14 for data transmission; the third end of the controller 131 is connected to the first end of the switch set 132 for data transmission; a second terminal of the switch set 132 is connected to the power supply circuit 21, and a third terminal of the switch set 132 is connected to the processor 11 to receive a signal sent by the processor 11, for example, the processor 11 may generate and send a control signal.
As shown in fig. 1, when the recorder 10 is in the on state, the processor 11 generates a control signal, for example, the control signal CS1 may be at a low level, and sends the control signal CS1 to the switch group 132, so that the switch group 132 is turned off, and the switch group 132 in the off state disconnects the power supply circuit 21 from the controller 131. The switch 14 communicates the external device 20 with the processor 11 so that the external device 20 can access the memory 12 through the processor 11.
As shown in fig. 2, when the recorder 10 is in the off state, the processor 11 does not generate a control signal, i.e. the control signal CS1 is suspended, so that the switch set 132 is turned on, the switch set 132 in the on state communicates the power supply circuit 21 with the controller 131, and the switch 14 communicates the external device 20 with the controller 131, so that the external device 20 can access the memory 12 through the controller 131.
In an embodiment of the present application, the external device 20 further includes a data circuit 22; the controller 131 is provided with a control interface 1311, and the control interface 1311 is connected to the switch 14; when the recorder 10 is in the off state, the power supply circuit 21 is connected with the controller 131, and the potential of the control interface 1311 is increased, so that the switch 14 communicates the data circuit 22 with the controller 131.
The external device 20 further includes a data circuit 22, where the data circuit 22 is configured to transmit data, for example, when the external device 20 collects file data in the memory 12, the data is transmitted through the data circuit 22; for another example, in some usage scenarios, when the external device 20 needs to perform services such as software parameter configuration and software version upgrade on the recorder 10, data transmission may also be implemented through the data circuit 22.
Fig. 4 is a schematic circuit diagram of a switch in the embodiment of the present application, as shown in fig. 3 and 4, the controller 131 is provided with a control interface 1311, the control interface 1311 is connected to the switch 14, for example, the switch 14 is provided with an S pin, and the control interface 1311 is connected to the S pin of the switch 14.
As shown in fig. 1, 3 and 4, when the recorder 10 is in the on state, the switch group 132 receives the control signal sent by the processor 11, the switch group 132 is turned off, and the switch group 132 in the off state disconnects the power supply circuit 21 from the controller 131. Further, the power supply circuit 21 does not supply power to the controller 131, and thus the S-foot of the switch 14 is pulled down to Ground (GND), and the switch 14 communicates the external device 20 with the processor 11.
As shown in fig. 2 to 4, when the recorder 10 is in the off state, the switch group 132 is in the on state to communicate the power supply circuit 21 with the controller 131. The power supply circuit 21 supplies power to the controller 131 so that the potential of the control interface 1311 is raised, the switch 14 receives a potential signal of the control interface 1311, and the data circuit 22 is communicated with the controller 131 so that the data circuit 22 accesses the memory 12 through the controller 131, thereby realizing data acquisition.
In an embodiment of the present application, the switch set 132 includes a first transistor 1321 and a second transistor 1322; a first terminal of the first transistor 1321 is connected to the processor 11, a second terminal of the first transistor 1321 is connected to the power supply circuit 21 and a first terminal of the second transistor 1322, and a third terminal of the first transistor 1321 is grounded; a second terminal of the second transistor 1322 is connected to the power supply circuit 21, and a third terminal of the second transistor 1322 is connected to the controller 131.
As shown in fig. 3, the switch group 132 includes a first transistor 1321 and a second transistor 1322, where the first transistor 1321 and the second transistor 1322 may be MOS transistors, such as P-type MOS transistors or N-type MOS transistors, or other transistors that can be implemented, and are not limited in particular. A first terminal of the first transistor 1321 is connected to the processor 11, so as to receive a signal sent by the processor 11; a second terminal of the first transistor 1321 is connected to the power supply circuit 21 and a first terminal of the second transistor 1322, and a third terminal of the first transistor 1321 is grounded; a second end of the second transistor 1322 is connected to the power supply circuit 21, a third end of the second transistor 1322 is connected to the controller 131, and by providing the first transistor 1321 and the second transistor 1322, the power supply circuit 21 is connected to and disconnected from the controller 131.
For example, as shown in fig. 1, 3 and 4, when the recorder 10 is in the on state, the first transistor 1321 receives the control signal sent by the processor 11, the first transistor 1321 and the second transistor 1322 are both turned off, and the first transistor 1321 and the second transistor 1322 in the off state disconnect the power supply circuit 21 from the controller 131. Further, the power supply circuit 21 does not supply power to the controller 131, and thus, the S leg of the switch 14 is pulled down to Ground (GND), and the switch 14 communicates the external device 20 with the processor 11.
As shown in fig. 2 to 4, when the recorder 10 is in the off state, the first transistor 1321 and the second transistor 1322 are both in the on state, so as to communicate the power supply circuit 21 with the controller 131. The power supply circuit 21 supplies power to the controller 131 so that the potential of the control interface 1311 is raised, the switch 14 receives a potential signal of the control interface 1311, and the data circuit 22 is communicated with the controller 131 so that the data circuit 22 accesses the memory 12 through the controller 131, thereby realizing data acquisition.
In an embodiment of the present application, the control circuit of the recorder further includes a power supply control circuit 15; when the recorder 10 is in the off state, the power supply control circuit 15 connects the power supply circuit 21 to the battery of the recorder 10.
As shown in fig. 1 and 2, the recorder 10 further includes a battery 16, and the control circuit of the recorder further includes a power supply control circuit 15. One end of the power supply control circuit 15 is connected to the power supply circuit 21, and the other end of the power supply control circuit 15 is connected to the battery 16. When the recorder 10 is in the off state, the power supply control circuit 15 communicates the power supply circuit 21 with the battery 16 of the recorder 10, so that the power supply circuit 21 charges the battery 16.
In an embodiment of the present application, the data circuit 22 is provided with a first protocol interface 221, the processor 11 is provided with a second protocol interface 111, and the controller 131 is provided with a third protocol interface 1312; the switch 14 is provided with a first transmission interface group 141, a second transmission interface group 142 and a third transmission interface group 143, wherein the first transmission interface group 141 is connected to the first protocol interface 221, the second transmission interface group 142 is connected to the second protocol interface 111, and the third transmission interface group 143 is connected to the third protocol interface 1312; when the recorder 10 is in a power-on state, the first transmission interface group 141 and the second transmission interface group 142 communicate the first protocol interface 221 with the second protocol interface 111, so that a preset authentication protocol is transmitted between the data circuit 22 and the processor 11, and the recorder 10 is powered off based on successful authentication; when the recorder 10 is in the off state, the first transmission interface group 141 and the third transmission interface group 143 communicate the first protocol interface 221 with the third protocol interface 1312, such that a preset authentication protocol is transferred between the data circuit 22 and the controller 131 to enable the data circuit 22 to access the memory 12 based on the authentication being successful.
As shown in fig. 3, the data circuit 21 is provided with a first protocol interface 221, such as usb_dp/usb_dm; the processor 11 is provided with a second protocol interface 111; the controller 131 is provided with a third protocol interface 1312, e.g., mcu_usb_dp/mcu_usb_dm.
As shown in fig. 4, the switch 14 is provided with a first transmission interface group 141, such as usb_dp/usb_dm; the switch 14 is further provided with a second transmission interface group 142, such as ap_usb_dp/ap_usb_dm; the switch 14 is also provided with a third set of transmission interfaces 143, e.g. mcu_usb_dp/mcu_usb_dm.
The first transmission interface group 141 is connected to the first protocol interface 221, so that data transmission is performed between the switch 14 and the data circuit 22; the second transmission interface group 142 is connected to the second protocol interface 111, so that data transmission is performed between the switch 14 and the processor 11; the third transmission interface group 143 is connected to the third protocol interface 1312 to enable data transmission between the switch 14 and the controller 131.
As shown in fig. 1, 3 and 4, when the recorder 10 is in the on state, that is, the recorder 10 is connected to the external device 20 through a data line in the on state. The first transistor 1321 receives the control signal sent by the processor 11, and the first transistor 1321 and the second transistor 1322 are turned off, and the first transistor 1321 and the second transistor 1322 in the turned-off state disconnect the power supply circuit 21 from the controller 131. The power supply circuit 21 does not supply power to the controller 131, and the power supply control circuit 15 communicates the power supply circuit 21 with the battery 16 of the recorder 10, so that the power supply circuit 21 charges the battery 16. And, the first transmission interface group 141 and the second transmission interface group 142 communicate the first protocol interface 221 with the second protocol interface 111 so that a preset authentication protocol can be transmitted between the data circuit 22 and the processor 11; for example, the preset authentication protocol includes authenticating the models of the recorder 10 and the external device 20, that is, the recorder 10 and the external device 20 belong to the same manufacturer; in other embodiments, the preset authentication protocol may be set according to actual use requirements, and is not limited in particular. Thus, based on successful authentication between the data circuit 22 and the processor 11, the data circuit 22 sends a shutdown instruction to the processor 11 to shutdown the recorder 10.
As shown in fig. 2 to 4, the first transistor 1321 and the second transistor 1322 of the recorder 10 after shutdown are both in an on state to communicate the power supply circuit 21 with the controller 131. The power supply circuit 21 supplies power to the controller 131 so that the potential of the control interface 1311 rises, the switch 14 receives a potential signal of the control interface 1311, and the data circuit 22 is communicated with the controller 131 so that the data circuit 22 accesses the memory 12 through the controller 131, thereby realizing data acquisition in the shutdown state of the recorder 10, and the power supply circuit 21 charges the battery 16 through the power supply control circuit 15. After the data acquisition is completed, the recorder 10 is disconnected from the external device 20, and the recorder 10 is automatically started.
In another embodiment, as shown in fig. 2 to 4, when the recorder 10 is in the off state, that is, the recorder 10 is connected to the external device 20 through a data line in the off state. The power supply control circuit 15 communicates the power supply circuit 21 with the battery 16 of the recorder 10, so that the power supply circuit 21 charges the battery 16. The first transistor 1321 and the second transistor 1322 are both in an on state to communicate the power supply circuit 21 with the controller 131. The power supply circuit 21 supplies power to the controller 131 so that the potential of the control interface 1311 increases, and the switch 14 receives a potential signal of the control interface 1311 to communicate the data circuit 22 with the controller 131. And, the first transmission interface group 141 and the third transmission interface group 143 communicate the first protocol interface 221 with the third protocol interface 1312 so that a preset authentication protocol can be transmitted between the data circuit 22 and the controller 131; for example, the preset authentication protocol includes authenticating the models of the recorder 10 and the external device 20, that is, the recorder 10 and the external device 20 belong to the same manufacturer; in other embodiments, the preset authentication protocol may be set according to actual use requirements, and is not limited in particular. Accordingly, based on successful authentication between the data circuit 22 and the controller 131, the data circuit 22 accesses the memory 12 through the controller 131, thereby realizing data acquisition in the off state of the recorder 10, and the power supply circuit 21 charges the battery 16 through the power supply control circuit 15. After the data acquisition is completed, the recorder 10 is disconnected from the external device 20, and the recorder 10 is automatically started.
In one embodiment of the present application, the controller 131 includes a micro-control unit.
It can be appreciated that the controller 131 includes a micro control unit (Microcontroller Unit, MCU), and when the recorder 10 is in the off state, the first transistor 1321 and the second transistor 1322 are both turned on, so as to connect the power supply circuit 21 to the MCU. The power supply circuit 21 supplies power to the MCU, so that the potential of the control interface 1311 of the MCU is increased, the switch 14 communicates the data circuit 22 with the MCU, the MCU automatically switches the disk mode, the memory 12 is mounted on the data circuit 22, and the data circuit 22 accesses the memory 12 through the MCU.
In an embodiment of the present application, control interface 1311 comprises a GPIO interface.
It will be appreciated that the control interface 1311 includes a General purpose input/output (GPIO) interface, and when the recorder 10 is in the off state, the first transistor 1321 and the second transistor 1322 are both turned on, so as to connect the power supply circuit 21 to the MCU. The power supply circuit 21 supplies power to the MCU, so that the GPIO interface potential of the MCU is raised, the switch 14 communicates the data circuit 22 with the MCU so that the data circuit 22 accesses the memory 12 through the MCU.
In one embodiment of the present application, the power control circuit 15 includes a PMIC.
It will be appreciated that the Power control circuit 15 includes a Power Management circuit (PMIC), and when the recorder 10 is in the off state, the first transistor 1321 and the second transistor 1322 are both turned on, so as to connect the Power supply circuit 21 to the MCU. The power supply circuit 21 supplies power to the MCU so that the potential of the control interface 1311 of the MCU rises, the switch 14 communicates the data circuit 22 with the MCU, the MCU automatically switches the disk mode, the memory 12 is mounted on the data circuit 22, and the data circuit 22 accesses the memory 12 through the MCU; meanwhile, the power supply circuit 21 charges the battery 16 of the recorder 10 through the PMIC.
The embodiment of the application also provides a recorder, which comprises a processor and a memory, wherein the memory is connected with the processor, and the recorder further comprises a control circuit of the recorder in the embodiment.
It will be appreciated by those skilled in the art that in the above-described method of the specific embodiments, the written order of steps is not meant to imply a strict order of execution but rather should be construed according to the function and possibly inherent logic of the steps.
The foregoing description of various embodiments is intended to highlight differences between the various embodiments, which may be the same or similar to each other by reference, and is not repeated herein for the sake of brevity.
In the several embodiments provided in this application, it should be understood that the disclosed methods and related devices may be implemented in other ways. For example, the above-described embodiments of related devices are merely illustrative, e.g., the division of modules or elements is merely a logical functional division, and there may be additional divisions of actual implementation, e.g., elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication disconnection between the illustrated or discussed elements may be through some interface, indirect coupling or communication disconnection of a device or element, electrical, mechanical, or other form.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in part or all or part of the technical solution contributing to the prior art or in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Claims (10)
1. A control circuit for a recorder, the recorder comprising a processor and a memory, the memory being connected to the processor, the control circuit comprising:
a control unit connected to the memory; and
the first end of the switch is connected with the processor, the second end of the switch is connected with the control unit, and the third end of the switch is connected with external equipment;
when the recorder is in a starting state, the switch communicates the external equipment with the processor, so that the external equipment accesses the memory through the processor;
when the recorder is in a shutdown state, the switch communicates the external equipment with the control unit, so that the external equipment accesses the memory through the control unit.
2. The control circuit of the recorder of claim 1, wherein the external device comprises a power supply circuit;
the control unit comprises a controller and a switch group;
the first end of the controller is connected with the memory, the second end of the controller is connected with the switch, the third end of the controller is connected with the first end of the switch group, the second end of the switch group is connected with the power supply circuit, and the third end of the switch group is connected with the processor;
when the recorder is in a starting state, the switch group receives signals sent by the processor, and the switch group disconnects the power supply circuit from the controller; when the recorder is in a shutdown state, the switch group conducts connection between the power supply circuit and the controller.
3. The control circuit of the recorder of claim 2, wherein the external device further comprises a data circuit;
the controller is provided with a control interface which is connected with the switch;
when the recorder is in a shutdown state, the power supply circuit is connected with the controller, and the potential of the control interface is increased, so that the switch is used for communicating the data circuit with the controller.
4. The control circuit of a recorder according to claim 2, wherein the switch group includes a first transistor and a second transistor;
a first end of the first transistor is connected to the processor, a second end of the first transistor is connected to the power supply circuit and a first end of the second transistor, and a third end of the first transistor is grounded;
the second end of the second transistor is connected to the power supply circuit, and the third end of the second transistor is connected to the controller.
5. The control circuit of the recorder according to claim 2, wherein the control circuit of the recorder further comprises a power supply control circuit;
when the recorder is in a shutdown state, the power supply control circuit is used for communicating the power supply circuit with a battery of the recorder.
6. A control circuit of a recorder according to claim 3, wherein the data circuit is provided with a first protocol interface, the processor is provided with a second protocol interface, and the controller is provided with a third protocol interface;
the switch is provided with a first transmission interface group, a second transmission interface group and a third transmission interface group, wherein the first transmission interface group is connected with the first protocol interface, the second transmission interface group is connected with the second protocol interface, and the third transmission interface group is connected with the third protocol interface;
when the recorder is in a starting-up state, the first transmission interface group and the second transmission interface group communicate the first protocol interface with the second protocol interface, so that a preset authentication protocol is transmitted between the data circuit and the processor, and the recorder is powered off after authentication is successful; or alternatively
When the recorder is in a shutdown state, the first transmission interface group and the third transmission interface group communicate the first protocol interface with the third protocol interface, so that a preset authentication protocol is transmitted between the data circuit and the controller, and the data circuit accesses the memory after authentication is successful.
7. The control circuit of a recorder according to claim 2, wherein the controller comprises a micro control unit.
8. A control circuit for a recorder according to claim 3, wherein the control interface comprises a GPIO interface.
9. The recorder control circuit according to claim 5, wherein the power control circuit comprises an integrated power management circuit.
10. A recorder comprising a processor and a memory, said memory being connected to said processor, characterized in that said recorder further comprises a control circuit of the recorder according to any of claims 1-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321971034.6U CN220457480U (en) | 2023-07-24 | 2023-07-24 | Control circuit of recorder and recorder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321971034.6U CN220457480U (en) | 2023-07-24 | 2023-07-24 | Control circuit of recorder and recorder |
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| Publication Number | Publication Date |
|---|---|
| CN220457480U true CN220457480U (en) | 2024-02-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321971034.6U Active CN220457480U (en) | 2023-07-24 | 2023-07-24 | Control circuit of recorder and recorder |
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| Country | Link |
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| CN (1) | CN220457480U (en) |
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