CN220399631U - Anti-interference electric energy pulse receiving circuit - Google Patents
Anti-interference electric energy pulse receiving circuit Download PDFInfo
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- CN220399631U CN220399631U CN202321858349.XU CN202321858349U CN220399631U CN 220399631 U CN220399631 U CN 220399631U CN 202321858349 U CN202321858349 U CN 202321858349U CN 220399631 U CN220399631 U CN 220399631U
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- 230000003139 buffering effect Effects 0.000 claims abstract description 5
- 238000012937 correction Methods 0.000 claims description 12
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Abstract
The utility model discloses an anti-interference electric energy pulse receiving circuit which comprises an optical coupler receiving module, a high-level anti-interference module, a low-level anti-interference module, an RC (resistor-capacitor) filtering module, a buffering waveform correcting module and an isolated power supply module, wherein the optical coupler receiving module receives output pulses and is sequentially connected with the high-level anti-interference module, the low-level anti-interference module, the RC filtering module and the buffering waveform correcting module. The scheme is that a high-level anti-interference module and a low-level anti-interference module are added between an optocoupler circuit and a buffer circuit and are respectively used for inhibiting a short low level at a high level and a short high level at a low level; after the two-stage anti-interference circuit is combined, fault tolerance in two level states is greatly enhanced, meanwhile, circuit power supply is based on an isolation power supply module, circuit power supply of a pulse receiving optocoupler output from an electric energy meter optocoupler to a calibrating device is separated from other circuits in the calibrating device, an LC decoupling circuit is added in the isolation power supply module, and interference suppression capability on a power line is enhanced.
Description
Technical Field
The utility model belongs to the field of electric energy meter verification, and particularly relates to an anti-interference electric energy pulse receiving circuit for electric energy meter verification.
Background
The electric energy meter can still guarantee the accuracy of voltage and current sampling under the electromagnetic interference environment, and the accurate calculation of the electric energy meter on the active power and the reactive power of the electric energy meter can be realized by the electric energy meter verification device, and further test and verification are required. Under the test requirement, whether the electric energy pulse signal can be accurately and reliably captured by the electric energy meter calibrating device is a key step of accurately calculating the current actual electric energy error. At present, two common receiving modes in the market, including a photoelectric sampling receiver and an optical coupler output, are considered to be electrically isolated from a voltage current signal applying interference, but when the device is specifically used, the original pulse attribute is still possibly changed by the interference signal, so that the error within 0.1% is immediately jumped to more than +10% and even far exceeds +100%, the output pulse signal is seriously interfered, and the direct reason is that in normal pulse, a new error pulse signal is superimposed, so that the electric energy meter verification device is understood to have more electric energy compared with the current reference power. This is particularly common in electrical fast transient pulse-burst electromagnetic compatibility experiments, which also becomes a challenge for electrical energy meters in the verification process to overcome.
The current common receiving circuit comprises three parts, namely an optocoupler receiving part, an RC filtering part and a buffering waveform correcting part, as shown in fig. 1; however, the current receiving circuit has the following problems:
the optocoupler output is in a non-conductive state, and the signal output to the ground is in a floating state at the moment, and is also the time when the error pulse from low to high is most easy to occur at the moment. By analyzing the common pulse group waveform, it can be found that the interference of 0.75mS for 75 continuous pulses at 100kHz is changed into a new error pulse about 1mS at the output end of the optocoupler (as shown in fig. 2) due to the concentration of energy comparison, and 15mS for 75 continuous pulses at 5kHz, but the pF-level capacitor at the output end of the optocoupler can be filtered out due to the dispersion of energy comparison;
in addition, when the on output of the optocoupler is high, a problem of dividing the normal pulse waveform (as shown in fig. 3) occurs after the superposition of relatively strong interference signals.
The above problems can partially suppress the current interference by fine tuning the constant of the RC, but can cause new problems, such as that the RC is increased at the same time, short mS-level high-level pulses at low level are effectively shielded, but the transition of low level is slowed down at the same time, so that the error accuracy of the pulses is affected, and in addition, low-level error signals carried in high level cannot be removed only by the RC.
Disclosure of Invention
In order to solve the technical defects in the prior art, the utility model provides an anti-interference electric energy pulse receiving circuit for electric energy meter verification.
The technical solution for realizing the purpose of the utility model is as follows:
an anti-interference electric energy pulse receiving circuit comprises an optical coupler receiving module, a high-level anti-interference module, a low-level anti-interference module, an RC filtering module, a buffering waveform correction module and an isolation power supply module;
the optical coupler receiving module receives the output pulse and is sequentially connected with the high-level anti-interference module, the low-level anti-interference module, the RC filter module and the buffer waveform correction module;
the isolation power supply module supplies power to the whole circuit.
Further, the optocoupler receiving module comprises a first light emitting diode, a first resistor, a second resistor, a first capacitor and a first phototransistor;
the positive electrode of the first light-emitting diode is connected with one end of an input pulse, the negative electrode of the first light-emitting diode is connected with one end of a first resistor, and the other end of the first resistor is connected with the other end of the input pulse;
the first phototransistor is arranged corresponding to the first light emitting diode, the collector electrode of the first phototransistor is connected with +5V voltage, the emitter electrode of the first phototransistor is connected with one end of the second resistor and one end of the first capacitor respectively, and the other ends of the second resistor and the first capacitor are grounded respectively;
the emitter of the first phototransistor is connected to a high-level anti-interference module.
Further, the high-level anti-interference module comprises a first diode, a fifth resistor and a third capacitor;
the anode of the first diode is connected with the optocoupler receiving module, the cathode of the first diode is respectively connected with one ends of the fifth resistor and the third capacitor, and the other ends of the fifth resistor and the third capacitor are respectively grounded;
the negative electrode of the first diode is also connected with the low-level anti-interference module.
Further, the low-level anti-interference module comprises a sixth resistor, a fourth capacitor and a first triode;
one end of the sixth resistor and the base electrode of the first triode are respectively connected with the high-level anti-interference module, the other end of the sixth resistor is connected with the emitting electrode of the first triode, and the collecting electrode of the first triode is grounded;
the emitter of the first triode is also connected with one end of a fourth capacitor, and the other end of the fourth capacitor is grounded;
the other end of the sixth resistor is connected with the buffer waveform correction module.
Further, the buffer waveform correction module comprises a first NOT gate and a second NOT gate;
the input end of the first NOT gate is connected with the low-level anti-interference module, and the output end of the first NOT gate is connected with the input end of the filtering module;
the input end of the second NOT gate is connected with the output end of the filtering module, and the output end of the second NOT gate outputs a pulse signal.
Further, the RC filter module comprises a third resistor and a second capacitor;
one end of the third resistor is connected with the output end of the first NOT gate, and the other end of the third resistor is simultaneously connected with one end of the second capacitor and the input end of the second NOT gate;
the other end of the second capacitor is grounded.
Further, an LC decoupling circuit is arranged in the isolation power supply module.
Compared with the prior art, the utility model has the remarkable advantages that:
the high-level anti-interference module and the low-level anti-interference module are added between the optocoupler circuit and the buffer circuit and are respectively used for inhibiting the short low level at the high level and the short high level at the low level; after the two-stage anti-interference circuit is combined, the fault tolerance of the two level states is greatly enhanced; further such that the overall pulse duration total error is controlled to within 500 uS; in addition, as the total error of the consistency of the rising edge and the falling edge is within 10uS, and the pulse with the period of 100mS is taken as an example, the additional error which is newly added is 0.01%, the actual test requirement can be met, and the timeliness and the accuracy of the calculation of the electric energy error are ensured in a relatively economical hardware processing mode as a whole;
meanwhile, the power supply is based on an isolation power supply module, circuit power supply of a pulse receiving optocoupler output from an electric energy meter optocoupler to a verification device is separated from other circuits in the device, and meanwhile an LC decoupling circuit is added in the isolation power supply module, so that interference suppression capability on a power line is enhanced.
The utility model is described in further detail below with reference to the drawings and the detailed description.
Drawings
Fig. 1 is a schematic diagram of a pulse receiving circuit in the prior art.
Fig. 2 is a waveform diagram of a low level disturbed based on a conventional pulse receiving circuit.
Fig. 3 is a schematic waveform diagram of a high level disturbed based on a conventional pulse receiving circuit.
Fig. 4 is a schematic diagram of an anti-interference power pulse receiving circuit according to the present utility model.
Fig. 5 is a schematic diagram of a high-level interference pulse improvement waveform of an anti-interference power pulse receiving circuit according to the present utility model.
Fig. 6 is a schematic diagram of a low-level interference pulse improvement waveform of an anti-interference power pulse receiving circuit according to the present utility model.
Detailed Description
It is easy to understand that various embodiments of the present utility model can be envisioned by those of ordinary skill in the art without altering the true spirit of the present utility model in light of the present teachings. Accordingly, the following detailed description and drawings are merely illustrative of the utility model and are not intended to be exhaustive or to limit or restrict the utility model. Rather, these embodiments are provided so that this disclosure will be thorough and complete by those skilled in the art. Preferred embodiments of the present utility model are described in detail below with reference to the attached drawing figures, which form a part of the present application and are used in conjunction with embodiments of the present utility model to illustrate the innovative concepts of the present utility model.
Examples
Referring to fig. 3, an anti-interference power pulse receiving circuit includes an optocoupler receiving module, a high-level anti-interference module, a low-level anti-interference module, an RC filtering module, a buffered waveform correction module and an isolated power supply module;
the optical coupler receiving module receives the output pulse and is sequentially connected with the high-level anti-interference module, the low-level anti-interference module, the RC filter module and the buffer waveform correction module;
the isolation power supply module supplies power to the whole circuit.
Further, the optocoupler receiving module comprises a first light emitting diode LED1, a first resistor R1, a second resistor R2, a first capacitor C1, and a first phototransistor X1;
the positive electrode of the first light emitting diode LED1 is connected with one end of an input pulse, the negative electrode of the first light emitting diode LED1 is connected with one end of a first resistor R1, and the other end of the first resistor R1 is connected with the other end of the input pulse;
the first phototransistor X1 is arranged corresponding to the first light emitting diode LED1, the collector electrode of the first phototransistor X1 is connected with +5V voltage, the emitter electrode of the first phototransistor X1 is connected with one end of the second resistor R2 and one end of the first capacitor C1 respectively, and the other ends of the second resistor R2 and the first capacitor C1 are grounded respectively;
the emitter of the first phototransistor X1 is connected to a high-level anti-tamper module.
Based on the output pulse of the photoelectric sampler received by the optical coupler receiving module, or the electric signal output by the electric energy meter optical coupler,
Further, the high-level anti-interference module comprises a first diode D1, a fifth resistor R5 and a third capacitor C3;
the anode of the first diode D1 is connected with the optocoupler receiving module, the cathode of the first diode D1 is respectively connected with one ends of the fifth resistor R5 and the third capacitor C3, and the other ends of the fifth resistor R5 and the third capacitor C3 are respectively grounded;
the negative electrode of the first diode D1 is also connected with a low-level anti-interference module.
The high-level anti-interference module combines the single-phase conduction of the first diode D1 and the energy storage characteristic of the third capacitor C3, so that when the pulse is in a high-level state, the high-level of the pulse cannot drop to a low level due to a short low level; the circuit finally causes the high level to be switched to the low level to require a fixed time delay T1, the energy stored by the third capacitor C3 is gradually released through the fifth resistor R5 connected in parallel in the time period, and the T1 can be controlled within 2mS by fine tuning the values of the fifth resistor R5 and the third capacitor C3;
further, the low-level anti-interference module comprises a sixth resistor R6, a fourth capacitor C4 and a first triode Q1;
one end of the sixth resistor R6 and the base electrode of the first triode Q1 are respectively connected with the high-level anti-interference module, the other end of the sixth resistor R6 is connected with the emitter electrode of the first triode Q1, and the collector electrode of the first triode Q1 is grounded;
the emitter of the first triode Q1 is also connected with one end of a fourth capacitor C4, and the other end of the fourth capacitor C4 is grounded;
the other end of the sixth resistor R6 is connected with the buffer waveform correction module.
In the low-level anti-interference module, the sixth resistor R6 and the fourth capacitor C4 are helpful for short-time high level in low level, the threshold switched to high level cannot be charged, and in addition, the PNP first triode Q1 is added to help timely remove the memory of the fourth capacitor C4 caused by false jitter;
independently, the low-level anti-interference module guarantees that a short high level cannot cause newly added error pulses with a certain response delay T2, and the T2 can be controlled within 2mS through fine adjustment of the sixth resistor R6 and the fourth capacitor C4.
Further, the buffered waveform correction module includes a first not gate X2, a second not gate X3;
the input end of the first NOT gate X2 is connected with the low-level anti-interference module, and the output end of the first NOT gate X2 is connected with the input end of the RC filter module;
the input end of the second NOT gate X3 is connected with the output end of the RC filter module, and the output end of the second NOT gate X3 outputs a pulse signal.
Further, the RC filter module comprises a third resistor R3 and a second capacitor C2;
one end of the third resistor R3 is connected with the output end of the first NOT gate X2, and the other end of the third resistor R3 is simultaneously connected with one end of the second capacitor C2 and the input end of the second NOT gate X3;
the other end of the second capacitor C2 is grounded.
Further, referring to fig. 4, the isolated power supply module cuts off the interfered optocoupler output loop based on +5v voltage on one hand and the ground loop which is common to the main board, and an LC decoupling circuit is arranged in the isolated power supply module to further filter the interference signal from the power network;
on the other hand, +5VISO is output and is input to the pulsein+ of the optical coupler receiving module to supply power for the main circuit of the pulse receiving circuit;
in general, the scheme of the application uses the optocoupler receiving module to receive the output pulse of the photoelectric sampler, or the electric signal output by the optocoupler of the electric energy meter is output to the ground and filtered by adopting RC parallel connection;
and after being processed by the high-level anti-interference module and the low-level anti-interference module, the processed signals finally go to the MCU through the two-stage NOT buffer shaping circuit.
After the two-stage anti-interference circuit is combined, fault tolerance in two level states is greatly enhanced, as shown in fig. 5, when the input LED of the optocoupler is not conductive (pulsein+ =0v), and the output is low level (v1=0v), because the high level signal with the length of 998uS appears in the middle of the low level due to external interference, the final output is still low level signal (pulseout=0v) through the low level anti-interference circuit. In contrast, if the low-level anti-interference circuit is not passed, it can be observed in fig. 2 that the final pulse output appears as a synchronized high-level signal (pulseout=5v); as shown in fig. 6, during the time when the optocoupler input LED is on (pulsein+=5v) and the output is high (v1=5v), the final output is still high (pulseout=5v) through the high-level anti-interference circuit because the external interference causes a low signal up to 1001uS in the middle of the low level, and similarly, if the high-level anti-interference circuit is not passed, it can be observed that the final pulse output is synchronous with the low-level signal (pulseout=0v) in fig. 3. The two-stage combining circuit has delay to switch high level, and the total pulse duration error is controlled to be within 500uS in the comprehensive view. In general, the anti-interference circuit can provide the function of restoring the original pulse under the condition of mixing the interference waveform, and has the advantages of timely response and meeting certain precision requirements.
The foregoing embodiments illustrate and describe the basic principles, principal features of the utility model. It will be understood by those skilled in the art that the present utility model is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present utility model, and various changes and modifications may be made without departing from the spirit and scope of the utility model, which is defined in the appended claims.
Claims (7)
1. The anti-interference electric energy pulse receiving circuit is characterized by comprising an optical coupler receiving module, a high-level anti-interference module, a low-level anti-interference module, an RC filtering module, a buffering waveform correction module and an isolation power supply module;
the optical coupler receiving module receives the output pulse and is sequentially connected with the high-level anti-interference module, the low-level anti-interference module, the RC filter module and the buffer waveform correction module;
the isolation power supply module supplies power to the whole circuit.
2. The anti-interference power pulse receiving circuit according to claim 1, wherein the optocoupler receiving module comprises a first light emitting diode (LED 1), a first resistor (R1), a second resistor (R2), a first capacitor (C1), a first phototransistor (X1);
the positive electrode of the first light-emitting diode (LED 1) is connected with one end of an input pulse, the negative electrode of the first light-emitting diode is connected with one end of a first resistor (R1), and the other end of the first resistor (R1) is connected with the other end of the input pulse;
the first phototransistor (X1) is arranged corresponding to the first light emitting diode (LED 1), the collector electrode of the first phototransistor is connected with +5V voltage, the emitter electrode of the first phototransistor is connected with one end of the second resistor (R2) and one end of the first capacitor (C1), and the other ends of the second resistor (R2) and the first capacitor (C1) are grounded respectively;
an emitter of the first phototransistor (X1) is connected to a high-level anti-tamper module.
3. The anti-interference power pulse receiving circuit according to claim 1, wherein the high-level anti-interference module comprises a first diode (D1), a fifth resistor (R5) and a third capacitor (C3);
the positive electrode of the first diode (D1) is connected with the optocoupler receiving module, the negative electrode of the first diode (D1) is respectively connected with one ends of the fifth resistor (R5) and the third capacitor (C3), and the other ends of the fifth resistor (R5) and the third capacitor (C3) are respectively grounded;
the negative electrode of the first diode (D1) is also connected with a low-level anti-interference module.
4. The anti-interference power pulse receiving circuit according to claim 1, wherein the low-level anti-interference module comprises a sixth resistor (R6), a fourth capacitor (C4), and a first triode (Q1);
one end of the sixth resistor (R6) and the base electrode of the first triode (Q1) are respectively connected with the high-level anti-interference module, the other end of the sixth resistor (R6) is connected with the emitting electrode of the first triode (Q1), and the collecting electrode of the first triode (Q1) is grounded;
the emitter of the first triode (Q1) is also connected with one end of a fourth capacitor (C4), and the other end of the fourth capacitor (C4) is grounded;
the other end of the sixth resistor (R6) is connected with the buffer waveform correction module.
5. The anti-jamming power pulse receiving circuit according to claim 1, wherein the buffered waveform correction module comprises a first not gate (X2), a second not gate (X3);
the input end of the first NOT gate (X2) is connected with the low-level anti-interference module, and the output end of the first NOT gate (X2) is connected with the input end of the RC filter module;
the input end of the second NOT gate (X3) is connected with the output end of the RC filter module, and the output end of the second NOT gate (X3) outputs a pulse signal.
6. The anti-jamming power pulse receiving circuit according to claim 5, wherein the RC filtering module comprises a third resistor (R3) and a second capacitor (C2);
one end of the third resistor (R3) is connected with the output end of the first NOT gate (X2), and the other end of the third resistor (R3) is simultaneously connected with one end of the second capacitor (C2) and the input end of the second NOT gate (X3);
the other end of the second capacitor (C2) is grounded.
7. The anti-interference power pulse receiving circuit according to claim 1, wherein an LC decoupling circuit is provided in the isolated power supply module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321858349.XU CN220399631U (en) | 2023-07-14 | 2023-07-14 | Anti-interference electric energy pulse receiving circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321858349.XU CN220399631U (en) | 2023-07-14 | 2023-07-14 | Anti-interference electric energy pulse receiving circuit |
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| CN220399631U true CN220399631U (en) | 2024-01-26 |
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| CN202321858349.XU Active CN220399631U (en) | 2023-07-14 | 2023-07-14 | Anti-interference electric energy pulse receiving circuit |
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- 2023-07-14 CN CN202321858349.XU patent/CN220399631U/en active Active
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