CN220322385U - Vehicle navigation system for PVM visual quick parking based on CXD4960 - Google Patents

Vehicle navigation system for PVM visual quick parking based on CXD4960 Download PDF

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Publication number
CN220322385U
CN220322385U CN202321762086.2U CN202321762086U CN220322385U CN 220322385 U CN220322385 U CN 220322385U CN 202321762086 U CN202321762086 U CN 202321762086U CN 220322385 U CN220322385 U CN 220322385U
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chip
unit
respectively connected
raa2788423
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孙青�
丁永
倪红兵
陆云山
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Yangzhou Hangsheng Technology Co ltd
Shenzhen Hangsheng Electronic Co Ltd
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Yangzhou Hangsheng Technology Co ltd
Shenzhen Hangsheng Electronic Co Ltd
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Abstract

The utility model discloses a vehicle-mounted navigation system for visual quick parking of PVM based on CXD4960 in the field of vehicle-mounted navigation, which comprises a digital video conversion unit, wherein the digital video conversion unit is respectively connected with a PVM digital video box unit and a video processing unit, the PVM digital video box unit is respectively connected with a camera group and a control local area network (CAN) unit, the control local area network CAN unit is connected with an MCU unit, the MCU unit is respectively connected with a digital video conversion unit and an SOC unit, the SOC unit is connected with an audio decoding unit, the audio decoding unit is connected with a microphone, and the video processing unit is respectively connected with a storage FLASH unit and a TFT display unit; the MIPI signal is processed into LVDS signal by the video processing unit and transmitted to the TFT display unit, so that PVM visual fast parking can be realized on the automobile through the vehicle-mounted multimedia navigation system.

Description

Vehicle navigation system for PVM visual quick parking based on CXD4960
Technical Field
The utility model relates to a visual fast parking vehicle navigation system in the vehicle navigation field.
Background
The automobile has a plurality of visual field blind areas in the automobile parking process, so that traffic accidents can be easily caused in the automobile parking process by a driver. At present, a driver mainly depends on a reversing mode to finish parking in an intuitive mode of reversing an auxiliary line, reversing an image and warning sound. In recent years, with the rapid development of computer, network, image processing and transmission technologies, parking assist technologies have also been developed rapidly. Parking in the market is mainly performed in the following ways: 1. a reverse radar, a single camera CVBS analog video signal realizes the panorama of a common parking auxiliary line display picture 2.360, 4 camera signals are respectively input into a host computer through the CVBS analog signal, then video decoding is carried out by the host computer to realize the vehicle parking auxiliary display picture 3. PVM digital panorama, the cameras combine the images of the 4 cameras through a PVM video box unit, and then digital video signals GVAF are transmitted to the host computer to carry out video decoding to realize the vehicle parking auxiliary display picture and video. The first mode is more traditional, and the rear of the vehicle can be monitored only through a rear camera of the vehicle. In the second mode, the panorama can be realized by inputting 4 cameras, but after the 4 paths of CVBS video inputs are independently processed and then decoded, the input circuit is easy to be distorted by transmission or system interference on the vehicle and the navigation host.
Disclosure of Invention
The utility model aims to provide a vehicle-mounted navigation system for visual quick parking of PVM based on CXD4960, which can realize visual quick parking and effectively improve the problems of image transmission distortion and interference.
In order to achieve the above purpose, the utility model provides a vehicle navigation system for visual quick parking of PVM based on CXD4960, which comprises a digital video conversion unit, wherein the digital video conversion unit is respectively connected with a PVM digital video box unit and a video processing unit, the PVM digital video box unit is respectively connected with a camera group and a control local area network CAN unit, the control local area network CAN unit is connected with an MCU unit, the MCU unit is respectively connected with a digital video conversion unit and an SOC unit, the SOC unit is connected with an audio decoding unit, the audio decoding unit is connected with a microphone, and the video processing unit is respectively connected with a storage FLASH unit and a TFT display unit.
Compared with the prior art, the system has the beneficial effects that the system transmits information to the MCU unit through the SOC unit through serial port communication, the MCU unit is communicated with the digital video conversion unit and the video processing unit, the GVGF interface transmits the incoming digital video signal, the digital video conversion unit converts and outputs the MIPI signal, the video processing unit processes the MIPI signal into the LVDS signal and transmits the LVDS signal to the TFT display unit, and PVM visual quick parking on an automobile through the vehicle-mounted multimedia navigation system can be realized.
As a further improvement of the utility model, the digital conversion unit comprises a CXD4960GG chip, the PVM digital video box unit comprises a plug-in J6, the video processing unit comprises a RAA2788423 chip, and the MCU unit comprises an R7F7015873AFP chip; the A4 pin and the A5 pin of the CXD4960GG chip are connected and connected with the No. 3 pin of the plug-in J6, and the A6 pin and the A7 pin of the CXD4960GG chip are connected and connected with the No. 4 pin of the plug-in J6; the G8 pin and the F7 pin of the CXD4960GG chip are respectively connected with the No. 26 pin and the No. 27 pin of the R7F7015873AFP chip, and the A2 pin and the H3 pin of the CXD4960GG chip are respectively connected with the No. 160 pin and the No. 150 pin of the R7F7015873AFP chip;
the pin D1 and the pin D2 of the CXD4960GG chip are respectively connected with the pin 54 and the pin 55 of the RAA2788423 chip, the pin B1 and the pin B2 of the CXD4960GG chip are respectively connected with the pin 46 and the pin 47 of the RAA2788423 chip, the pin C1 and the pin C2 of the CXD4960GG chip are respectively connected with the pin 48 and the pin 49 of the RAA2788423 chip, the pin E1 and the pin E2 of the CXD4960GG chip are respectively connected with the pin 50 and the pin 51 of the RAA2788423 chip, and the pin F1 and the pin F2 of the CXD4960GG chip are respectively connected with the pin 52 and the pin 53 of the RAA2788423 chip.
The PVM video box unit is connected with the GVAF digital video interface and is used for transmitting digital video signals to the GVAF 2 digital video conversion unit, and the GVAF 2 digital video conversion unit is connected with the GVAF interface and is used for receiving output signals of the PVM video box unit, converting the digital video signals into MIPI signals and transmitting the MIPI signals; the video decoding chip RAA2788423HFP is connected with the GVGIF 2 digital video conversion unit and is used for receiving and decoding the MIPI signal output by the GVGIF 2 digital video conversion unit and other video signals in the navigation system.
As a further improvement of the utility model, the TFT display unit comprises a display screen plug-in J3, pins 92 and 91 of the RAA2788423 chip are respectively connected with pins 38 and 37 of the display screen plug-in J3, pins 90 and 89 of the RAA2788423 chip are respectively connected with pins 35 and 34 of the display screen plug-in J3, pins 87 and 86 of the RAA2788423 chip are respectively connected with pins 32 and 31 of the display screen plug-in J3, pins 84 and 83 of the RAA2788423 chip are respectively connected with pins 29 and 28 of the display screen plug-in J3, and pins 82 and 81 of the RAA2788423 chip are respectively connected with pins 26 and 25 of the display screen plug-in J3;
the No. 79 pin and the No. 78 pin of the RAA2788423 chip are respectively connected with the No. 23 pin and the No. 22 pin of the display screen plug-in J3, the No. 77 pin and the No. 76 pin of the RAA2788423 chip are respectively connected with the No. 20 pin and the No. 19 pin of the display screen plug-in J3, the No. 74 pin and the No. 73 pin of the RAA2788423 chip are respectively connected with the No. 17 pin and the No. 16 pin of the display screen plug-in J3, the No. 71 pin and the No. 70 pin of the RAA2788423 chip are respectively connected with the No. 24 pin and the No. 23 pin of the display screen plug-in J3, and the No. 59 pin and the No. 68 pin of the RAA2788423 chip are respectively connected with the No. 11 pin and the No. 10 pin of the display screen plug-in J3.
Thus, the LVDS signals decoded by the RAA2788423 chip are transmitted to a display screen of the vehicle navigation, and PVM visual quick parking is carried out.
As a further improvement of the utility model, the control local area network CAN unit comprises a TJA1044VT chip, the PVM digital video box unit further comprises an interface J54, pin 1, pin 4 and pin 8 of the TJA1044VT chip are respectively connected with pin 152, pin 153 and pin 119 of the R7F7015873AFP chip, and pin 6 and pin 7 of the TJA1044VT chip are respectively connected with pin 26 and pin 27 of the interface J54; the camera group has set up four cameras, and the positive pole of four cameras links to each other with 17 No. foot, 18 No. foot, 19 No. foot and the 20 No. foot of interface J54 respectively, and the negative pole of four cameras links to each other with 37 No. foot, 38 No. foot, 39 No. foot and the 40 No. foot of interface J54 respectively.
Therefore, the camera group is connected with the PVM video box unit and is used for collecting a plurality of camera signals and transmitting the camera signals to the PVM video box unit, so that the problems of image transmission distortion and interference are effectively solved.
As a further improvement of the utility model, the memory FLASH unit comprises a W25Q16JVSSAQ chip, a pin 65 of the RAA2788423 chip is connected with a pin 5 of the W25Q16JVSSAQ chip, a pin 64 of the RAA2788423 chip is connected with a pin 2 of the W25Q16JVSSAQ chip, a pin 63 of the RAA2788423 chip is connected with a pin 3 of the W25Q16JVSSAQ chip, a pin 62 of the RAA2788423 chip is connected with a pin 7 of the W25Q16JVSSAQ chip, a pin 61 of the RAA2788423 chip is connected with a pin 1 of the W25Q16JVSSAQ chip, and a pin 59 of the RAA2788423 chip is connected with a pin 6 of the W25Q16JVSSAQ chip.
Thus, the information (the speaking information and the car position image information when the car is reversed) in the storage unit can be read at any time.
As a further improvement of the utility model, the SOC unit comprises a MX8DXP chip, a Y32 pin and a Y34 pin of the MX8DXP chip are respectively connected with a No. 3 pin and a No. 6 pin of the R7F7015873AFP chip, an AA35 pin and an AA33 pin of the MX8DXP chip are respectively connected with a No. 7 pin and a No. 12 pin of the R7F7015873AFP chip, and an AD34 pin and an AC35 pin of the MX8DXP chip are respectively connected with a No. 29 pin and a No. 28 pin of the R7F7015873AFP chip.
Therefore, the control and signal transmission of the display and touch control driving unit can be realized, and the vehicle-mounted information is transmitted to the MCU through serial port communication.
As a further improvement of the present utility model, the audio decoding unit includes an SAF775CHN chip, the A50 pin and the A51 pin of the SAF775CHN chip are connected to the microphone, the B31 pin and the A36 pin of the SAF775CHN chip are connected to the L35 pin and the N35 pin of the MX8DXP chip, the A29 pin of the SAF775CHN chip is connected to the E33 pin of the MX8DXP chip, the R35 pin of the SAF775CHN chip is connected to the C30 pin of the MX8DXP chip, and the P30 pin, the P34 pin and the R31 pin of the SAF775CHN chip are connected to the B26 pin and the C25 pin and the A29 pin of the MX8DXP chip, respectively.
Thus, the audio decoding unit is electrically connected with the microphone, the audio decoding unit is SAF775CHN, and is communicated with the SOC through SPI, the analog input signal of the MIC is decoded into an I2S digital signal, and the I2S digital signal is electrically connected with the SOC, so that the acquisition, decoding and stable transmission of microphone voice control information are realized.
Drawings
Fig. 1 is a schematic block diagram of the overall system of the present utility model.
Fig. 2 is a schematic block diagram of the PVM video processing procedure of the present utility model.
Fig. 3 is a schematic diagram of an interface circuit of a PVM video box according to the present utility model.
Fig. 4 is a schematic diagram of the gv if video input interface of the digital video box unit according to the present utility model.
Fig. 5 is a circuit diagram of CXD4960 gfif 2 digital video conversion according to the present utility model.
Fig. 6 is a circuit diagram of digital video decoding according to the present utility model.
Fig. 7 is a schematic diagram of a memory FLASH unit circuit according to the present utility model.
Fig. 8 is a schematic diagram of the output of parity dual LVDS to a display device according to the present utility model.
Fig. 9 is a schematic circuit diagram of an MCU unit according to the present utility model.
FIG. 10 is a schematic diagram of a CAN unit circuit of the utility model.
FIG. 11 is a schematic diagram of a serial connection circuit of an SOC unit and an MCU unit according to the present utility model.
FIG. 12 is a schematic diagram of the MIC input circuit of the audio processing decoding unit of the present utility model.
FIG. 13 is a schematic diagram of an audio processing decoding unit and SPI communication circuit of an SOC unit and an I2S audio electrical connection.
Description of the embodiments
The utility model is further described below with reference to the accompanying drawings:
the vehicle-mounted navigation system for visual quick parking of PVM based on CXD4960 shown in the figures 1-13 comprises a digital video conversion unit, wherein the digital video conversion unit is respectively connected with a PVM digital video box unit and a video processing unit, the PVM digital video box unit is respectively connected with a camera group and a control local area network CAN unit, the control local area network CAN unit is connected with an MCU unit, the MCU unit is respectively connected with a digital video conversion unit and an SOC unit, the SOC unit is connected with an audio decoding unit, the audio decoding unit is connected with a microphone, and the video processing unit is respectively connected with a storage FLASH unit and a TFT display unit.
The digital conversion unit comprises a CXD4960GG chip, the PVM digital video box unit comprises a plug-in J6, the video processing unit comprises a RAA2788423 chip, and the MCU unit comprises an R7F7015873AFP chip; the A4 pin and the A5 pin of the CXD4960GG chip are connected and connected with the No. 3 pin of the plug-in J6, and the A6 pin and the A7 pin of the CXD4960GG chip are connected and connected with the No. 4 pin of the plug-in J6; the G8 pin and the F7 pin of the CXD4960GG chip are respectively connected with the No. 26 pin and the No. 27 pin of the R7F7015873AFP chip, and the A2 pin and the H3 pin of the CXD4960GG chip are respectively connected with the No. 160 pin and the No. 150 pin of the R7F7015873AFP chip.
The pin D1 and the pin D2 of the CXD4960GG chip are respectively connected with the pin 54 and the pin 55 of the RAA2788423 chip, the pin B1 and the pin B2 of the CXD4960GG chip are respectively connected with the pin 46 and the pin 47 of the RAA2788423 chip, the pin C1 and the pin C2 of the CXD4960GG chip are respectively connected with the pin 48 and the pin 49 of the RAA2788423 chip, the pin E1 and the pin E2 of the CXD4960GG chip are respectively connected with the pin 50 and the pin 51 of the RAA2788423 chip, and the pin F1 and the pin F2 of the CXD4960GG chip are respectively connected with the pin 52 and the pin 53 of the RAA2788423 chip.
The TFT display unit comprises a display screen plug-in J3, a 92 pin and a 91 pin of a RAA2788423 chip are respectively connected with a 38 pin and a 37 pin of the display screen plug-in J3, a 90 pin and a 89 pin of the RAA2788423 chip are respectively connected with a35 pin and a 34 pin of the display screen plug-in J3, a 87 pin and a 86 pin of the RAA2788423 chip are respectively connected with a 32 pin and a 31 pin of the display screen plug-in J3, a 84 pin and a 83 pin of the RAA2788423 chip are respectively connected with a29 pin and a 28 pin of the display screen plug-in J3, and a 82 pin and a 81 pin of the RAA2788423 chip are respectively connected with a 26 pin and a 25 pin of the display screen plug-in J3.
The No. 79 pin and the No. 78 pin of the RAA2788423 chip are respectively connected with the No. 23 pin and the No. 22 pin of the display screen plug-in J3, the No. 77 pin and the No. 76 pin of the RAA2788423 chip are respectively connected with the No. 20 pin and the No. 19 pin of the display screen plug-in J3, the No. 74 pin and the No. 73 pin of the RAA2788423 chip are respectively connected with the No. 17 pin and the No. 16 pin of the display screen plug-in J3, the No. 71 pin and the No. 70 pin of the RAA2788423 chip are respectively connected with the No. 24 pin and the No. 23 pin of the display screen plug-in J3, and the No. 59 pin and the No. 68 pin of the RAA2788423 chip are respectively connected with the No. 11 pin and the No. 10 pin of the display screen plug-in J3.
The control local area network CAN unit comprises a TJA1044VT chip, the PVM digital video box unit also comprises an interface J54, the No. 1 pin, the No. 4 pin and the No. 8 pin of the TJA1044VT chip are respectively connected with the No. 152 pin, the No. 153 pin and the No. 119 pin of the R7F7015873AFP chip, and the No. 6 pin and the No. 7 pin of the TJA1044VT chip are respectively connected with the No. 26 pin and the No. 27 pin of the interface J54; the camera group has set up four cameras, and the positive pole of four cameras links to each other with 17 No. foot, 18 No. foot, 19 No. foot and the 20 No. foot of interface J54 respectively, and the negative pole of four cameras links to each other with 37 No. foot, 38 No. foot, 39 No. foot and the 40 No. foot of interface J54 respectively.
The FLASH memory unit comprises a W25Q16JVSSAQ chip, a 65 pin of a RAA2788423 chip is connected with a5 pin of the W25Q16JVSSAQ chip, a 64 pin of a RAA2788423 chip is connected with a2 pin of the W25Q16JVSSAQ chip, a 63 pin of the RAA2788423 chip is connected with a3 pin of the W25Q16JVSSAQ chip, a 62 pin of the RAA2788423 chip is connected with a7 pin of the W25Q16JVSSAQ chip, a 61 pin of the RAA2788423 chip is connected with a1 pin of the W25Q16JVSSAQ chip, and a 59 pin of the RAA2788423 chip is connected with a6 pin of the W25Q16JVSSAQ chip.
The SOC unit comprises an MX8DXP chip, a Y32 pin and a Y34 pin of the MX8DXP chip are respectively connected with a No. 3 pin and a No. 6 pin of the R7F7015873AFP chip, an AA35 pin and an AA33 pin of the MX8DXP chip are respectively connected with a No. 7 pin and a No. 12 pin of the R7F7015873AFP chip, and an AD34 pin and an AC35 pin of the MX8DXP chip are respectively connected with a No. 29 pin and a No. 28 pin of the R7F7015873AFP chip.
The audio decoding unit comprises an SAF775CHN chip, wherein an A50 pin and an A51 pin of the SAF775CHN chip are connected with a microphone, a B31 pin and an A36 pin of the SAF775CHN chip are respectively connected with an L35 pin and an N35 pin of a MX8DXP chip, an A29 pin of the SAF775CHN chip is connected with an E33 pin of the MX8DXP chip, an R35 pin of the SAF775CHN chip is connected with a C30 pin of the MX8DXP chip, and a P30 pin, a P34 pin and an R31 pin of the SAF775CHN chip are respectively connected with a B26 pin, a C25 pin and an A29 pin of the MX8DXP chip.
In the utility model, the PVM video box unit is connected with the camera module and the CXD4960 GVAF 2 digital video conversion unit and is used for receiving video signals collected by the camera, processing information collected by the camera into GVAF digital signals and transmitting the GVAF digital signals to the CXD4960 GVAF 2 digital video converter. The function of video signals is realized and transmitted.
The camera module is connected with the PVM video box unit and is used for collecting video analog signals and realizing the function of collecting front-end video images and video information.
The CXD4960 GVAF 2 digital video conversion unit and the PVM video box unit are connected with the RAA2788423HF video processing unit. The digital video signals transmitted by the GVGF interface from the PVM video box unit are converted by the GVGF 2 digital video conversion unit and output to the RAA2788423HF video processing unit.
The RAA2788423HF video processing unit and the CXD4960 GVAF 2 digital video conversion unit are connected with a display screen. The MIPI signal is processed into LVDS signals through the video decoding chip RAA2788423HFP and transmitted to the display screen.
The SOC unit is used for collecting and stably transmitting voice control information and controlling and transmitting signals of the display and touch control driving unit; the vehicle-mounted information is transmitted to the MCU through serial port communication; the SOC unit adopts an MX8DXP chip.
The MCU is used for controlling the CXD4960 GVAF 2 digital video conversion unit to work through the GPIO port and the I2C bus, and communicating with the SOC unit through serial port signals; the MCU adopts an R7F7015873AFP chip.
The controller area network CAN unit is used for realizing stable transmission of network signals with the MCU and the ECU in the video box through the CAN bus and the vehicle body controller. TJA1044VT of NXP used by this circuit.
The MCU is electrically connected with the controller area network CAN unit and the SOC unit; the controller area network CAN unit is electrically connected with the vehicle body controller; the display and touch control driving unit and the audio processing decoding unit are electrically connected with the SOC unit.
The audio processing decoding unit is electrically connected with the microphone and is an SAF775CHN chip of NXP. The audio processing decoding unit is communicated with the SOC through the SPI. The analog input signal of MIC is decoded into I2S digital signal and electrically connected to the SOC unit. The acquisition and decoding and stable transmission of the microphone voice control information are realized.
When the automobile is in a complex road condition or is parked, the user presses a PVM key on the navigator or enters a PVM mode in a voice mode. Or the user hangs the driving reverse gear to enter a reverse mode, and the camera module unit acquires images within 360 degrees around the automobile and transmits the images to the PVM digital video box unit.
The PVM digital video box unit integrates the video CVBS signal and the image data and sends the processed image data to the CXD4960 GVAF digital video conversion unit.
The CXD4960 GVAF digital video conversion unit converts the GVAF signal, converts the processed image data into MIPI signals and sends the MIPI signals to the AA278842 video processing unit.
The storage unit reads information (the cultural information and the automobile position image information when the automobile is reversed) in the storage unit at any time through the SPI by the AA278842 video processing unit.
The AA278842 video processing unit performs fusion processing on the MIPI signal and the information of the storage unit, and converts the processed image and video data into LVDS parity group signals required by the TFT display screen.
The MCU unit controls the power management of each module and the power-on time sequence management of each module. UART serial port communication is carried out with the SOC, and various instruction information sent by the SOC system, especially key information and voice information for entering PVM mode, are received.
The SOC unit is used for starting and running the whole system and receiving information such as key input, voice input and the like of a user on the system. UART communication is carried out with the MCU unit, and system information is transmitted.
And the audio processing decoding unit adopts an SAF775CHN chip to realize acquisition and decoding and stable transmission of microphone voice control information.
The controller area network CAN unit is used for realizing stable transmission of network signals, such as vehicle reversing mode, vehicle state information and the like, with the MCU and the video box ECU through the CAN bus and the vehicle body controller.
The image picture played by the TFT display unit contains all directions and top views of the automobile. The driver can intuitively see the situation around the automobile at the moment through the TFT display unit, and the position of the automobile and the relative distance between the automobile and surrounding obstacles can be better mastered. And judging whether smooth and safe parking can be carried out or not, so that the parking safety and driving experience of a driver are improved.
According to the utility model, the vehicle-mounted multimedia navigation system is connected with the CXD4960 GVGIF 2 digital video conversion unit through the GFIV interface of the PVM video box unit, and the PVM digital panoramic system is integrated by the navigation system, so that the visual quick parking of the PVM is realized, and the voice control can be realized by using the touch keys and the voice recognition function of the vehicle-mounted navigation host, so that the visual quick parking can be realized. The system can effectively improve the problems of image transmission distortion and interference. The purpose of viewing the position of the automobile by the overlooking angle of the driver of the vehicle can be achieved. The purpose of assisting in observing visual dead angles during running on complex roads can be achieved. The parking operability, safety and convenience of the driving user are enhanced, and the safety and experience of the user are obviously improved.
The present utility model is not limited to the above-described embodiments, and based on the technical solutions of the present disclosure, those skilled in the art may make some substitutions and modifications to some technical features thereof without creative efforts, which are all within the scope of the present utility model.

Claims (7)

1. The vehicle-mounted navigation system for visual quick parking of PVM based on CXD4960 is characterized in that: the digital video conversion unit is respectively connected with the PVM digital video box unit and the video processing unit, the PVM digital video box unit is respectively connected with the camera group and the control local area network CAN unit, the control local area network CAN unit is connected with the MCU unit, the MCU unit is respectively connected with the digital video conversion unit and the SOC unit, the SOC unit is connected with the audio decoding unit, the audio decoding unit is connected with the microphone, and the video processing unit is respectively connected with the storage FLASH unit and the TFT display unit.
2. A vehicle navigation system for visual fast parking of PVM based on CXD4960 of claim 1, wherein: the digital conversion unit comprises a CXD4960GG chip, the PVM digital video box unit comprises a plug-in J6, the video processing unit comprises a RAA2788423 chip, and the MCU unit comprises an R7F7015873AFP chip;
the A4 pin and the A5 pin of the CXD4960GG chip are connected and connected with the No. 3 pin of the plug-in J6, and the A6 pin and the A7 pin of the CXD4960GG chip are connected and connected with the No. 4 pin of the plug-in J6;
the G8 pin and the F7 pin of the CXD4960GG chip are respectively connected with the No. 26 pin and the No. 27 pin of the R7F7015873AFP chip, and the A2 pin and the H3 pin of the CXD4960GG chip are respectively connected with the No. 160 pin and the No. 150 pin of the R7F7015873AFP chip;
the pin D1 and the pin D2 of the CXD4960GG chip are respectively connected with the pin 54 and the pin 55 of the RAA2788423 chip, the pin B1 and the pin B2 of the CXD4960GG chip are respectively connected with the pin 46 and the pin 47 of the RAA2788423 chip, the pin C1 and the pin C2 of the CXD4960GG chip are respectively connected with the pin 48 and the pin 49 of the RAA2788423 chip, the pin E1 and the pin E2 of the CXD4960GG chip are respectively connected with the pin 50 and the pin 51 of the RAA2788423 chip, and the pin F1 and the pin F2 of the CXD4960GG chip are respectively connected with the pin 52 and the pin 53 of the RAA2788423 chip.
3. A vehicle navigation system for visual fast parking of PVM based on CXD4960 according to claim 2, characterized in that: the TFT display unit comprises a display screen plug-in J3, a 92 pin and a 91 pin of a RAA2788423 chip are respectively connected with a 38 pin and a 37 pin of the display screen plug-in J3, a 90 pin and a 89 pin of the RAA2788423 chip are respectively connected with a35 pin and a 34 pin of the display screen plug-in J3, a 87 pin and a 86 pin of the RAA2788423 chip are respectively connected with a 32 pin and a 31 pin of the display screen plug-in J3, a 84 pin and a 83 pin of the RAA2788423 chip are respectively connected with a29 pin and a 28 pin of the display screen plug-in J3, and a 82 pin and a 81 pin of the RAA2788423 chip are respectively connected with a 26 pin and a 25 pin of the display screen plug-in J3;
the No. 79 pin and the No. 78 pin of the RAA2788423 chip are respectively connected with the No. 23 pin and the No. 22 pin of the display screen plug-in J3, the No. 77 pin and the No. 76 pin of the RAA2788423 chip are respectively connected with the No. 20 pin and the No. 19 pin of the display screen plug-in J3, the No. 74 pin and the No. 73 pin of the RAA2788423 chip are respectively connected with the No. 17 pin and the No. 16 pin of the display screen plug-in J3, the No. 71 pin and the No. 70 pin of the RAA2788423 chip are respectively connected with the No. 24 pin and the No. 23 pin of the display screen plug-in J3, and the No. 59 pin and the No. 68 pin of the RAA2788423 chip are respectively connected with the No. 11 pin and the No. 10 pin of the display screen plug-in J3.
4. A vehicle navigation system for visual fast parking of PVM based on CXD4960 according to claim 3, characterized in that: the control local area network CAN unit comprises a TJA1044VT chip, the PVM digital video box unit also comprises an interface J54, the No. 1 pin, the No. 4 pin and the No. 8 pin of the TJA1044VT chip are respectively connected with the No. 152 pin, the No. 153 pin and the No. 119 pin of the R7F7015873AFP chip, and the No. 6 pin and the No. 7 pin of the TJA1044VT chip are respectively connected with the No. 26 pin and the No. 27 pin of the interface J54;
the camera group has set up four cameras, and the positive pole of four cameras links to each other with 17 No. foot, 18 No. foot, 19 No. foot and the 20 No. foot of interface J54 respectively, and the negative pole of four cameras links to each other with 37 No. foot, 38 No. foot, 39 No. foot and the 40 No. foot of interface J54 respectively.
5. The vehicle navigation system for visual quick parking of PVM based on CXD4960 of claim 4, wherein: the FLASH memory unit comprises a W25Q16JVSSAQ chip, a 65 pin of a RAA2788423 chip is connected with a5 pin of the W25Q16JVSSAQ chip, a 64 pin of a RAA2788423 chip is connected with a2 pin of the W25Q16JVSSAQ chip, a 63 pin of the RAA2788423 chip is connected with a3 pin of the W25Q16JVSSAQ chip, a 62 pin of the RAA2788423 chip is connected with a7 pin of the W25Q16JVSSAQ chip, a 61 pin of the RAA2788423 chip is connected with a1 pin of the W25Q16JVSSAQ chip, and a 59 pin of the RAA2788423 chip is connected with a6 pin of the W25Q16JVSSAQ chip.
6. The vehicle navigation system for visual quick parking of PVM based on CXD4960 of claim 5, wherein: the SOC unit comprises an MX8DXP chip, a Y32 pin and a Y34 pin of the MX8DXP chip are respectively connected with a No. 3 pin and a No. 6 pin of the R7F7015873AFP chip, an AA35 pin and an AA33 pin of the MX8DXP chip are respectively connected with a No. 7 pin and a No. 12 pin of the R7F7015873AFP chip, and an AD34 pin and an AC35 pin of the MX8DXP chip are respectively connected with a No. 29 pin and a No. 28 pin of the R7F7015873AFP chip.
7. A vehicle navigation system for visual quick parking of PVM based on CXD4960 of claim 6, wherein: the audio decoding unit comprises an SAF775CHN chip, wherein an A50 pin and an A51 pin of the SAF775CHN chip are connected with a microphone, a B31 pin and an A36 pin of the SAF775CHN chip are respectively connected with an L35 pin and an N35 pin of a MX8DXP chip, an A29 pin of the SAF775CHN chip is connected with an E33 pin of the MX8DXP chip, an R35 pin of the SAF775CHN chip is connected with a C30 pin of the MX8DXP chip, and a P30 pin, a P34 pin and an R31 pin of the SAF775CHN chip are respectively connected with a B26 pin, a C25 pin and an A29 pin of the MX8DXP chip.
CN202321762086.2U 2023-07-06 2023-07-06 Vehicle navigation system for PVM visual quick parking based on CXD4960 Active CN220322385U (en)

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