CN220305448U - Automatic test system - Google Patents
Automatic test system Download PDFInfo
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- CN220305448U CN220305448U CN202321692659.9U CN202321692659U CN220305448U CN 220305448 U CN220305448 U CN 220305448U CN 202321692659 U CN202321692659 U CN 202321692659U CN 220305448 U CN220305448 U CN 220305448U
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- 238000012360 testing method Methods 0.000 title claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 238000012545 processing Methods 0.000 claims abstract description 4
- 238000009434 installation Methods 0.000 claims 1
- 238000004891 communication Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 2
- 238000012812 general test Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000011664 signaling Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
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Abstract
The utility model discloses an automatic test system, which comprises a core board assembly, a signal wire and a nixie tube for displaying test results, wherein two ends of the signal wire are respectively connected with the core board assembly and the nixie tube; the core board assembly comprises a substrate and a CPU (central processing unit) arranged on the substrate, wherein the substrate is provided with a first interface side and a second interface side which are arranged on two opposite sides, and the first interface side and the second interface side are respectively provided with a first double-row pin header and a second double-row pin header; the first double-row pin header and the second double-row pin header are connected to the signal line, and the substrate is provided with a network port, a serial port, a GPIO port, a CAN port, an LCD touch screen port and a camera port; therefore, the automatic test is realized, manual selection and command input are not needed, the phenomenon of test omission can not occur, more industrial equipment can be supported to be connected, and the expansion capacity is improved.
Description
Technical Field
The utility model relates to the technical field of server core board testing, in particular to an automatic testing system.
Background
The communication manager is also called DPU or gateway, which has a plurality of downlink communication interfaces and one or more uplink network interfaces, and is equivalent to a front-end processor, namely a monitoring computer, and is used for collecting the communication data of all intelligent monitoring/protecting devices in a substation, and then implementing the uplink master station system (a monitoring center background machine and a DCS) to complete remote signaling and remote measuring functions. On the other hand, the command issued by the background machine or the DCS is received and forwarded to an intelligent series unit in the substation, so that remote control of opening and closing of each switch device in the factory station or parameter setting of the device is completed, and remote control and remote regulation functions are realized. Meanwhile, a plurality of serial interfaces are also provided, so that other intelligent devices in the factory station can communicate conveniently. The communication manager is generally applied to a substation and a dispatching station, the communication manager controls downlink equipment through a control platform, information collection such as remote signaling, remote measurement and remote control is achieved, the information is fed back to a dispatching center, and then a control center manager selects an executed command through processing and analysis of the information to achieve the aim of outputting the dispatching command. After loading, the core board assembly of the existing gateway equipment needs to carry out various communication tests, and the existing gateway equipment mainly adopts an external testing device to manually select to carry out the test of various communication points and needs to input various testing commands.
Therefore, a new technology is required to be developed to solve the above-mentioned problems.
Disclosure of Invention
In view of the above, the present utility model aims at overcoming the drawbacks of the prior art, and its main objective is to provide an automated testing system, which realizes automated testing without manual selection and command input, and can support connection with more industrial devices, thereby improving expansion capability.
In order to achieve the above purpose, the present utility model adopts the following technical scheme:
an automatic test system comprises a core board assembly, a signal wire and a nixie tube for displaying test results, wherein two ends of the signal wire are respectively connected with the core board assembly and the nixie tube; the core board assembly comprises a substrate and a CPU (central processing unit) arranged on the substrate, wherein the substrate is provided with a first interface side and a second interface side which are arranged on two opposite sides, and the first interface side and the second interface side are respectively provided with a first double-row pin header and a second double-row pin header; the first double-row pin header and the second double-row pin header are both connected to the signal line, and the substrate is provided with a network port, a serial port, a GPIO port, a CAN port, an LCD touch screen port and a camera port.
As a preferable scheme, two first double-row pin connectors are arranged, and the two first double-row pin connectors are arranged at intervals side by side along the front-back direction.
As a preferable scheme, two second double row pin connectors are arranged, and the two second double row pin connectors are arranged at intervals side by side along the front-back direction.
As a preferable scheme, the substrate is of a rectangular structure, a plurality of mounting holes used for being mounted and connected with an external structure are formed in the substrate, and the mounting holes penetrate through the front surface and the back surface of the substrate.
As a preferable scheme, a reset button is further arranged on the substrate.
As a preferable scheme, the substrate is also provided with a power indicator lamp.
As a preferable scheme, the substrate is also provided with a first custom indicator lamp and a second custom indicator lamp.
As a preferable scheme, the substrate is also provided with a first normally-open/normally-closed relay and a second normally-open/normally-closed relay.
As a preferable scheme, the substrate is also provided with a SIM card slot, a TF card slot and an onboard WIFI module.
As a preferable scheme, the base plate is also provided with an earphone output interface, a left horn output interface, a right horn output interface and a USB interface.
Compared with the prior art, the utility model has obvious advantages and beneficial effects, and in particular, the technical scheme is that the core board assembly, the signal wire and the nixie tube for displaying the test result are arranged, and the two ends of the signal wire are respectively connected with the core board assembly and the nixie tube, so that the automatic test is realized, manual selection and command input are not needed, the phenomenon of test omission does not occur, and more industrial equipment CAN be supported and connected by arranging the network port, the serial port, the GPIO interface, the CAN interface, the LCD touch screen interface and the camera interface on the substrate, and the expansion capability is improved.
In order to more clearly illustrate the structural features, technical means, and specific objects and functions attained by the present utility model, the present utility model will be described in further detail with reference to the accompanying drawings and the specific embodiments.
Drawings
FIG. 1 is a block diagram of a communication connection of an embodiment of the present utility model;
FIG. 2 is a front view of a core plate assembly of an embodiment of the present utility model;
FIG. 3 is a block diagram of a test system according to an embodiment of the utility model.
The attached drawings are used for identifying and describing:
10. substrate 11, first interface side
12. Second interface side 13, first double row pin header
14. A second double row pin header 15 and a mounting hole.
Detailed Description
Referring to fig. 1 to 3, specific structures of embodiments of the present utility model are shown.
An automatic test system comprises a core board assembly, a signal wire and a nixie tube for displaying test results, wherein two ends of the signal wire are respectively connected with the core board assembly and the nixie tube; the core board assembly comprises a base board 10 and a CPU arranged on the base board 10, the CPU is preferably a NXP i.MX6 UltraLite ARM Cortex-A7 CPU, the base board 10 is of a rectangular structure, a plurality of mounting holes 15 used for being connected with an external structure in a mounting mode are formed in the base board 10, and the mounting holes 15 penetrate through the front face and the back face of the base board 10. Thus, the mounting holes 15 are provided so as to be mounted and connected with an external structure. Here, the number and positions of the mounting holes 15 may be set according to actual production requirements, and will not be described herein.
The substrate 10 is provided with a first interface side 11 and a second interface side 12 which are arranged on two opposite sides, and the first interface side 11 and the second interface side 12 are respectively provided with a first double-row pin header 13 and a second double-row pin header 14; the first double-row pin header 13 and the second double-row pin header 14 are both connected to a signal line, preferably, in this embodiment, two first double-row pin headers 13 are provided, and the two first double-row pin headers 13 are arranged in a side-by-side spacing along the front-rear direction; the two second pin header 14 are arranged in parallel and at a distance from each other in the front-rear direction.
The substrate 10 is provided with a network port, a serial port, a GPIO interface, a CAN interface, an LCD touch screen interface and a camera interface, so that the substrate CAN support more industrial equipment to be connected, and the expansion capability is improved.
The base plate 10 is further provided with a reset button, a first custom indicator lamp, a second custom indicator lamp, a first normally open/normally closed relay, a second normally open/normally closed relay, an earphone output interface, a left horn output interface, a right horn output interface, a USB interface, a SIM card slot, a TF card slot and an onboard WIFI module. In this embodiment, a power indicator is further disposed on the substrate 10 to indicate the working condition of the power supply in real time.
The general test principle is as follows: the nixie tube is controlled by a signal wire, and the normal operation of the signal is judged through flicker 888; the other signals are corresponding to each other, and the corresponding high and low levels are read, if abnormal, the signals are displayed on the nixie tube; the network directly accesses the gateway to confirm the working state.
The general test procedure is as follows:
firstly, all signal wires are led out through a double-row bus matched and connected with a first double-row pin header 13 and a second double-row pin header 14 and are connected with a nixie tube;
secondly, switching the starting sequence into eMMC starting: the dial switch is dialed to a 10 state;
then, connecting a 5V power supply, a network cable and a code scanning gun, waiting about 30 seconds, automatically running the system for automatic test, displaying 888 a nixie tube (the nixie tube is self-checked to judge the normal operation of signals), then testing again, displaying a test result by the nixie tube, and displaying ULC2 by the nixie tube after the test is completed.
In summary, the design of the utility model is mainly characterized in that the core board assembly, the signal wire and the nixie tube for displaying the test result are arranged, and two ends of the signal wire are respectively connected with the core board assembly and the nixie tube, so that the automatic test is realized, the manual selection and command input are not needed, the phenomenon of missing test CAN not occur, and more industrial equipment CAN be supported and connected by arranging the network port, the serial port, the GPIO interface, the CAN interface, the LCD touch screen interface and the camera interface on the substrate, and the expansion capability is improved.
The foregoing description is only a preferred embodiment of the present utility model, and is not intended to limit the technical scope of the present utility model, so any minor modifications, equivalent changes and modifications made to the above embodiments according to the technical principles of the present utility model are still within the scope of the technical solutions of the present utility model.
Claims (10)
1. An automated test system, characterized by: the test device comprises a core board assembly, a signal wire and a nixie tube for displaying test results, wherein two ends of the signal wire are respectively connected with the core board assembly and the nixie tube; the core board assembly comprises a substrate and a CPU (central processing unit) arranged on the substrate, wherein the substrate is provided with a first interface side and a second interface side which are arranged on two opposite sides, and the first interface side and the second interface side are respectively provided with a first double-row pin header and a second double-row pin header; the first double-row pin header and the second double-row pin header are both connected to the signal line, and the substrate is provided with a network port, a serial port, a GPIO port, a CAN port, an LCD touch screen port and a camera port.
2. An automated test system according to claim 1, wherein: the two first double-row needle arrangement interfaces are arranged at intervals side by side along the front-back direction.
3. An automated test system according to claim 1, wherein: the two second double-row needle arranging interfaces are arranged at intervals in the front-back direction.
4. An automated test system according to claim 1, wherein: the base plate is rectangular structure, be provided with a plurality of mounting holes that are used for being connected with external structure installation on the base plate, the front and back two sides of base plate are link up to the mounting hole.
5. An automated test system according to claim 1, wherein: and a reset button is also arranged on the substrate.
6. An automated test system according to claim 1, wherein: and the substrate is also provided with a power indicator lamp.
7. An automated test system according to claim 1, wherein: and the substrate is also provided with a first custom indicator lamp and a second custom indicator lamp.
8. An automated test system according to claim 1, wherein: and the substrate is also provided with a first normally-open/normally-closed relay and a second normally-open/normally-closed relay.
9. An automated test system according to claim 1, wherein: and the substrate is also provided with a SIM card slot, a TF card slot and an onboard WIFI module.
10. An automated test system according to claim 1, wherein: and the base plate is also provided with an earphone output interface, a left horn output interface, a right horn output interface and a USB interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321692659.9U CN220305448U (en) | 2023-06-30 | 2023-06-30 | Automatic test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321692659.9U CN220305448U (en) | 2023-06-30 | 2023-06-30 | Automatic test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220305448U true CN220305448U (en) | 2024-01-05 |
Family
ID=89354112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321692659.9U Active CN220305448U (en) | 2023-06-30 | 2023-06-30 | Automatic test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220305448U (en) |
-
2023
- 2023-06-30 CN CN202321692659.9U patent/CN220305448U/en active Active
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