CN220292010U - Communication interface circuit and power module based on pulse width modulation - Google Patents
Communication interface circuit and power module based on pulse width modulation Download PDFInfo
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Abstract
The utility model discloses a communication interface circuit and a power module based on pulse width modulation, wherein the circuit comprises: the device comprises a PWM input capturing circuit, a PWM output driving circuit, a current source circuit and an interface protection circuit, wherein the PWM input capturing circuit is used for identifying a communication bus signal based on PWM; the PWM output driving circuit is used for sending the communication bus signal based on PWM and realizing constant current and hardware protection functions; the current source circuit provides stable current driving capability; and the interface protection circuit performs hardware filtering and hardware protection on interference signals injected by the external wire harness. The circuit provided by the application can realize bidirectional communication of digital signals, a hardware protection function and stable current driving capability, and support fault diagnosis functions such as short circuit, open circuit, overcurrent and the like, thereby improving the safety, reliability and robustness of communication based on a pulse width modulation bus.
Description
Technical Field
The utility model relates to the technical field of automobile electronic bus communication, in particular to a communication interface circuit and a power module based on pulse width modulation.
Background
At present, the communication technology applied to the technical field of automobile electronics mainly comprises a controller area network (Controller Area Network, CAN) bus, a local interconnection network (Local Interconnect Network, LIN) bus and a high-speed Ethernet technology, wherein the CAN bus and the LIN bus CAN ensure that information interaction and data communication CAN be reliably carried out between automobile parts; with the continuous evolution of the development trend of electronic intellectualization, electric-driven and networking of automobiles, the high-speed ethernet technology is mainly applied to the design application of domain controller products, but the three bus communication technologies not only need the support of hardware related resources of a micro control unit (Microcontroller Unit, MCU) and an external transceiver chip, but also need the support of a complex bottom protocol stack on the software implementation, so that the three communication technologies cannot be well applied to some application occasions with simple communication requirements and sensitive hardware cost. Therefore, in the technical field of automotive electronics, pulse width modulation (Pulse Width Modulation, PWM) communication technology is also a common communication method, but most of simplex data communication, i.e. one end is responsible for sending and the other end is responsible for receiving, such as the report of a heartbeat signal, the issue of a control command, the broadcast of a diagnostic fault or the detection of high-voltage interlock, etc., cannot well realize duplex data communication between nodes. In the prior art, for the realization case of duplex data communication based on PWM, the problems of insufficient protection function of circuit interface hardware, missing fault diagnosis function and unstable driving capability exist.
Disclosure of Invention
In order to solve the above technical problems, it is desirable to provide a communication interface circuit and a power module based on pulse width modulation, which can realize bidirectional communication of digital signals, a hardware protection function and stable current driving capability, and support fault diagnosis functions such as short circuit, open circuit and overcurrent, so as to effectively improve safety, reliability and robustness of communication based on pulse width modulation buses.
The technical scheme of the utility model is realized as follows:
in a first aspect, an embodiment of the present utility model provides a PWM-based communication interface circuit, where the PWM-based communication interface circuit includes: a PWM input capturing circuit, a PWM output driving circuit, a current source circuit and an interface protection circuit, wherein,
the PWM input capturing circuit is used for identifying a communication bus signal based on PWM;
the PWM output driving circuit is used for sending the PWM-based communication bus signals identified by the PWM input capturing circuit and realizing constant current and hardware protection functions;
the current source circuit provides stable current driving capability;
and the interface protection circuit performs hardware filtering and hardware protection on interference signals injected by the external wire harness.
In some possible implementations, the connection relationship of each circuit in the communication interface circuit based on pulse width modulation is that the first end of the PWM input capturing circuit and the first end of the PWM output driving circuit are respectively connected with the first end and the second end of the MCU control unit, the second end of the PWM input capturing circuit and the second end of the PWM output driving circuit are commonly connected to the first end of the interface protection circuit through a common connection point a, the second end of the interface protection circuit is connected with the first end of the current source circuit through a pull-up interface, and the third end of the interface protection circuit is connected with other PWM communication nodes outside through an external wire harness.
In some examples, the PWM input capture circuit comprises: the collector of the first triode and the first end of the third resistor are commonly connected to the first end of the MCU control unit, the emitter of the first triode is grounded, the second end of the third resistor is connected with a first power supply, the base of the first triode is connected with the first end of the fourth resistor and the first end of the fifth resistor, the second end of the fourth resistor is grounded, the second end of the fifth resistor is connected to the common connection point A,
the third resistor is connected with the first power supply to charge the first triode so as to drive the first triode to be conducted;
and according to the resistance values determined by the fourth resistor and the fifth resistor, the first triode which is conducted is enabled to complete the conversion of the signal level high and low and the signal logic inversion.
In some examples, the PWM output drive circuit comprises: the first end of the sixth resistor is connected with the second end of the MCU control unit, the base electrode of the second resistor is connected with the second end of the sixth resistor and the positive electrode of the first diode, the negative electrode of the first diode is connected with the positive electrode of the second diode, the negative electrode of the second diode is grounded, the emitter of the second transistor is connected with the first end of the seventh resistor, the second end of the seventh resistor is grounded, the collector of the second transistor is connected to the common connection point A,
the level of the PWM-based communication bus is pulled up through a current source in advance, and a level signal is output through an MCU control unit to drive the second transistor to work in a saturated state, and the level of the PWM-based communication bus is pulled down to send the PWM-based communication bus signal;
transmitting the external level signal to the MCU control unit to receive the PWM-based communication bus signal based on the second transistor operating in a saturated state to pull down the voltage of the collector of the second transistor;
when the external wire harness is short-circuited to the power supply, current is limited through the seventh resistor, and the working state of the second triode is changed into a linear amplification state so as to protect hardware.
In some examples, the current source circuit includes: the current source circuit comprises a third diode, a fourth diode, a third triode, an eighth resistor and a ninth resistor, wherein the positive electrode of the third diode and the first end of the eighth resistor are commonly connected to a second power supply, the negative electrode of the third diode is connected with the positive electrode of the fourth diode, the emitting electrode of the third triode is connected with the second end of the eighth resistor, the base electrode of the third triode is connected with the first end of the ninth resistor and the negative electrode of the fourth resistor, and the second end of the ninth resistor is grounded, wherein a current source circuit formed by the third diode, the fourth diode, the third triode, the eighth resistor and the ninth resistor provides stable current driving capability, and the output current of the current source circuit is 2-8 mA.
In some examples, the interface protection circuit includes: the positive pole of the fifth diode is connected with the collector electrode of the third triode, the negative pole of the fifth diode, the positive pole of the sixth diode and the first end of the second capacitor are commonly connected to other external PWM communication nodes through an external wiring harness, the negative pole of the sixth diode is connected to the common connection point A, the second end of the second capacitor is grounded,
providing noise filtering and antistatic protection for the input signal through the second capacitor;
and providing hardware protection of reverse power supply connection and ground offset through the fifth diode and the sixth diode.
In some possible implementations, the pwm-based communication interface circuit further includes: and the fault diagnosis circuit is used for testing and diagnosing faults generated by the PWM-based communication bus.
In some examples, the fault diagnosis circuit includes: the low-pass filter circuit comprises a first capacitor, a first resistor and a second resistor, wherein the first end of the first capacitor, the first end of the first resistor and the first end of the second resistor are commonly connected to the third end of the MCU control unit, the second end of the first capacitor and the second end of the first resistor are commonly grounded, and the second end of the second resistor is connected to a common connection point A, wherein faults generated by a communication bus based on PWM are tested and diagnosed through the low-pass filter circuit formed by the first resistor, the second resistor and the first resistor.
In a second aspect, an embodiment of the present utility model provides a power module, including: the communication interface circuit based on pulse width modulation and MCU control unit, the first end, the second end, the third end of communication interface circuit based on pulse width modulation respectively with MCU control unit's first end, second end, third end link to each other, the fourth end of communication interface circuit based on pulse width modulation passes through outside pencil and links to each other with outside other PWM communication nodes.
From the above technical solutions, the embodiments of the present application have the following advantages:
the embodiment of the utility model provides a communication interface circuit and a power module based on pulse width modulation, which can realize bidirectional communication of digital signals, hardware protection function, stable driving capability and fault diagnosis capability, and comprises the following components: the PWM output driving circuit and the current source circuit are designed as constant current sources and have constant current protection functions, so that the PWM output driving circuit realizes hardware protection from short circuit to power supply, the current source circuit realizes hardware protection from short circuit to ground, and the interface protection circuit comprises a fifth diode and a sixth diode, and respectively realizes hardware protection from reverse power supply grounding and ground deviation; the pull-up circuit of the PWM-based communication interface circuit is realized by a current source circuit, and the current source is a constant current source circuit formed by a third triode, so that the external current driving capability is realized and is not changed along with the voltage change of a power supply, and the PWM-based communication interface circuit is more stable and reliable; the fault diagnosis circuit supports fault diagnosis capability such as short circuit, open circuit, overcurrent and the like, and improves reliability and robustness based on PWM communication; in addition, the communication interface circuit based on PWM is composed of a common resistor, a common capacitor, a common diode and a common triode, has low cost, does not have special requirements on hardware resources in MCU, and is more convenient and friendly in matching and type selection.
Drawings
FIG. 1 is a block diagram of a communication interface circuit based on pulse width modulation in the prior art;
fig. 2 is a schematic diagram of a power module composition of a communication interface circuit based on pulse width modulation according to an embodiment of the present application;
fig. 3 is a schematic diagram of operation of a communication interface circuit based on pulse width modulation according to an embodiment of the present application.
Detailed Description
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present application based on the embodiments herein.
The terms "first," "second," and the like in the embodiments of the present application are used for descriptive purposes only and are merely used to distinguish one entity or operation from another entity or operation without necessarily requiring or implying any actual such relationship or order between such entities or operations, nor should they be construed to indicate or imply relative importance or implying any particular order among or between such entities or operations. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.
For an interface circuit for PWM-based duplex data communication, as shown in fig. 1, a block diagram of a prior art communication interface circuit based on pulse width modulation is shown, which includes: the communication interface circuit based on pulse width modulation and the MCU control unit, namely, the first end of the communication interface circuit based on pulse width modulation is connected with two ports of the MCU control unit, the second end of the communication interface circuit based on PWM is connected with other external PWM communication nodes through an external wire harness, wherein the communication interface circuit based on PWM comprises a first triode Q1, a third resistor R3, a fourth resistor R4 and a fifth resistor R5, the first end of the third resistor R3 is connected with a first power supply Vc, the second end of the third resistor R3 and the collector electrode of the first triode Q1 are commonly connected to the first end of the MCU control unit, the emitter electrode of the first triode Q1 is grounded, the base electrode of the first triode Q1 is connected with the first end of a fourth resistor R4 and the first end of the fifth resistor R5, the first end of the fourth resistor R4 is grounded, and the second end of the fifth resistor R5 is connected to a public connection point A;
the communication interface circuit based on PWM further comprises a second triode Q2, a sixth resistor R6 and a seventh resistor R7, wherein a first end of the sixth resistor R6 is connected with a second end of the MCU control unit, a second end of the sixth resistor R6 and a first end of the seventh resistor R7 are connected with a base electrode of the second triode Q2, a second end of the seventh resistor R7 and an emitter electrode of the second triode Q2 are grounded, and a collector electrode of the second triode Q2 is connected to a common connection point A;
the communication interface circuit based on PWM further comprises an eighth resistor R8 and a second capacitor C2, wherein a first end of the eighth resistor R8 is connected with a second power supply Vs, a second end of the eighth resistor R8 is connected with a first end of the second capacitor C2, a second end of the second capacitor C2 is grounded, and a third end of the second capacitor C2 is connected with other PWM communication nodes through an external wiring harness.
For the PWM-based communication interface circuit shown in fig. 1, although bidirectional communication of input and output can be realized, there is a case where when an external harness of the PWM-based communication interface circuit is short-circuited to cause a power failure, the MCU control unit drives the transistor to be turned on, and the transistor is damaged due to an instantaneous surge current impact. When the external wire harness is overloaded, the wire harness of the PWM-based communication interface circuit is pulled down to an intermediate voltage between a power supply and ground, which is likely to cause other nodes on the PWM communication bus to be misjudged as valid signals, wherein the external wire harness is a communication wire harness that the PWM-based communication interface circuit is connected through a connector, such as a twisted pair, a coaxial cable, and the like; when the power supply voltage of the PWM-based communication interface circuit is halved, the external current driving capability is halved, and the above problems will cause great difficulty and challenges for the safety and reliability of communication.
Based on the drawbacks of the prior art scheme shown in fig. 1, the embodiment of the present application provides a communication interface circuit and a power module based on pulse width modulation, referring to fig. 2, the power module based on pulse width modulation includes: the communication interface circuit 10 based on pulse width modulation and the MCU control unit 20, the first end, the second end and the third end of the communication interface circuit 10 based on pulse width modulation are respectively connected with the first end, the second end and the third end of the MCU control unit 20, and the fourth end of the communication interface circuit 10 based on pulse width modulation is connected with other external PWM communication nodes through an external wire harness.
In some possible implementations, the pwm-based communication interface circuit 10 includes: a PWM input capturing circuit 101, a PWM output driving circuit 102, a current source circuit 103, and an interface protection circuit 104, wherein,
the PWM input capture circuit 101 is configured to identify a PWM-based communication bus signal;
the PWM output driving circuit 102 is configured to send the PWM-based communication bus signal identified by the PWM input capturing circuit 101 and implement a constant current and a hardware protection function;
the current source circuit 103 provides stable current driving capability;
the interface protection circuit 104 performs hardware filtering and hardware protection on the interference signal injected from the external harness.
In some possible implementations, the connection relationship between the circuits in the PWM-based communication interface circuit 10 is that the first end of the PWM input capturing circuit 101 and the first end of the PWM output driving circuit 102 are respectively connected to the first end and the second end of the MCU control unit, the second end of the PWM input capturing circuit 101 and the second end of the PWM output driving circuit 102 are commonly connected to the first end of the interface protection circuit 104 through the common connection point a, the second end of the interface protection circuit 104 is connected to the first end of the current source circuit 103 through a pull-up interface, and the third end of the interface protection circuit 104 is connected to other PWM communication nodes through an external harness.
It should be noted that, in some examples, the MCU mainly includes a central processing unit, a memory, an input/output I/O interface, a timer, an interrupt system, and a special register, where the central processing unit includes an arithmetic unit, a controller, and a register set, the memory includes a ROM and a RAM, and the MCU may also be referred to as an MCU control unit or a single chip microcomputer. The MCU control unit 20 provides three ports for the external communication node, and is configured to implement a normal digital input function, a normal digital output function, and an analog-to-digital converter (Analog Digital Conversion, ADC) analog input function, where the three ports are connected to other communication nodes through pins, so that pins of the three ports may be further divided into a normal digital input pin, a normal digital output pin, and an ADC analog input pin, where the first end, the second end, and the third end of the MCU control unit 20 correspond to the normal digital input pin, the normal digital output pin, and the ADC analog input pin, respectively. Further, the supply voltage Vc of the MCU control unit 20 is 3.3V or 5V.
Referring to fig. 3 in conjunction with the PWM-based communication interface circuit 10 shown in fig. 2, a schematic diagram of the operation of a PWM-based communication interface circuit according to an embodiment of the present application is shown, wherein,
for the above implementations, in some examples, the PWM input capture circuit 101 includes: the collector of the first triode and the first end of the third resistor are commonly connected to the first end of the MCU control unit, the emitter of the first triode is grounded, the second end of the third resistor is connected with a first power supply, the base of the first triode is connected with the first end of the fourth resistor and the first end of the fifth resistor, the second end of the fourth resistor is grounded, the second end of the fifth resistor is connected to the common connection point A,
the third resistor is connected with the first power supply to charge the first triode so as to drive the first triode to be conducted;
and according to the resistance values determined by the fourth resistor and the fifth resistor, the first triode which is conducted is enabled to complete the conversion of the signal level high and low and the signal logic inversion.
For the above example, specifically, as shown in fig. 3, the PWM input capturing circuit 101 includes: the first triode Q1, the third resistor R3, the fourth resistor R4 and the fifth resistor R5, wherein the collector of the first triode Q1 is connected with the first end of the third resistor R3 and is commonly connected to a common digital input pin of the MCU control unit 20, namely the first end of the MCU control unit 20, the emitter of the first triode Q1 is grounded, the base of the first triode Q1 is connected with the first end of the fourth resistor R4 and the first end of the fifth resistor R5, the second end of the third resistor R3 is connected with a first power supply, the voltage of the first power supply is Vc, the second end of the fourth resistor R4 is grounded, and the second end of the fifth resistor R5 is connected to a common connection point A.
Depending on the semiconductor material structure, the transistors may be divided into Negative-Positive-Negative (NPN) and Positive-Negative-Positive (PNP) transistors, i.e., NPN transistors and PNP transistors, wherein the first transistor Q1 is an NPN transistor. Furthermore, each of said transistors comprises three poles, respectively a base (B), a collector (C) and an emitter (E). The values of the fourth resistor R4 and the fifth resistor R5 can ensure that the first triode Q1 respectively works in a saturated state and a cut-off state during normal communication, and further the conversion of the signal level high and low and the signal logic inversion is completed. It should be noted that the triode has three working states, namely a cut-off state, a linear amplifying state and a saturation state. Preferably, the voltage Vc of the first power supply is 3.3V or 5V, and the voltage Vc of the first power supply may be taken from the power supply voltage of the MCU control unit 20, and it is understood that the voltage Vc of the first power supply may supply power to the MCU control unit 20 and the PWM input capturing circuit 101 at the same time.
For the implementations described above, in some examples, the PWM output drive circuit 102 includes: the first end of the sixth resistor is connected with the second end of the MCU control unit, the base electrode of the second resistor is connected with the second end of the sixth resistor and the positive electrode of the first diode, the negative electrode of the first diode is connected with the positive electrode of the second diode, the negative electrode of the second diode is grounded, the emitter of the second transistor is connected with the first end of the seventh resistor, the second end of the seventh resistor is grounded, the collector of the second transistor is connected to the common connection point A,
the level of the PWM-based communication bus is pulled up through a current source in advance, and a level signal is output through an MCU control unit to drive the second transistor to work in a saturated state, and the level of the PWM-based communication bus is pulled down to send the PWM-based communication bus signal;
transmitting the external level signal to the MCU control unit to receive the PWM-based communication bus signal based on the second transistor operating in a saturated state to pull down the voltage of the collector of the second transistor;
when the external wire harness is short-circuited to the power supply, current is limited through the seventh resistor, and the working state of the second triode is changed into a linear amplification state so as to protect hardware.
For the above example, specifically, as shown in fig. 3, the PWM output driving circuit 102 includes: the device comprises a first diode D1, a second diode D2, a second triode Q2, a sixth resistor R6 and a seventh resistor R7, wherein the first end of the sixth resistor R6 is connected with the second end of the MCU control unit 20, namely a common digital output pin of the MCU control unit 20, the base electrode of the second triode Q2 is connected with the second end of the sixth resistor R6 and the positive electrode of the first diode D1, the negative electrode of the first diode D1 is connected with the positive electrode of the second diode D2, the negative electrode of the second diode D2 is grounded, the emitter electrode of the second triode Q2 is connected with the first end of the seventh resistor R7, the second end of the seventh resistor R7 is grounded, and the collector electrode of the second triode Q2 is connected to a common connection point A.
It should be noted that the diode has two poles, which are an anode and a cathode, respectively, the first diode D1 and the second diode D2 are common rectifying diodes of the same type, and the second triode Q2 is an NPN type transistor. The second triode Q2 works in a saturated state and a cut-off state during normal communication, and the current filling capacity, namely the current absorbing capacity, of the second triode Q2 working in the saturated state is larger than 12mA; when the external wire harness is short-circuited to a power supply, the seventh resistor R7 plays a role in limiting current, and the working state of the second triode Q2 is changed into a linear amplification state, so that the second triode Q2 is protected from being burnt out by short-circuit current.
For the above implementation, in some examples, the current source circuit 103 includes: the current source circuit comprises a third diode, a fourth diode, a third triode, an eighth resistor and a ninth resistor, wherein the positive electrode of the third diode and the first end of the eighth resistor are commonly connected to a second power supply, the negative electrode of the third diode is connected with the positive electrode of the fourth diode, the emitting electrode of the third triode is connected with the second end of the eighth resistor, the base electrode of the third triode is connected with the first end of the ninth resistor and the negative electrode of the fourth resistor, and the second end of the ninth resistor is grounded, wherein a current source circuit formed by the third diode, the fourth diode, the third triode, the eighth resistor and the ninth resistor provides stable current driving capability, and the output current of the current source circuit is 2-8 mA.
For the above example, specifically, referring to fig. 3, the current source circuit 103 includes: the power supply circuit comprises a third diode D3, a fourth diode D4, a third triode Q3, an eighth resistor R8 and a ninth resistor R9, wherein the positive electrode of the third diode D3 and the first end of the eighth resistor R8 are commonly connected to a second power supply Vs, the negative electrode of the third diode D3 is connected with the positive electrode of the fourth diode D4, the emitter of the third triode Q3 is connected with the second end of the eighth resistor R8, the base of the third triode Q3 is connected with the first end of the ninth resistor R9 and the negative electrode of the fourth resistor D4, and the second end of the ninth resistor R9 is grounded. The current source circuit is equivalent to providing a pull-up level function and provides a default high level signal. In detail, by providing the pull-up level by the current source circuit, the sum of the voltages of the third diode D3 and the fourth diode D4 is equal to the sum of the source base voltage of the third triode Q3 and the voltage at the end of the eighth resistor R8, and the current flowing through the eighth resistor R8, that is, the current at the collector of the third triode is the voltage drop (about 0.7V) of the third diode D3 divided by the eighth resistor R8, so the current is constant and does not change with the change of the second power supply Vs. In some examples, if the current source circuit is replaced by a pull-up resistor Rp, the driving current provided by the pull-up resistor Rp may vary with the voltage of the second power supply Vs, and the calculation formula is i=vs/Rp.
In some examples, preferably, the voltage Vs of the second power supply is 12V or 24V; the third triode Q3 is a PNP type transistor, and the third diode D3 and the fourth diode D4 are common rectifying diodes of the same type.
For the above implementation, in some examples, the interface protection circuit 104 includes: the positive pole of the fifth diode is connected with the collector electrode of the third triode, the negative pole of the fifth diode, the positive pole of the sixth diode and the first end of the second capacitor are commonly connected to other external PWM communication nodes through an external wiring harness, the negative pole of the sixth diode is connected to the common connection point A, the second end of the second capacitor is grounded,
providing noise filtering and antistatic protection for the input signal through the second capacitor;
and providing hardware protection of reverse power supply connection and ground offset through the fifth diode and the sixth diode.
For the above example, specifically, referring to fig. 3, the interface protection circuit 104 includes: the positive electrode of the fifth diode D5 is connected to the collector of the third triode Q3 in the current source circuit 103, the negative electrode of the fifth diode D5, the positive electrode of the sixth diode D6 and the first end of the second capacitor C2 are commonly connected to other external PWM communication nodes through an external harness, the negative electrode of the sixth diode D6 is connected to the common connection point a, and the second end of the second capacitor C2 is grounded. The interface protection circuit 104 mainly performs hardware filtering and hardware protection on interference signals injected from an external wire harness, such as electrostatic discharge (Electro Static Discharge, ESD), high-current injection (Bulk Current Injection, BCI), reverse connection of power supply, and short circuit performance.
In some examples, preferably, the fifth diode D5 and the sixth diode D6 are common rectifying diodes of the same type; the second capacitor C2 is used for providing noise filtering and antistatic protection for the input signal.
In some possible implementations, the PWM-based communication interface circuit 10 further includes: and a fault diagnosis circuit 105, wherein the fault diagnosis circuit 105 is used for testing and diagnosing faults generated by the PWM-based communication bus.
For the above implementations, in some examples, the fault diagnosis circuit 105 includes: the low-pass filter circuit comprises a first capacitor, a first resistor and a second resistor, wherein the first end of the first capacitor, the first end of the first resistor and the first end of the second resistor are commonly connected to the third end of the MCU control unit, the second end of the first capacitor and the second end of the first resistor are commonly grounded, and the second end of the second resistor is connected to a common connection point A, wherein faults generated by a communication bus based on PWM are tested and diagnosed through the low-pass filter circuit formed by the first resistor, the second resistor and the first resistor.
For the implementation described above, in particular, referring to fig. 3, the fault diagnosis circuit 105 includes: the first end of the first capacitor C1, the first end of the first resistor R1 and the first end of the second resistor R2 are commonly connected to an ADC analog input pin of the MCU control unit 20, that is, the third end of the MCU control unit, the second end of the first capacitor C1 and the second end of the first resistor R1 are commonly grounded, and the second end of the second resistor R2 is connected to the common connection point a. The first resistor R1, the second resistor R2 and the first capacitor C1 together form a low-pass filter circuit, wherein the low-pass filter circuit is used for filtering unexpected high-frequency interference signals during fault diagnosis and preventing misjudgment faults. The cut-off frequency of the low-pass filter circuit is 1/(2pi| (R1|R2) ×C1), which should be far smaller than the PWM effective signal frequency. In addition, in order to reduce the influence of the fault diagnosis circuit 105 on other normal communication circuits and to protect the pins of the MCU 20 from breakdown by surge voltages, the values of the first resistor R1 and the second resistor R2 should be much greater than 10kΩ.
In some examples, the external wiring harness connected to other external PWM communication nodes through the external wiring harness should be designed to mate with a ground wire, so as to prevent electromagnetic interference from being introduced into a communication loop and influence communication quality.
The technical solutions described in the embodiments of the present application may be arbitrarily combined without any conflict.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present disclosure should be included in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (9)
1. The utility model provides a communication interface circuit based on pulse width modulation, its characterized in that, communication interface circuit based on pulse width modulation links to each other through three ports with MCU control unit, communication interface circuit based on pulse width modulation includes: a PWM input capturing circuit, a PWM output driving circuit, a current source circuit and an interface protection circuit, wherein,
the PWM input capturing circuit is used for identifying a communication bus signal based on PWM;
the PWM output driving circuit is used for sending the PWM-based communication bus signals identified by the PWM input capturing circuit and realizing constant current and hardware protection functions;
the current source circuit provides stable current driving capability;
and the interface protection circuit performs hardware filtering and hardware protection on interference signals injected by the external wire harness.
2. The communication interface circuit based on pulse width modulation according to claim 1, wherein the first end of the PWM input capturing circuit and the first end of the PWM output driving circuit are respectively connected with the first end and the second end of the MCU control unit, the second end of the PWM input capturing circuit and the second end of the PWM output driving circuit are commonly connected to the first end of the interface protection circuit through a common connection point a, the second end of the interface protection circuit is connected with the first end of the current source circuit through a pull-up interface, and the third end of the interface protection circuit is connected with other external PWM communication nodes through an external wire harness.
3. The PWM-based communication interface circuit of claim 1, wherein the PWM input capture circuit comprises: the first triode is an NPN type transistor, the collector electrode of the first triode and the first end of the third resistor are commonly connected to the first end of the MCU control unit, the emitter electrode of the first triode is grounded, the second end of the third resistor is connected with a first power supply, the base electrode of the first triode is connected with the first end of the fourth resistor and the first end of the fifth resistor, the second end of the fourth resistor is grounded, the second end of the fifth resistor is connected to the common connection point A,
the third resistor is connected with the first power supply to charge the first triode so as to drive the first triode to be conducted;
and according to the resistance values determined by the fourth resistor and the fifth resistor, the first triode which is conducted is enabled to complete the conversion of the signal level high and low and the signal logic inversion.
4. The PWM-based communication interface circuit according to claim 1, wherein the PWM output driving circuit comprises: the first end of the sixth resistor is connected with the second end of the MCU control unit, the second triode is an NPN type transistor, the base electrode of the second triode is connected with the second end of the sixth resistor and the positive electrode of the first diode, the negative electrode of the first diode is connected with the positive electrode of the second diode, the negative electrode of the second diode is grounded, the emitter of the second triode is connected with the first end of the seventh resistor, the second end of the seventh resistor is grounded, the collector of the second triode is connected to the public connection point A,
the level of the PWM-based communication bus is pulled up through a current source in advance, and a level signal is output through an MCU control unit to drive the second triode to work in a saturated state and pull down the level of the PWM-based communication bus so as to send the PWM-based communication bus signal;
based on the second triode working in a saturated state to pull down the voltage of the collector electrode of the second triode, sending an external level signal to the MCU control unit to receive the PWM-based communication bus signal;
when the external wire harness is short-circuited to the power supply, current is limited through the seventh resistor, and the working state of the second triode is changed into a linear amplification state so as to protect hardware.
5. The pwm-based communication interface circuit of claim 1, wherein the current source circuit comprises: the positive pole of the third diode and the first end of the eighth resistor are commonly connected to a second power supply, the negative pole of the third diode is connected with the positive pole of the fourth diode, the third triode is a PNP type transistor, the emitting pole of the third triode is connected with the second end of the eighth resistor, the base of the third triode is connected with the first end of the ninth resistor and the negative pole of the fourth resistor, and the second end of the ninth resistor is grounded, wherein a current source circuit formed by the third diode, the fourth diode, the third triode, the eighth resistor and the ninth resistor provides stable current driving capability, and the output current of the current source circuit is 2-8 mA.
6. The pwm-based communication interface circuit of claim 5, wherein the interface protection circuit comprises: the positive pole of the fifth diode is connected with the collector electrode of the third triode, the negative pole of the fifth diode, the positive pole of the sixth diode and the first end of the second capacitor are commonly connected to other external PWM communication nodes through an external wiring harness, the negative pole of the sixth diode is connected to the common connection point A, the second end of the second capacitor is grounded,
providing noise filtering and antistatic protection for the input signal through the second capacitor;
and providing hardware protection of reverse power supply connection and ground offset through the fifth diode and the sixth diode.
7. The pwm-based communication interface circuit of claim 1, further comprising: and the fault diagnosis circuit is used for testing and diagnosing faults generated by the PWM-based communication bus.
8. The pwm-based communication interface circuit of claim 7, wherein the fault diagnosis circuit comprises: the low-pass filter circuit comprises a first capacitor, a first resistor and a second resistor, wherein the first end of the first capacitor, the first end of the first resistor and the first end of the second resistor are commonly connected to the third end of the MCU control unit, the second end of the first capacitor and the second end of the first resistor are commonly grounded, and the second end of the second resistor is connected to a common connection point A, wherein faults generated by a communication bus based on PWM are tested and diagnosed through the low-pass filter circuit formed by the first resistor, the second resistor and the first resistor.
9. A power module, characterized in that the power module comprises the communication interface circuit based on pulse width modulation and an MCU control unit according to any one of claims 1 to 8, wherein the first end, the second end and the third end of the communication interface circuit based on pulse width modulation are respectively connected with the first end, the second end and the third end of the MCU control unit, and the fourth end of the communication interface circuit based on pulse width modulation is connected with other external PWM communication nodes through an external wire harness.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321669121.6U CN220292010U (en) | 2023-06-28 | 2023-06-28 | Communication interface circuit and power module based on pulse width modulation |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321669121.6U CN220292010U (en) | 2023-06-28 | 2023-06-28 | Communication interface circuit and power module based on pulse width modulation |
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| CN220292010U true CN220292010U (en) | 2024-01-02 |
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| CN202321669121.6U Active CN220292010U (en) | 2023-06-28 | 2023-06-28 | Communication interface circuit and power module based on pulse width modulation |
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