CN220273656U - Power supply voltage conversion comparison circuit - Google Patents
Power supply voltage conversion comparison circuit Download PDFInfo
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- CN220273656U CN220273656U CN202322014430.6U CN202322014430U CN220273656U CN 220273656 U CN220273656 U CN 220273656U CN 202322014430 U CN202322014430 U CN 202322014430U CN 220273656 U CN220273656 U CN 220273656U
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 14
- 230000001105 regulatory effect Effects 0.000 claims abstract description 19
- 239000003990 capacitor Substances 0.000 claims description 39
- 230000009466 transformation Effects 0.000 claims description 6
- 230000003287 optical effect Effects 0.000 claims description 5
- 230000000694 effects Effects 0.000 abstract 1
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
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Abstract
The utility model discloses a power supply voltage conversion comparison circuit which comprises a voltage regulating circuit, a signal indicating circuit, a comparison circuit and an alarm circuit, wherein the voltage regulating circuit, the signal indicating circuit, the comparison circuit and the alarm circuit are coupled through a connecting terminal P, the connecting terminal P comprises 3 groups of interfaces, one end of a 1 st group of interfaces is grounded, the other end of the 1 st group of interfaces is coupled with the comparison circuit, one end of a 2 nd group of interfaces is coupled with the signal indicating circuit, the other end of the 2 nd group of interfaces is coupled with the voltage regulating circuit, one end of the 3 rd group of interfaces is connected with a VCC end, and the other end of the 3 rd group of interfaces is connected with the alarm circuit. The utility model has low cost and good effect.
Description
Technical Field
The utility model relates to the field of circuits, in particular to a power supply voltage conversion comparison circuit.
Background
The power supply voltage conversion comparison circuit in the prior art is realized by a comparator, the comparator compares an analog voltage signal with a reference fixed voltage, the output voltage generates transition nearby the same amplitude, and correspondingly outputs high level or low level, the comparator can form a non-sinusoidal waveform conversion circuit and is applied to the fields of analog and digital signal conversion and the like, but the cost of the comparator is higher.
Disclosure of Invention
In order to achieve the above purpose, the present utility model provides the following technical solutions:
the power supply voltage conversion comparison circuit comprises a voltage regulating circuit, a signal indicating circuit, a comparison circuit and an alarm circuit, wherein the voltage regulating circuit, the signal indicating circuit, the comparison circuit and the alarm circuit are coupled through a connecting terminal P, the connecting terminal P comprises 3 groups of interfaces, one end of the 1 st group of interfaces is grounded, the other end of the 1 st group of interfaces is coupled with the comparison circuit, one end of the 2 nd group of interfaces is coupled with the signal indicating circuit, the other end of the 2 nd group of interfaces is coupled with the voltage regulating circuit, one end of the 3 rd group of interfaces is connected with a VCC end, and the other end of the 3 rd group of interfaces is connected with the alarm circuit.
Further, the voltage regulating circuit includes a voltage transformation input interface and a control chip U2, the voltage transformation input interface is coupled with four diodes D1-D4 for rectification, the four diodes D1-D4 are connected in parallel with a capacitor C1 and a capacitor C2, the input end of the 2 nd group interface of the connection terminal P is electrically connected with the positive electrode of the capacitor C2 and the diode D5 respectively, the positive electrode of the capacitor C2 is electrically connected with the 3 rd pin of the control chip U2, the diode D5 is electrically connected with the 2 nd pin of the control chip U2, the 1 st pin of the control chip U2 is electrically connected with a slide resistor RP1, a resistor R1, a diode D6, a capacitor C3, the resistor R1 and the diode D6 are electrically connected with the diode D5 respectively, the diode D6 and the capacitor C3 are also connected with a capacitor C4 in parallel, the capacitor C5 is connected with a resistor R2 and an optocoupler D7 electrically, and the resistor R2 is electrically connected with the terminal VCC.
Further, the comparison circuit comprises an NOT gate U1C, an NOT gate U1D and an NOT gate U1E, a 5 th pin of the NOT gate U1C and an 11 th pin of the NOT gate U1E are electrically connected with the input end of the 1 st group interface of the connecting terminal P, a 10 th pin of the NOT gate U1E is electrically connected with a 9 th pin of the NOT gate U1D, an 8 th pin of the NOT gate U1D is electrically connected with a group of parallel optical couplers D9 and D10, the optical couplers D9 and D10 are electrically connected with a resistor R5, and the resistor R5 is electrically connected with the NOT gate U1C.
Further, the signal indication circuit includes a not gate U1A, a not gate U1B, a not gate U1F, a 1 st pin of the not gate U1A is electrically connected to a resistor R3, a 2 nd pin of the not gate U1A is electrically connected to a sliding resistor RP2 and a 3 rd pin of the not gate U1B, a 4 th pin of the not gate U1B is electrically connected to a capacitor C6 and a 13 th pin of the not gate U1F, a 12 th pin of the not gate U1F outputs a signal and is electrically connected to a 2 nd group interface of the connection terminal P, a 12 th pin of the not gate U1F is electrically connected to a resistor R4, and the resistor R4 is electrically connected to an optocoupler D8.
Further, the alarm circuit includes a buzzer LS1, one end of the buzzer LS1 is connected to the VCC terminal, the other end is electrically connected to a collector of a triode Q1, a base of the triode Q1 is electrically connected to the 3 rd group of interfaces of the connection terminal P, and an emitter of the triode Q1 is grounded.
Compared with the prior art, the utility model has the following beneficial effects:
the capacitor C1, the capacitor C2, the capacitor C4 and the capacitor C5 in the voltage regulating circuit carry out filtering voltage stabilization on input and output voltages, the rectifying circuit is connected with a resistor R2 in series to limit current to serve as an indicator lamp of the output voltage, and the output voltage value is regulated through the resistance value of the sliding resistor RP 1. The BEEL terminal and the VCC terminal are used for measuring the on-off of a wire or a circuit board, when the wire is disconnected, the BEEI is quite dry and suspended and not connected, the base level of the triode Q1 is quite suspended, the triode is cut off, the collector electrode and the emitter electrode are not conducted, the buzzer does not sound, when the measured wire or the wire is on, the BEEL is directly connected to the VCC, the base electrode of the triode is at a high potential, the collector electrode and the emitter electrode are conducted, the buzzer sounds, and the measured wire or the wire is in short circuit connection. The signal indicating circuit comprises an RC oscillating circuit formed by a sliding resistor RP2 and a capacitor C6, and is matched with the resistor R2 and three NOT gates, so that out outputs a square wave signal, when a high level is output, the optocoupler D8 is lightened, and when a low level is output, the optocoupler D8 is extinguished, so that the flicker frequency of the optocoupler D8 is the square wave frequency. The comparison circuit is composed of three NOT gates, LEDs and resistors, when IN inputs high level, the eight pins of U1D output high level, the high level indicating lamp D10 can be lightened, the low level indicating lamp D9 is not lightened, when IN inputs low level, the 8 pins output low level, the 6 pins output high level, the high level indicating lamp D10 is not lightened, the low level indicating lamp D9 is lightened, and whether the input high level or the low level is obtained can be known by observing which lamp is lightened.
Drawings
Fig. 1 is a schematic circuit diagram of the present application.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
The application provides a power supply voltage conversion comparison circuit, as shown in fig. 1, comprising a voltage regulating circuit, a signal indicating circuit, a comparison circuit and an alarm circuit, wherein the voltage regulating circuit, the signal indicating circuit, the comparison circuit and the alarm circuit are coupled through a connecting terminal P, the connecting terminal P comprises 3 groups of interfaces, one end of the 1 st group of interfaces is grounded, the other end of the 1 st group of interfaces is coupled with the comparison circuit, one end of the 2 nd group of interfaces is coupled with the signal indicating circuit, the other end of the 2 nd group of interfaces is coupled with the voltage regulating circuit, one end of the 3 rd group of interfaces is connected with a VCC end, and the other end of the 3 rd group of interfaces is connected with the alarm circuit.
Further, the voltage regulating circuit includes a voltage transformation input interface and a control chip U2, the voltage transformation input interface is coupled with four diodes D1-D4 for rectification, the four diodes D1-D4 are connected in parallel with a capacitor C1 and a capacitor C2, the input end of the 2 nd group interface of the connection terminal P is electrically connected with the positive electrode of the capacitor C2 and the diode D5 respectively, the positive electrode of the capacitor C2 is electrically connected with the 3 rd pin of the control chip U2, the diode D5 is electrically connected with the 2 nd pin of the control chip U2, the 1 st pin of the control chip U2 is electrically connected with a slide resistor RP1, a resistor R1, a diode D6, a capacitor C3, the resistor R1 and the diode D6 are electrically connected with the diode D5 respectively, the diode D6 and the capacitor C3 are also connected with a capacitor C4 in parallel, the capacitor C5 is connected with a resistor R2 and an optocoupler D7 electrically, and the resistor R2 is electrically connected with the terminal VCC.
Further, the comparison circuit comprises an NOT gate U1C, an NOT gate U1D and an NOT gate U1E, a 5 th pin of the NOT gate U1C and an 11 th pin of the NOT gate U1E are electrically connected with the input end of the 1 st group interface of the connecting terminal P, a 10 th pin of the NOT gate U1E is electrically connected with a 9 th pin of the NOT gate U1D, an 8 th pin of the NOT gate U1D is electrically connected with a group of parallel optical couplers D9 and D10, the optical couplers D9 and D10 are electrically connected with a resistor R5, and the resistor R5 is electrically connected with the NOT gate U1C.
Further, the signal indication circuit includes a not gate U1A, a not gate U1B, a not gate U1F, a 1 st pin of the not gate U1A is electrically connected to a resistor R3, a 2 nd pin of the not gate U1A is electrically connected to a sliding resistor RP2 and a 3 rd pin of the not gate U1B, a 4 th pin of the not gate U1B is electrically connected to a capacitor C6 and a 13 th pin of the not gate U1F, a 12 th pin of the not gate U1F outputs a signal and is electrically connected to a 2 nd group interface of the connection terminal P, a 12 th pin of the not gate U1F is electrically connected to a resistor R4, and the resistor R4 is electrically connected to an optocoupler D8.
Further, the alarm circuit includes a buzzer LS1, one end of the buzzer LS1 is connected to the VCC terminal, the other end is electrically connected to a collector of a triode Q1, a base of the triode Q1 is electrically connected to the 3 rd group of interfaces of the connection terminal P, and an emitter of the triode Q1 is grounded.
Compared with the prior art, the utility model has the following beneficial effects:
the capacitor C1, the capacitor C2, the capacitor C4 and the capacitor C5 in the voltage regulating circuit carry out filtering voltage stabilization on input and output voltages, the rectifying circuit is connected with a resistor R2 in series to limit current to serve as an indicator lamp of the output voltage, and the output voltage value is regulated through the resistance value of the sliding resistor RP 1. The BEEL terminal and the VCC terminal are used for measuring the on-off of a wire or a circuit board, when the wire is disconnected, the BEEI is quite dry and suspended and not connected, the base level of the triode Q1 is quite suspended, the triode is cut off, the collector electrode and the emitter electrode are not conducted, the buzzer does not sound, when the measured wire or the wire is on, the BEEL is directly connected to the VCC, the base electrode of the triode is at a high potential, the collector electrode and the emitter electrode are conducted, the buzzer sounds, and the measured wire or the wire is in short circuit connection. The signal indicating circuit comprises an RC oscillating circuit formed by a sliding resistor RP2 and a capacitor C6, and is matched with the resistor R2 and three NOT gates, so that out outputs a square wave signal, when a high level is output, the optocoupler D8 is lightened, and when a low level is output, the optocoupler D8 is extinguished, so that the flicker frequency of the optocoupler D8 is the square wave frequency. The comparison circuit is composed of three NOT gates, LEDs and resistors, when IN inputs high level, the eight pins of U1D output high level, the high level indicating lamp D10 can be lightened, the low level indicating lamp D9 is not lightened, when IN inputs low level, the 8 pins output low level, the 6 pins output high level, the high level indicating lamp D10 is not lightened, the low level indicating lamp D9 is lightened, and whether the input high level or the low level is obtained can be known by observing which lamp is lightened.
Although embodiments of the present utility model have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.
Claims (5)
1. The power supply voltage conversion comparison circuit is characterized by comprising a voltage regulating circuit, a signal indicating circuit, a comparison circuit and an alarm circuit, wherein the voltage regulating circuit, the signal indicating circuit, the comparison circuit and the alarm circuit are coupled through a connecting terminal P, the connecting terminal P comprises 3 groups of interfaces, one end of the 1 st group of interfaces is grounded, the other end of the 1 st group of interfaces is coupled with the comparison circuit, one end of the 2 nd group of interfaces is coupled with the signal indicating circuit, the other end of the 2 nd group of interfaces is coupled with the voltage regulating circuit, one end of the 3 rd group of interfaces is connected with the VCC end, and the other end of the 3 rd group of interfaces is connected with the alarm circuit.
2. The power supply voltage conversion and comparison circuit according to claim 1, wherein the voltage regulating circuit comprises a voltage transformation input interface and a control chip U2, the voltage transformation input interface is coupled with four diodes D1-D4 for rectification, the four diodes D1-D4 are connected with a capacitor C1 and a capacitor C2 in parallel, the input end of the 2 nd group interface of the connection terminal P is electrically connected with the positive pole of the capacitor C2 and the diode D5 respectively, the positive pole of the capacitor C2 is also electrically connected with the 3 rd pin of the control chip U2, the diode D5 is electrically connected with the 2 nd pin of the control chip U2, the 1 st pin of the control chip U2 is electrically connected with a slide resistor RP1, a resistor R1, a diode D6, a capacitor C3, the resistor R1 and the diode D6 are electrically connected with the diode D5 respectively, the diode D6 and the capacitor C3 are also connected with a capacitor C4 in parallel, the capacitor C4 is connected with a capacitor C5 in parallel, the capacitor C5 is electrically connected with a resistor R2 and a resistor R7 electrically connected with the end of the photo coupler D7.
3. The power supply voltage conversion and comparison circuit according to claim 1, wherein the comparison circuit comprises an inverter U1C, an inverter U1D, and an inverter U1E, a 5 th pin of the inverter U1C and an 11 th pin of the inverter U1E are electrically connected with an input end of the 1 st group interface of the connection terminal P, a 10 th pin of the inverter U1E is electrically connected with a 9 th pin of the inverter U1D, an 8 th pin of the inverter U1D is electrically connected with a group of parallel optocouplers D9 and D10, the optocouplers D9 and D10 are electrically connected with a resistor R5, and the resistor R5 is electrically connected with the inverter U1C.
4. The power supply voltage conversion and comparison circuit according to claim 1, wherein the signal indication circuit comprises a not gate U1A, a not gate U1B, and a not gate U1F, the 1 st pin of the not gate U1A is electrically connected to a resistor R3, the 2 nd pin of the not gate U1A is electrically connected to a slide resistor RP2 and the 3 rd pin of the not gate U1B, the 4 th pin of the not gate U1B is electrically connected to a capacitor C6 and the 13 th pin of the not gate U1F, the 12 th pin of the not gate U1F outputs a signal and is electrically connected to the 2 nd group interface of the connection terminal P, the 12 th pin of the not gate U1F is further electrically connected to a resistor R4, and the resistor R4 is electrically connected to an optical coupler D8.
5. The power supply voltage conversion and comparison circuit according to claim 1, wherein the alarm circuit comprises a buzzer LS1, one end of the buzzer LS1 is connected to the VCC terminal, the other end of the buzzer LS1 is electrically connected to a collector of a triode Q1, a base of the triode Q1 is electrically connected to the 3 rd set of interfaces of the connection terminal P, and an emitter of the triode Q1 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322014430.6U CN220273656U (en) | 2023-07-28 | 2023-07-28 | Power supply voltage conversion comparison circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322014430.6U CN220273656U (en) | 2023-07-28 | 2023-07-28 | Power supply voltage conversion comparison circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220273656U true CN220273656U (en) | 2023-12-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322014430.6U Active CN220273656U (en) | 2023-07-28 | 2023-07-28 | Power supply voltage conversion comparison circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220273656U (en) |
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2023
- 2023-07-28 CN CN202322014430.6U patent/CN220273656U/en active Active
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