CN220234637U - S-band broadband secondary down-conversion assembly - Google Patents
S-band broadband secondary down-conversion assembly Download PDFInfo
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- CN220234637U CN220234637U CN202321494108.1U CN202321494108U CN220234637U CN 220234637 U CN220234637 U CN 220234637U CN 202321494108 U CN202321494108 U CN 202321494108U CN 220234637 U CN220234637 U CN 220234637U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The utility model discloses an S-band broadband secondary down-conversion assembly, which belongs to the technical field of radio frequency communication and comprises a control circuit, wherein the control circuit is connected with a local oscillation circuit and a frequency conversion circuit, and the local oscillation circuit is also connected with a clock distribution circuit; the frequency conversion circuit comprises a primary frequency conversion circuit and a secondary frequency conversion circuit, and the primary frequency conversion circuit is connected with the secondary frequency conversion circuit through a first numerical control attenuator. The utility model adopts secondary frequency selection, only allows the signals which are matched with the frequency range allowed to pass by the frequency conversion circuit, realizes the branching down-conversion treatment of the S-band signals, does not need to arrange a front narrowband filter bank, and further reduces the circuit volume; meanwhile, an input S-band signal is processed in a secondary down-conversion mode, and a numerical control attenuator is introduced, so that a receiving channel has wider working dynamics, the input signal is screened, and the image frequency interference is reduced.
Description
Technical Field
The utility model relates to the technical field of radio frequency communication, in particular to an S-band broadband secondary down-conversion assembly.
Background
Downconverters are key components of microwave receivers and are widely used in microwave communications, radar, remote control, and many microwave measurement systems. The down converter with good design can inhibit out-of-band interference and provide a certain frequency conversion gain, and finally frequency-convert the signal to the frequency band meeting the demodulation terminal. As a core device of the ground detection system, performance indexes such as the working frequency bandwidth, the dynamic range, the channel stepping and the like of the microwave down-converter play an important role in the performance of the whole link, so that the microwave down-converter is required to pursue the wide frequency band and the wide dynamic range applicability of the device as much as possible on the premise of completing the basic frequency conversion function.
The traditional one-time frequency conversion mode has the advantages of small combined frequency interference, simple equipment, high reliability, light weight, low power consumption, low cost and the like, but a preposed narrow-band filter bank is needed in broadband octave receiving to inhibit image frequency interference, so that the volume of the device is increased sharply in broadband working, and the device cannot be suitable for broadband down-conversion occasions. The circuit for up-conversion for 3 times of broadband reception adopts multiple intermediate frequency multi-section receiving coverage and other modes, and has the same problems of overlarge volume and the like.
Disclosure of Invention
The utility model aims to solve the problems in the prior art and provides an S-band broadband secondary down-conversion assembly.
The aim of the utility model is realized by the following technical scheme: the S-band broadband secondary down-conversion assembly comprises a control circuit, wherein the control circuit is connected with a local oscillation circuit and a frequency conversion circuit, and the local oscillation circuit is also connected with a clock distribution circuit; the power supply circuit is used for providing working voltages for the control circuit, the local oscillation circuit, the frequency conversion circuit and the clock distribution circuit;
the frequency conversion circuit comprises a primary frequency conversion circuit and a secondary frequency conversion circuit, and the primary frequency conversion circuit is connected with the secondary frequency conversion circuit through a first numerical control attenuator.
In an example, the frequency conversion circuit is a first frequency conversion circuit and a second frequency conversion circuit with the same circuit structure.
In an example, the local oscillator circuit includes a first local oscillator circuit for providing a first local oscillator signal and a second local oscillator circuit for providing a second local oscillator signal.
In an example, the first local oscillator sub-circuit includes a first phase-locked loop circuit and a first local oscillator amplifier connected in sequence, and the first phase-locked loop circuit is connected with an output end of the clock distribution circuit.
In an example, the second local oscillator sub-circuit includes a second phase-locked loop circuit and a second local oscillator amplifier connected in sequence, and the second phase-locked loop circuit is connected to an output terminal of the clock distribution circuit.
In an example, the clock distribution circuit includes a fourth amplifier, a power divider, and a low pass filter connected in sequence, the low pass filter being connected to the local oscillator circuit.
In an example, the primary frequency conversion circuit includes a pre-selector, a low noise amplifier, a first mixer, a first band-pass filter, and a first intermediate frequency amplifier connected in sequence, where the first mixer is connected to an output end of the first local oscillator sub-circuit.
In an example, the secondary frequency conversion circuit includes a second mixer, a second band-pass filter, a second intermediate frequency amplifier and a third intermediate frequency amplifier that are sequentially connected, and the second mixer is connected with an output end of the primary frequency conversion circuit and an output end of the second local oscillator sub-circuit.
In an example, a second digital attenuator is disposed between the second intermediate frequency amplifier and the third intermediate frequency amplifier.
In an example, a signal gating circuit is arranged between the second intermediate frequency amplifier and the second digital attenuator, and the signal gating circuit comprises a first radio frequency three-in-one switch and a second radio frequency three-in-one switch, a third band-pass filter and a fourth band-pass filter are arranged between the first radio frequency three-in-one switch and the second radio frequency three-in-one switch in parallel, and the first radio frequency three-in-one switch and the second radio frequency three-in-one switch are directly connected in a through manner.
It should be further noted that the technical features corresponding to the examples above may be combined with each other or replaced to form a new technical solution.
Compared with the prior art, the utility model has the beneficial effects that:
1. in an example, the down-conversion component adopts secondary frequency selection, only allows signals with the frequency range matched with the frequency range allowed to pass by a frequency conversion circuit consisting of the circuit band-pass filter and the local oscillator working frequency, realizes the branching down-conversion processing of S-band signals, does not need to be provided with a front-end narrow-band filter bank, and further reduces the circuit volume; meanwhile, an input S-band signal is processed in a secondary down-conversion mode, and a numerical control attenuator is introduced, so that a receiving channel has wider working dynamics, the input signal is screened, and the image frequency interference is reduced.
2. In an example, two frequency conversion circuits with the same circuit structure are arranged to respectively and independently output target intermediate frequency signals, so that an intermediate frequency signal output channel is increased, when one frequency conversion circuit fails, the other frequency conversion circuit can still work normally, the fault tolerance of the down conversion component is improved, and the working reliability of the down conversion component is ensured.
2. In one example, a second digital attenuator is introduced to facilitate channel gain control, widening the operational dynamic range of the receive channel.
3. In an example, by setting a signal gating circuit and matching with band-pass filters with different center frequencies and bandwidths, intermediate frequency signal selection with different bandwidths is completed.
Drawings
The following detailed description of the present utility model is further detailed in conjunction with the accompanying drawings, which are provided to provide a further understanding of the present application, and in which like reference numerals are used to designate like or similar parts throughout the several views, and in which the illustrative examples and descriptions thereof are used to explain the present application and are not meant to be unduly limiting.
FIG. 1 is a circuit diagram of a down conversion assembly in an example of the utility model;
FIG. 2 is a circuit diagram of a down conversion assembly in another example of the utility model;
FIG. 3 is a schematic diagram of a first local oscillator sub-circuit according to an embodiment of the present utility model;
FIG. 4 is a schematic diagram of a second local oscillator sub-circuit according to an embodiment of the present utility model;
FIG. 5 is a schematic diagram of a clock distribution circuit according to an example of the present utility model;
fig. 6 is a schematic diagram of a frequency conversion circuit according to an example of the present utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made apparent and fully understood from the accompanying drawings, in which some, but not all embodiments of the utility model are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In the description of the present utility model, it should be noted that directions or positional relationships indicated as being "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are directions or positional relationships described based on the drawings are merely for convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the apparatus or elements to be referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model. Further, ordinal words (e.g., "first and second," "first through fourth," etc.) are used to distinguish between objects, and are not limited to this order, but rather are not to be construed to indicate or imply relative importance.
In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present utility model will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present utility model described below may be combined with each other as long as they do not collide with each other.
In an example, as shown in fig. 1, an S-band wideband secondary down-conversion component includes a control circuit, a local oscillation circuit, a frequency conversion circuit, a clock distribution circuit, and a power supply circuit, where an output end of the control circuit is connected to the local oscillation circuit and the frequency conversion circuit, an output end of the clock distribution circuit is connected to the local oscillation circuit, and an output end of the power supply circuit is connected to the control circuit, the local oscillation circuit, the frequency conversion circuit, and the clock distribution circuit.
Further, the frequency conversion circuit comprises a primary frequency conversion circuit and a secondary frequency conversion circuit, and the primary frequency conversion circuit is connected with the secondary frequency conversion circuit through the first numerical control attenuator.
In this example, the clock distribution circuit is configured to distribute an external reference clock to the local oscillation circuit, and use the external reference clock as a local oscillation reference signal; the control circuit receives an external SPI control signal, converts the SPI control signal into frequency information or attenuation control information, and when the SPI control signal is the frequency information, controls the local oscillation circuit to output a corresponding local oscillation signal (local oscillation frequency) through the serial bus; when the attenuation control information is the attenuation control information, an intermediate frequency bandwidth selection circuit for configuring an attenuation value of the numerical control attenuator and controlling a frequency conversion channel is used for bandwidth selection; the frequency conversion circuit is used for performing secondary down-conversion processing on the input S-band signal so as to obtain a target intermediate frequency signal; the power supply circuit is used for filtering, protecting and secondarily stabilizing the external input voltage, so as to provide stable working voltage for each circuit.
In the example, the secondary frequency conversion is adopted, only signals which are matched with the frequency range allowed to pass by the frequency conversion circuit are allowed, the branching down-conversion processing is realized on the S-band signals, a front-mounted narrow-band filter bank is not required to be arranged, and the circuit size is further reduced; meanwhile, an input S-band signal is processed in a secondary down-conversion mode, and a numerical control attenuator is introduced, so that a receiving channel has wider working dynamics, the input signal is screened, and the image frequency interference is reduced.
In an example, as shown in fig. 2, the frequency conversion circuit is a first frequency conversion circuit and a second frequency conversion circuit which have the same circuit structure and are independently arranged, and at this time, the frequency down conversion assembly comprises 2 frequency down conversion channels which are independently adjustable (all channels can work independently and do not interfere with each other). The allowable signal frequency of each down-conversion channel is determined by the local oscillation frequency, and 2 frequency conversion channels can receive different signals without mutual influence because the local oscillation of the channels is independently adjustable. In the example, by arranging the two frequency conversion circuits with the same circuit structure, the target intermediate frequency signals are respectively and independently output, the intermediate frequency signal output channels are increased, when one frequency conversion circuit fails, the other frequency conversion circuit can still work normally, the fault tolerance of the down conversion component is improved, and the working reliability of the down conversion component is ensured.
In an example, the local oscillator circuit includes a first local oscillator circuit and a second local oscillator circuit, the first local oscillator circuit is used for providing a first local oscillator signal required by the primary frequency conversion circuit, and the second local oscillator circuit is used for providing a second local oscillator signal required by the secondary frequency conversion circuit, so as to realize twice signal frequency conversion processing.
In an example, as shown in fig. 3, the first local oscillator sub-circuit includes a first phase-locked loop circuit and a first local oscillator amplifier, which are sequentially connected, the first phase-locked loop circuit is connected to an output terminal of the clock distribution circuit, and the first local oscillator amplifier is connected to a mixer (first mixer) in the primary frequency conversion circuit. The clock distribution circuit is used for distributing a reference clock signal to the first local oscillator sub-circuit, the first phase-locked loop circuit generates a first frequency signal based on the reference clock signal, and the first frequency signal is subjected to signal amplification processing by the first local oscillator amplifier so as to obtain the first local oscillator signal.
In an example, as shown in fig. 4, the second local oscillator circuit includes a second phase-locked loop circuit and a second local oscillator amplifier, which are sequentially connected, the second phase-locked loop circuit is connected to an output terminal of the clock distribution circuit, and the second local oscillator amplifier is connected to a mixer (second mixer) in the secondary frequency conversion circuit. The clock distribution circuit is used for distributing a reference clock signal to the second local oscillator sub-circuit, the second phase-locked loop circuit generates a second frequency signal based on the reference clock signal, and the second frequency signal is subjected to signal amplification processing by the second local oscillator amplifier, so that a second local oscillator signal is obtained.
In one example, as shown in fig. 5, the clock distribution circuit includes a fourth amplifier, a power divider, and a low-pass filter connected in sequence, the low-pass filter is connected to the local oscillator circuit, and an input terminal of the fourth amplifier is connected to a radio frequency socket of a reference clock signal (reference signal). The power divider can be a 1-division-2 power divider or a 1-division-4 power divider, and is specifically determined according to the number of local oscillation signals required by all frequency conversion circuits, and the 1-division-4 power divider is specifically provided in this example, and at this moment, the down conversion component comprises a first frequency conversion circuit and a second frequency conversion circuit which have the same circuit structure and are mutually independent, and the first frequency conversion circuit and the second frequency conversion circuit are both secondary frequency conversion circuits, so that four paths of local oscillation signals are required altogether. Correspondingly, the 1-division 4-power divider is connected with 4 low-pass filters, and the four low-pass filters are respectively connected with a first local oscillator sub-circuit and a second local oscillator sub-circuit in the first frequency conversion circuit and the first local oscillator sub-circuit and the second local oscillator sub-circuit in the second frequency conversion circuit. At this time, the fourth amplifier amplifies the reference clock signal, the power divider divides the clock signal, and the low-pass filter is used for filtering the clock signal to obtain a reference clock signal, and inputs the reference clock signal to the corresponding local oscillator sub-circuit.
In an example, as shown in fig. 6, the primary frequency conversion circuit includes a pre-selector (band-pass filter), a low-noise amplifier, a first mixer, a first band-pass filter, and a first intermediate frequency amplifier connected in sequence, and the first mixer is connected to an output terminal of the first local oscillator sub-circuit. The pre-selector is used for determining the working frequency of the frequency conversion assembly, and the first local oscillator sub-circuit is used for determining tuning steps of the frequency conversion assembly. At this time, the pre-selector is configured to receive a specific band signal, i.e. an S-band signal, and enter the first mixer after being subjected to low-noise and amplification processing by the low-noise amplifier, and meanwhile, the first local oscillator sub-circuit provides a first local oscillator signal for the first mixer, the first mixer outputs a first intermediate frequency signal (intermediate signal), and the first intermediate frequency signal is input into the secondary frequency conversion circuit after being subjected to amplification processing by the first intermediate frequency amplifier, i.e.: the first intermediate frequency amplifier is connected with the secondary frequency conversion circuit through the first numerical control attenuator.
In an example, the secondary frequency conversion circuit includes a second mixer, a second band-pass filter, a second intermediate frequency amplifier and a third intermediate frequency amplifier connected in sequence, and the second mixer is connected with an output end of the first digital control attenuator and an output end of the second local oscillator sub-circuit. The second local oscillator sub-circuit is used for determining tuning steps of the frequency conversion assembly. At this time, the second mixer receives the first intermediate frequency signal and the second local oscillator signal provided by the second local oscillator sub-circuit, outputs a second intermediate frequency signal, performs filtering processing on the second intermediate frequency signal through the second band-pass filter, and performs twice amplification processing through the second intermediate frequency amplifier and the third intermediate frequency amplifier to obtain a final target intermediate frequency signal.
In an example, a second digital attenuator is arranged between the second intermediate frequency amplifier and the third intermediate frequency amplifier, in the example, the second digital attenuator is introduced to be matched with the first digital attenuator for determining the dynamic range of the frequency conversion assembly, so that the control of the channel gain is facilitated, and the working dynamic range of the receiving channel is widened.
In an example, as shown in fig. 6, a signal gating circuit is disposed between the second intermediate frequency amplifier and the second digital attenuator, and the signal gating circuit includes a first radio frequency three-in-one switch and a second radio frequency three-in-one switch, a third band-pass filter and a fourth band-pass filter are disposed in parallel between the first radio frequency three-in-one switch and the second radio frequency three-in-one switch, and the first radio frequency three-in-one switch and the second radio frequency three-in-one switch are directly connected in a through manner, that is: the first output end of the first radio frequency three-selecting switch is connected with the first input end of the second radio frequency three-selecting switch through a third band-pass filter, the second output end of the first radio frequency three-selecting switch is in direct connection with the second input end of the second radio frequency three-selecting switch, the third output end of the first radio frequency three-selecting switch is connected with the third input end of the second radio frequency three-selecting switch through a fourth band-pass filter, the first radio frequency three-selecting switch and the second radio frequency three-selecting switch are matched with band-pass filters with different center frequencies and bandwidths, and the second radio frequency three-selecting switch, the third band-pass filter and the fourth band-pass filter can finish intermediate frequency signal selection with different bandwidths.
Combining the above examples to obtain a preferred example of the present utility model, where the down conversion assembly includes a control circuit, a local oscillation circuit, a first frequency conversion circuit, a second frequency conversion circuit, a clock distribution circuit, and a power supply circuit, where an output end of the control circuit is connected to the local oscillation circuit, the first frequency conversion circuit, the second frequency conversion circuit, and an output end of the clock distribution circuit is connected to the local oscillation circuit, the local oscillation circuit includes a first local oscillation sub-circuit and a second local oscillation sub-circuit, and an output end of the power supply circuit is connected to the control circuit, the first local oscillation sub-circuit, the second local oscillation sub-circuit, the first frequency conversion circuit, the second frequency conversion circuit, and the clock distribution circuit. In this example, the first frequency conversion circuit and the second frequency conversion circuit have the same circuit structure and are independently arranged. Specifically, taking the first frequency conversion circuit as an example, as shown in fig. 6, the frequency conversion circuit comprises a preselector, a low-noise amplifier, a first mixer, a first bandpass filter, a first numerical control attenuator, a second mixer, a second bandpass filter, a second intermediate frequency amplifier, a first radio frequency three-in-one switch, a second numerical control attenuator and a third intermediate frequency amplifier which are sequentially connected, wherein the first mixer is connected with the output end of the first local oscillator sub-circuit, the second mixer is connected with the output end of the second local oscillator sub-circuit, a third bandpass filter and a fourth bandpass filter are arranged between the first radio frequency three-in-one switch and the second radio frequency three-in-one switch in parallel, and the first radio frequency three-in-one switch and the second radio frequency three-in-one switch are directly connected in a straight-through manner. Specifically, the passband frequency of the pre-selector covers 30 MHz-3000 MHz, the first local oscillation frequency is 3230 MHz-6200 MHz, the first mixer takes the upper mixed lower sideband frequency, at this time, the first mixer outputs a 3200MHz first intermediate frequency signal, and the center frequency of the first bandpass filter is 3200MHz so that the 3200MHz first intermediate frequency signal passes through; the second local oscillation frequency is 3340MHz, the second mixer is down-conversion, and the second mixer outputs a second intermediate frequency signal of 140MHz at the moment; the second band-pass filter, the third band-pass filter and the fourth band-pass filter have 140MHz central frequency and 60MHz/20MHz/200kHz bandwidths respectively, the first intermediate frequency digital control attenuator and the second intermediate frequency digital control attenuator are 1dB step, the 31dB attenuation digital control attenuator, and the total dynamic range is 0-60dB; the typical value of the total gain of the channel is 30dB, and the controllable gain of-30 dB to 30dB can be realized. Further, the second intermediate frequency signal is finally output after multistage filtering treatment, amplification treatment and attenuation treatment, and a final target intermediate frequency signal of 140MHz is obtained. Meanwhile, the first radio frequency three-in-one switch and the second radio frequency three-in-one switch respectively select signals to pass through a through passage and a third band-pass filter, and the fourth band-pass filter is used for completing target intermediate frequency signal selection with the bandwidth of 60MHz/20MHz/200kHz, and finally the intermediate frequency signal with the controlled bandwidth is obtained on the basis of not introducing a segmented preselection filter bank.
The foregoing detailed description of the utility model is provided for illustration, and it is not to be construed that the detailed description of the utility model is limited to only those illustration, but that several simple deductions and substitutions can be made by those skilled in the art without departing from the spirit of the utility model, and are to be considered as falling within the scope of the utility model.
Claims (10)
1. An S-band broadband secondary down-conversion assembly, characterized in that: the device comprises a control circuit, wherein the control circuit is connected with a local oscillation circuit and a frequency conversion circuit, and the local oscillation circuit is also connected with a clock distribution circuit; the power supply circuit is used for providing working voltages for the control circuit, the local oscillation circuit, the frequency conversion circuit and the clock distribution circuit;
the frequency conversion circuit comprises a primary frequency conversion circuit and a secondary frequency conversion circuit, and the primary frequency conversion circuit is connected with the secondary frequency conversion circuit through a first numerical control attenuator.
2. An S-band wideband secondary down-conversion assembly as defined in claim 1, wherein: the frequency conversion circuit is a first frequency conversion circuit and a second frequency conversion circuit which have the same circuit structure.
3. An S-band wideband secondary down-conversion assembly according to claim 1 or 2, wherein: the local oscillator circuit comprises a first local oscillator sub-circuit and a second local oscillator sub-circuit, wherein the first local oscillator sub-circuit is used for providing a first local oscillator signal, and the second local oscillator sub-circuit is used for providing a second local oscillator signal.
4. An S-band wideband secondary down-conversion assembly as recited in claim 3, wherein: the first local oscillator sub-circuit comprises a first phase-locked loop circuit and a first local oscillator amplifier which are sequentially connected, and the first phase-locked loop circuit is connected with the output end of the clock distribution circuit.
5. An S-band wideband secondary down-conversion assembly as recited in claim 3, wherein: the second local oscillator sub-circuit comprises a second phase-locked loop circuit and a second local oscillator amplifier which are sequentially connected, and the second phase-locked loop circuit is connected with the output end of the clock distribution circuit.
6. An S-band wideband secondary down-conversion assembly according to claim 1 or 2, wherein: the clock distribution circuit comprises a fourth amplifier, a power divider and a low-pass filter which are sequentially connected, and the low-pass filter is connected with the local oscillation circuit.
7. An S-band wideband secondary down-conversion assembly as recited in claim 3, wherein: the primary frequency conversion circuit comprises a preselector, a low-noise amplifier, a first mixer, a first band-pass filter and a first intermediate frequency amplifier which are sequentially connected, and the first mixer is connected with the output end of the first local oscillator sub-circuit.
8. An S-band wideband secondary down-conversion assembly as recited in claim 3, wherein: the secondary frequency conversion circuit comprises a second mixer, a second band-pass filter, a second intermediate frequency amplifier and a third intermediate frequency amplifier which are sequentially connected, and the second mixer is connected with the output end of the primary frequency conversion circuit and the output end of the second local oscillator sub-circuit.
9. The S-band broadband secondary down-conversion assembly of claim 8, wherein: and a second digital control attenuator is arranged between the second intermediate frequency amplifier and the third intermediate frequency amplifier.
10. An S-band wideband secondary down-conversion assembly as recited in claim 9, wherein: the signal gating circuit is arranged between the second intermediate frequency amplifier and the second digital control attenuator and comprises a first radio frequency three-in-one switch and a second radio frequency three-in-one switch, a third band-pass filter and a fourth band-pass filter are arranged between the first radio frequency three-in-one switch and the second radio frequency three-in-one switch in parallel, and the first radio frequency three-in-one switch and the second radio frequency three-in-one switch are directly connected in a through way.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321494108.1U CN220234637U (en) | 2023-06-12 | 2023-06-12 | S-band broadband secondary down-conversion assembly |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321494108.1U CN220234637U (en) | 2023-06-12 | 2023-06-12 | S-band broadband secondary down-conversion assembly |
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| Publication Number | Publication Date |
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| CN220234637U true CN220234637U (en) | 2023-12-22 |
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| CN202321494108.1U Active CN220234637U (en) | 2023-06-12 | 2023-06-12 | S-band broadband secondary down-conversion assembly |
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