CN220210429U - VGA internal and external synchronous signal switching circuit - Google Patents
VGA internal and external synchronous signal switching circuit Download PDFInfo
- Publication number
- CN220210429U CN220210429U CN202321355876.9U CN202321355876U CN220210429U CN 220210429 U CN220210429 U CN 220210429U CN 202321355876 U CN202321355876 U CN 202321355876U CN 220210429 U CN220210429 U CN 220210429U
- Authority
- CN
- China
- Prior art keywords
- signal
- gate
- internal
- synchronous
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000001360 synchronised effect Effects 0.000 title claims abstract description 160
- 238000006243 chemical reaction Methods 0.000 claims abstract description 30
- 238000001514 detection method Methods 0.000 abstract description 2
- 101001122448 Rattus norvegicus Nociceptin receptor Proteins 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Synchronizing For Television (AREA)
Abstract
The utility model discloses a VGA internal and external synchronization signal switching circuit, which comprises a synchronization signal polarity conversion module, an internal and external synchronization control module and an internal and external synchronization signal switching module. The synchronous signal polarity conversion module receives the external synchronous signal, performs polarity conversion on the external synchronous signal, outputs an external synchronous output signal, and the internal and external synchronous signal control module receives the external synchronous output signal converted by the synchronous signal polarity conversion module and an internal synchronous signal sent by the internal synchronous generating circuit, outputs different signals when the external synchronous signal exists or does not exist, and the internal and external synchronous signal switching module is simultaneously connected with the synchronous signal polarity conversion module and the internal and external synchronous control module and selectively outputs the external synchronous signal or the internal synchronous signal according to the signal sent by the internal and external synchronous signal control module. The scheme of the application is used as a pure hardware detection circuit, and has the characteristics of quick response time, high accuracy, stable work and the like.
Description
Technical Field
The utility model belongs to the field of VGA signal synchronization, and particularly relates to a VGA internal and external synchronization signal switching circuit.
Background
The screen display function is widely applied to various display devices, the basic condition of the screen display hardware circuit is that the line and field synchronous signals in VGA video signals are used, when the screen display circuit detects the line and field synchronous signals, the screen display window can be popped up, and if the synchronous signals are not detected, the window cannot be popped up. The synchronous signals for realizing the screen display function in the video matrix and the sharer products mainly come from VGA synchronous signals (external synchronous for short) input from the outside, if the external synchronous signals are not available, the screen display window cannot be popped up, a group of line and field synchronous signals (internal synchronous for short) need to be generated in the equipment under the condition of solving the condition of no external synchronous, when the external synchronous exists, the external synchronous is used as the synchronous input of the screen display circuit, and when the external synchronous exists, the internal synchronous is used as the synchronous input of the screen display circuit, and based on the external synchronous priority principle, conversion operation needs to be executed between the two synchronous signals. The traditional method for solving the problem of synchronous signal conversion is to detect and execute conversion on external synchronous signals through a processor in the equipment, and the control method increases the workload of the processor on one hand, and simultaneously causes the occurrence of transient instability of the screen display picture due to delay of software processing.
Disclosure of Invention
In order to solve the technical defects in the prior art, the utility model provides a VGA internal and external synchronous signal switching circuit which is used as a pure hardware detection circuit and has the characteristics of quick response time, high accuracy, stable operation and the like.
The technical solution for realizing the purpose of the utility model is as follows:
a VGA internal and external synchronous signal switching circuit comprises a synchronous signal polarity conversion module, an internal and external synchronous signal control module and an internal and external synchronous signal switching module;
the synchronous signal polarity conversion module receives the external synchronous signal, performs polarity conversion on the external synchronous signal and outputs an external synchronous output signal;
the internal and external synchronization signal control module receives the external synchronization output signal converted by the synchronization signal polarity conversion module and the internal synchronization signal sent by the internal synchronization generating circuit, and outputs different signals when the external synchronization signal exists or does not exist;
the internal and external synchronization signal switching module is connected with the synchronization signal polarity conversion module and the internal and external synchronization signal control module at the same time, and selects and outputs an external synchronization signal or an internal synchronization signal according to signals sent by the internal and external synchronization signal control module.
Further, the synchronous signal polarity conversion module comprises a first exclusive-or gate, a second exclusive-or gate, a third exclusive-or gate, a fourth exclusive-or gate, a first resistor, a second resistor, a third resistor and a fourth resistor;
the first input end of the first exclusive-or gate is connected with a row synchronous input signal of an external synchronous signal, the second input end of the first exclusive-or gate is grounded, and the output end of the first exclusive-or gate is grounded after being connected with a first resistor and a second resistor; the first input end of the second exclusive-or gate is connected with a line synchronous input signal of an external synchronous signal, the second input end of the second exclusive-or gate is grounded after being connected with the second resistor, and the output end of the second exclusive-or gate outputs a line synchronous output signal;
the first input end of the third exclusive-OR gate is connected with the field synchronous input of the external synchronous signal, the second input end of the third exclusive-OR gate is grounded, and the output end of the third exclusive-OR gate is grounded after being connected with the third resistor and the fourth resistor; the first input end of the fourth exclusive-OR gate is connected with a field synchronous input signal of the external synchronous signal, the second input end of the fourth exclusive-OR gate is grounded after being connected with the fourth resistor, and the output end of the fourth exclusive-OR gate outputs a field synchronous output signal.
Further, the internal and external synchronization signal control module comprises a first D trigger and a second D trigger;
the input end of the first D trigger is connected with VCC, the data zero clearing end of the first D trigger is connected with an external synchronous output signal after the first NOT gate is reversed, the clock input end of the first D trigger is connected with an internal synchronous signal, and the output end of the first D trigger is connected with the input end of the second D trigger;
the clock input end of the second D trigger is connected with an internal synchronizing signal, the data zero clearing end of the second D trigger is connected with an external synchronizing output signal after the inversion of the first NOT gate, and the output end of the second D trigger is connected with an internal synchronizing signal and external synchronizing signal switching module.
Furthermore, the clock input ends of the first D trigger and the second D trigger are connected with a field synchronizing signal in the internal synchronizing signal;
and the data zero clearing ends of the first D trigger and the second D trigger are connected with a line synchronization signal of an external synchronization output signal.
Further, the output signal of the output end of the second D flip-flop is an internal synchronization selection signal, and the output signal of the output end of the second D flip-flop D outputs an external synchronization selection signal after being inverted by the second nor gate.
Further, the internal and external synchronization signal switching module comprises a first AND gate, a second AND gate, a third AND gate, a fourth AND gate, a first OR gate and a second OR gate;
the first input end of the first AND gate is connected with an external synchronous selection signal, the second input end of the first AND gate is connected with a line synchronous signal in an external synchronous output signal, and the output end of the first AND gate is connected with the first input end of the first OR gate;
the first input end of the second AND gate is connected with an internal synchronous selection signal, the second input end of the second AND gate is connected with a line synchronous signal in the internal synchronous signal, and the output end of the second AND gate is connected with the second input end of the first OR gate;
the first input end of the third AND gate is connected with an external synchronous selection signal, the second input end of the third AND gate is connected with a field synchronous signal in an external synchronous output signal, and the output end of the third AND gate is connected with the first input end of the second OR gate;
the first input end of the fourth AND gate is connected with an internal synchronous selection signal, the second input end of the fourth AND gate is connected with a field synchronous signal in the internal synchronous signal, and the output end of the fourth AND gate is connected with the second input end of the second OR gate;
the output end of the first OR gate outputs a screen display line synchronous signal;
and the output end of the second OR gate outputs a screen display field synchronous signal.
Compared with the prior art, the utility model has the remarkable advantages that:
(1) The VGA internal and external synchronous signal switching circuit consists of pure hardware, and is mainly a simple gate device or trigger, and has simple circuit and high reliability;
(2) The utility model does not depend on software to switch signals, does not need processor intervention, and has quick response.
The utility model is described in further detail below with reference to the drawings and the detailed description.
Drawings
Fig. 1 is a schematic diagram of a circuit frame according to an embodiment of the utility model.
Fig. 2 is a schematic circuit diagram of a synchronous signal polarity conversion module according to an embodiment of the utility model.
Fig. 3 is a schematic circuit diagram of an internal and external synchronization signal control module according to an embodiment of the utility model.
Fig. 4 is a schematic circuit diagram of an internal and external synchronization signal switching module according to an embodiment of the utility model.
Detailed Description
It is easy to understand that various embodiments of the present utility model can be envisioned by those of ordinary skill in the art without altering the true spirit of the present utility model in light of the present teachings. Accordingly, the following detailed description and drawings are merely illustrative of the utility model and are not intended to be exhaustive or to limit or restrict the utility model. Rather, these embodiments are provided so that this disclosure will be thorough and complete by those skilled in the art. Preferred embodiments of the present utility model are described in detail below with reference to the attached drawing figures, which form a part of the present application and are used in conjunction with embodiments of the present utility model to illustrate the innovative concepts of the present utility model.
Examples
Referring to fig. 1 to 4, a VGA internal and external synchronization signal switching circuit includes an internal synchronization generating signal module, a synchronization signal polarity conversion module, an internal and external synchronization signal control module, and an internal and external synchronization signal switching module;
the synchronous signal polarity conversion module receives the external synchronous signal, performs polarity conversion on the external synchronous signal and outputs an external synchronous output signal; the main function of the module is to uniformly call the line and field signals of the VGA video signal input from the outside as positive polarity;
the VGA video signal has two conditions of positive polarity and negative polarity according to different lines and field synchronizing signals of display resolution, and the synchronizing signal polarity conversion module aims to uniformly convert the lines and field synchronizing signals with different polarities into positive polarity signals, so that the control and the use of a lower-level circuit are facilitated;
the internal and external synchronization signal control module receives the external synchronization output signal converted by the synchronization signal polarity conversion module and the internal synchronization signal sent by the internal synchronization generating circuit, and outputs different signals when the external synchronization signal exists or does not exist;
the main function of the module is to generate a control signal for controlling the conversion of the internal and external synchronous signals;
normally the VGA line signal frequency is greater than 30KHz, and the field signal frequency is less than 120Hz, the line signal frequency being much greater than the field sync signal frequency. The utility model realizes the control of the conversion of the internal and external synchronous signals by utilizing the huge difference between the frequencies of the line synchronous signals and the field synchronous signals;
the internal and external synchronization signal switching module is connected with the synchronization signal polarity conversion module and the internal and external synchronization signal control module at the same time, and selects and outputs an external synchronization signal or an internal synchronization signal according to signals sent by the internal and external synchronization signal control module;
the main function of the module is to select and output the external synchronous signal or the internal synchronous signal according to the state of the control signal generated by the upper module, and the module is mainly composed of an AND gate and an OR gate.
In this embodiment, the internal synchronization signal generating module uses an existing conventional signal generating circuit, so that a detailed description is omitted in this embodiment.
In this embodiment, the synchronization signal polarity conversion module includes a first XOR gate XOR1, a second XOR gate XOR2, a third XOR gate XOR3, a fourth XOR gate XOR4, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4;
the first input end of the first exclusive or gate XOR1 is connected with a row synchronous input signal of an external synchronous signal, the second input end of the first exclusive or gate XOR1 is grounded, and the output end of the first exclusive or gate XOR1 is grounded after being connected with a first resistor R1 and a second resistor R2; the first input end of the second exclusive-OR gate XOR2 is connected with a line synchronization input signal of an external synchronization signal, the second input end of the second exclusive-OR gate XOR2 is grounded after being connected with the second resistor R2, and the output end of the second exclusive-OR gate XOR2 outputs a line synchronization output signal and finally the line synchronization output through the second exclusive-OR gate XOR2 is always positive in polarity;
the first input end of the third exclusive or gate XOR3 is connected with the field synchronous input of the external synchronous signal, the second input end is grounded, and the output end of the third exclusive or gate XOR3 is grounded after being connected with the third resistor R3 and the fourth resistor R4; the first input end of the fourth exclusive-OR gate XOR4 is connected with a field synchronous input signal of an external synchronous signal, the second input end of the fourth exclusive-OR gate XOR4 is grounded after being connected with the fourth resistor R4, and the output end of the fourth exclusive-OR gate XOR4 outputs a field synchronous output signal, and finally the field synchronous output through the fourth exclusive-OR gate XOR4 is always positive.
The internal and external synchronous signal control module comprises a first D trigger D1 and a second D trigger D2;
the input end of the first D trigger D1 is connected with VCC, the data zero clearing end of the first D trigger D1 is connected with an external synchronous output signal after the inversion of the first NOT gate X1, the clock input end of the first D trigger D1 is connected with an internal synchronous signal, and the output end of the first D trigger D1 is connected with the input end of the second D trigger D2;
the clock input end of the second D trigger D2 is connected with an internal synchronizing signal, the zero clearing end of the second D trigger D2 is connected with an external synchronizing output signal after the inversion of the first NOT gate X1, and the output end of the second D trigger D2 is connected with an internal synchronizing signal and external synchronizing signal switching module.
The clock input ends of the first D trigger D1 and the second D trigger D2 are connected with a field synchronizing signal in the internal synchronizing signal;
and the data zero clearing ends of the first D trigger D1 and the second D trigger D2 are connected with a line synchronizing signal of an external synchronizing output signal.
Further, the output signal of the output end of the second D flip-flop D2 is an internal synchronization selection signal, and the output signal of the output end of the second D flip-flop D2 is inverted by the second not gate X2 and then outputs an external synchronization selection signal.
The core device of the module is a D trigger, when an external synchronous signal exists, the output end of the D trigger is cleared by an external line signal according to the frequency of the line synchronous signal, the clearing operation can ensure that the output of the D trigger is maintained to be zero in the time interval of one field of an internal synchronous signal, at the moment, the state of the output end of a control signal cannot be changed by an internal field signal, the input of the clear end of the D trigger is changed to be high level only when the external line signal is lost, the clear end of the trigger is not activated, the high level is latched to the data output end of the trigger by the internal field signal connected with a clock input signal of the D trigger, namely, the trigger outputs low level when the external synchronous line signal exists, and the trigger outputs high level when the external synchronous line signal does not exist.
The internal and external synchronous signal switching module comprises a first AND gate A1, a second AND gate A2, a third AND gate A3, a fourth AND gate A4, a first OR gate OR1 and a second OR gate OR2;
the first input end of the first AND gate A1 is connected with an external synchronous selection signal, the second input end of the first AND gate A1 is connected with a line synchronous signal in an external synchronous output signal, and the output end of the first AND gate A1 is connected with the first input end of the first OR gate OR 1;
the first input end of the second AND gate A2 is connected with an internal synchronous selection signal, the second input end of the second AND gate A2 is connected with a line synchronous signal in the internal synchronous signal, and the output end of the second AND gate A2 is connected with the second input end of the first OR gate OR 1;
the first input end of the third AND gate A3 is connected with an external synchronous selection signal, the second input end of the third AND gate A3 is connected with a field synchronous signal in an external synchronous output signal, and the output end of the third AND gate A3 is connected with the first input end of the second OR gate OR2;
the first input end of the fourth AND gate A4 is connected with an internal synchronous selection signal, the second input end of the fourth AND gate A4 is connected with a field synchronous signal in the internal synchronous signal, and the output end of the fourth AND gate A4 is connected with the second input end of the second OR gate OR2;
the output end of the first OR gate OR1 outputs a screen display line synchronizing signal;
the output end of the second OR gate OR2 outputs the screen display field synchronous signal.
In the module, internal synchronous selection and internal line synchronous signals are respectively output to an OR gate through an AND gate, and then 1 path of internal synchronous signals are selected and output to a screen display line for synchronization;
the external synchronous selection and external field synchronous signals, the internal synchronous selection and internal field synchronous signals are respectively output to an OR gate through an AND gate, and then 1 path of the internal synchronous selection and internal field synchronous signals is selected and output to the screen display field synchronous;
the OSD screen display realizes the display of the needed characters and images through the on-screen display line synchronization and the on-screen display field synchronization signals.
The foregoing embodiments illustrate and describe the basic principles, principal features of the utility model. It will be understood by those skilled in the art that the present utility model is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present utility model, and various changes and modifications may be made without departing from the spirit and scope of the utility model, which is defined in the appended claims.
Claims (6)
1. The VGA internal and external synchronous signal switching circuit is characterized by comprising a synchronous signal polarity conversion module, an internal and external synchronous signal control module and an internal and external synchronous signal switching module;
the synchronous signal polarity conversion module receives the external synchronous signal, performs polarity conversion on the external synchronous signal and outputs an external synchronous output signal;
the internal and external synchronization signal control module receives the external synchronization output signal converted by the synchronization signal polarity conversion module and the internal synchronization signal sent by the internal synchronization generating circuit, and outputs different signals when the external synchronization signal exists or does not exist;
the internal and external synchronization signal switching module is connected with the synchronization signal polarity conversion module and the internal and external synchronization signal control module at the same time, and selects and outputs an external synchronization signal or an internal synchronization signal according to signals sent by the internal and external synchronization signal control module.
2. The VGA internal-external synchronization signal switching circuit according to claim 1, wherein the synchronization signal polarity conversion module includes a first exclusive-or gate (XOR 1), a second exclusive-or gate (XOR 2), a third exclusive-or gate (XOR 3), and a fourth exclusive-or gate (XOR 4), a first resistor (R1), a second resistor (R2), a third resistor (R3), and a fourth resistor (R4);
the first input end of the first exclusive-OR gate (XOR 1) is connected with a row synchronous input signal of an external synchronous signal, the second input end of the first exclusive-OR gate is grounded, and the output end of the first exclusive-OR gate (XOR 1) is grounded after being connected with a first resistor (R1) and a second resistor (R2); the first input end of the second exclusive-OR gate (XOR 2) is connected with a line synchronous input signal of an external synchronous signal, the second input end of the second exclusive-OR gate (XOR 2) is grounded after being connected with the second resistor (R2), and the output end of the second exclusive-OR gate (XOR 2) outputs a line synchronous output signal;
the first input end of the third exclusive-OR gate (XOR 3) is connected with the field synchronous input of the external synchronous signal, the second input end of the third exclusive-OR gate (XOR 3) is grounded, and the output end of the third exclusive-OR gate (XOR 3) is connected with the third resistor (R3) and the fourth resistor (R4) and then grounded; the first input end of the fourth exclusive-OR gate (XOR 4) is connected with a field synchronous input signal of an external synchronous signal, the second input end of the fourth exclusive-OR gate (XOR 4) is grounded after being connected with the fourth resistor (R4), and the output end of the fourth exclusive-OR gate (XOR 4) outputs a field synchronous output signal.
3. The VGA internal and external synchronization signal switching circuit according to claim 2, wherein the internal and external synchronization signal control module comprises a first D flip-flop (D1), a second D flip-flop (D2);
the input end of the first D trigger (D1) is connected with VCC, the data zero clearing end of the first D trigger (D1) is connected with an external synchronous output signal after the inversion of the first NOT gate (X1), the clock input end of the first D trigger (D1) is connected with an internal synchronous signal, and the output end of the first D trigger (D1) is connected with the input end of the second D trigger (D2);
the clock input end of the second D trigger (D2) is connected with an internal synchronizing signal, the data zero clearing end of the second D trigger (D2) is connected with an external synchronizing output signal after the inversion of the first NOT gate (X1), and the output end of the second D trigger (D2) is connected with an internal synchronizing signal switching module and an external synchronizing signal switching module.
4. A VGA internal and external synchronization signal switching circuit according to claim 3, wherein the clock input terminals of the first D flip-flop (D1) and the second D flip-flop (D2) are connected to a field synchronization signal in the internal synchronization signal;
the data zero clearing ends of the first D trigger (D1) and the second D trigger (D2) are connected with a line synchronization signal of an external synchronization output signal.
5. A VGA internal and external synchronization signal switching circuit according to claim 3, wherein the output signal of the output terminal of the second D flip-flop (D2) is an internal synchronization selection signal, and the output signal of the output terminal of the second D flip-flop (D2) is inverted by the second not gate (X2) and then outputs an external synchronization selection signal.
6. The VGA internal-external synchronization signal switching circuit according to claim 5, wherein the internal-external synchronization signal switching module comprises a first and gate (A1), a second and gate (A2), a third and gate (A3), a fourth and gate (A4), a first OR gate (OR 1), and a second OR gate (OR 2);
the first input end of the first AND gate (A1) is connected with an external synchronous selection signal, the second input end of the first AND gate is connected with a line synchronous signal in an external synchronous output signal, and the output end of the first AND gate is connected with the first input end of the first OR gate (OR 1);
the first input end of the second AND gate (A2) is connected with an internal synchronous selection signal, the second input end of the second AND gate is connected with a line synchronous signal in the internal synchronous signal, and the output end of the second AND gate is connected with the second input end of the first OR gate (OR 1);
the first input end of the third AND gate (A3) is connected with an external synchronous selection signal, the second input end of the third AND gate is connected with a field synchronous signal in an external synchronous output signal, and the output end of the third AND gate is connected with the first input end of the second OR gate (OR 2);
the first input end of the fourth AND gate (A4) is connected with an internal synchronous selection signal, the second input end of the fourth AND gate is connected with a field synchronous signal in the internal synchronous signal, and the output end of the fourth AND gate is connected with the second input end of the second OR gate (OR 2);
the output end of the first OR gate (OR 1) outputs a screen display line synchronous signal;
the output end of the second OR gate (OR 2) outputs the screen display field synchronous signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321355876.9U CN220210429U (en) | 2023-05-31 | 2023-05-31 | VGA internal and external synchronous signal switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321355876.9U CN220210429U (en) | 2023-05-31 | 2023-05-31 | VGA internal and external synchronous signal switching circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220210429U true CN220210429U (en) | 2023-12-19 |
Family
ID=89146992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321355876.9U Active CN220210429U (en) | 2023-05-31 | 2023-05-31 | VGA internal and external synchronous signal switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220210429U (en) |
-
2023
- 2023-05-31 CN CN202321355876.9U patent/CN220210429U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101861770B1 (en) | Image processing circuit and method there-of | |
| JP3352600B2 (en) | Display device | |
| US6130721A (en) | Video format mode detector | |
| US9473726B2 (en) | Ultra high definition display device and video signal converting method | |
| US9070321B2 (en) | Tablet computer and method for controlling the same | |
| US9106235B2 (en) | Mesochronous synchronizer with delay-line phase detector | |
| US11328638B2 (en) | Detection circuit and scan drive circuit | |
| CN220210429U (en) | VGA internal and external synchronous signal switching circuit | |
| US10593288B2 (en) | Apparatus of transmitting and receiving signal, source driver of receiving status information signal, and display device having the source driver | |
| JP2009252232A (en) | Capacitive touch control device | |
| JPH04274675A (en) | Run length coding method and device | |
| WO2020181404A1 (en) | Touch chip, touch detection method, touch detection system and electronic device | |
| CN108259875B (en) | Digital image gamma correction hardware implementation method and system | |
| CN114185397B (en) | Cross-clock domain data transmission circuit and method | |
| JP2001092425A (en) | Liquid crystal display device | |
| CN115426438A (en) | DP video signal time sequence recovery device and working method thereof | |
| CN104935999A (en) | VGA signal selection switching module and method applied to OSD menu | |
| KR0142468B1 (en) | The central display driving system and methd of liquid crystal display system on the practical screen | |
| KR100272273B1 (en) | Synchronous signal detection circuit and method | |
| CN109754759B (en) | Backlight source control device and method and display device | |
| CN112347016A (en) | Dual-video input switching device and control method of tablet computer | |
| TWI234995B (en) | Data recovery circuit and method and data receiving system using the same | |
| CN110475085A (en) | Reading circuit and its control method, the imaging sensor of imaging sensor | |
| CN220421880U (en) | 8K video signal generator based on multi-chip FPGA and SOC | |
| US6734579B1 (en) | System and method for activating a first device from a second device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |