CN220139527U - Active bias circuit, amplifier and radio frequency front-end module - Google Patents
Active bias circuit, amplifier and radio frequency front-end module Download PDFInfo
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Abstract
The utility model provides an active bias circuit, an amplifier and a radio frequency front end module, and relates to the technical field of radio frequency amplifiers, wherein the active bias circuit comprises a first transistor, a first adjusting unit and a second adjusting unit; the drain electrode of the first transistor is connected with a power supply, and the source electrode of the first transistor is connected with the first end of the first regulating unit; the second end of the first regulating unit is respectively connected with the grid electrode of the first transistor and the first end of the second regulating unit, the second end of the second regulating unit is grounded, and a connection point between the first regulating unit and the second regulating unit is used as a voltage output end of the active bias circuit; the first regulating unit and the second regulating unit are at least used for providing basic partial pressure, and the first transistor works in a constant current area; the utility model provides a bias circuit constructed by a small number of components, which can enable an amplifier chip to improve performance deterioration caused by process deviation, temperature variation and external power supply voltage fluctuation in a certain range in the application process.
Description
Technical Field
The utility model relates to the technical field of radio frequency amplifiers, in particular to an active bias circuit, an amplifier and a radio frequency front-end module.
Background
The existing amplifier circuit realized by adopting the GaAs technology generally adopts the traditional resistor voltage division bias or source resistor self-bias scheme, and in the application process, the electrical performance of the amplifier transistor can be greatly changed along with the process deviation, temperature change and external power supply fluctuation; if the traditional bias scheme is adopted, the performance change of the transistor along with the temperature change and the external power supply voltage fluctuation cannot be effectively improved, so that the chip has the adverse problems of low yield, high stability risk and the like.
Disclosure of Invention
The utility model aims to provide an active bias circuit and a chip, which can be constructed by a small number of components, can improve the performance change of an amplifier chip caused by external power supply fluctuation in a certain range in the application process, and can also improve the performance deterioration caused by process deviation and temperature change.
The utility model provides a technical scheme that:
in one aspect, the present utility model provides an active bias circuit comprising a first transistor, a first regulation unit, and a second regulation unit;
the drain electrode of the first transistor is connected with a power supply, and the source electrode of the first transistor is connected with the first end of the first regulating unit; the second end of the first regulating unit is respectively connected with the grid electrode of the first transistor and the first end of the second regulating unit, the second end of the second regulating unit is grounded, and a connection point between the first regulating unit and the second regulating unit is used as a voltage output end of the active bias circuit;
the first regulating unit and the second regulating unit are at least used for providing partial voltage, and the first transistor works in a constant current area.
Preferably, the first transistor is a depletion transistor.
Preferably, the active bias circuit further comprises a first resistor, a first end of the first resistor is connected with the drain electrode of the first transistor, and a second end of the first resistor is connected with a power supply.
Preferably, the first adjusting unit is further configured to adjust a slope coefficient of a voltage of the voltage output terminal along with a temperature change, where the first adjusting unit includes a second transistor and a second resistor;
the drain electrode of the second transistor is respectively connected with the source electrode of the first transistor and the grid electrode of the second transistor; the source electrode of the second transistor is connected with the first end of the second resistor; the second end of the second resistor is the second end of the first adjusting unit.
Preferably, the second transistor is an enhancement transistor.
Preferably, the second adjusting unit is further configured to adjust a voltage of the voltage output terminal to vary according to a process deviation, and the second adjusting unit includes a third transistor and a third resistor;
the drain electrode of the third transistor is respectively connected with the second end of the first adjusting unit and the grid electrode of the third transistor; the source of the third transistor is grounded through the third resistor.
Preferably, the third transistor is an enhancement transistor.
In a second aspect, embodiments of the present utility model provide an amplifier comprising an amplifying transistor and an active bias circuit as described in any of the first aspects above.
Preferably, the amplifying transistor and the third transistor in the active bias circuit are prepared by the same process.
In a third aspect, an embodiment of the present utility model provides a radio frequency front end module, where the radio frequency front end module includes an amplifier according to any one of the second aspects.
The active bias circuit, the amplifier and the radio frequency front-end module provided by the utility model have the beneficial effects that:
the embodiment of the utility model provides an active bias circuit, which comprises a first transistor, a first adjusting unit and a second adjusting unit; the drain electrode of the first transistor is connected with a power supply, and the source electrode of the first transistor is connected with the first end of the first regulating unit; the second end of the first regulating unit is respectively connected with the grid electrode of the first transistor and the first end of the second regulating unit, the second end of the second regulating unit is grounded, and a connection point between the first regulating unit and the second regulating unit is used as a voltage output end of the active bias circuit; the first regulating unit and the second regulating unit are at least used for providing basic voltage division, the first transistor works in a constant current area, a bias circuit can be constructed through a small number of transistors, resistors and other components, and under the condition of optimizing the performance deterioration of the amplifier chip caused by external power supply fluctuation, the performance deterioration caused by process deviation and temperature change in the application process is further optimized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an active bias circuit according to an embodiment of the present utility model;
FIG. 2 is a schematic diagram of a first adjusting unit according to an embodiment of the present utility model;
FIG. 3 is a schematic diagram of a second adjusting unit according to an embodiment of the present utility model;
fig. 4 is a second schematic diagram of an active bias circuit according to an embodiment of the present utility model.
Icon: 100-active bias circuit.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments of the present utility model. The components of the embodiments of the present utility model generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the utility model, as presented in the figures, is not intended to limit the scope of the utility model, as claimed, but is merely representative of selected embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
In the description of the present utility model, it should be understood that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," "outer," and the like indicate orientations or positional relationships based on those shown in the drawings, or those conventionally put in place when the inventive product is used, or those conventionally understood by those skilled in the art, merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the apparatus or element to be referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
Furthermore, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.
In the description of the present utility model, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present utility model will be understood in specific cases by those of ordinary skill in the art.
In the prior art, the amplifier circuit realized by adopting the GaAs process generally adopts the traditional resistor voltage division bias or source stage resistor self-bias scheme, and the electrical performance of the amplifier transistor can be greatly changed along with process deviation, temperature change and external power supply fluctuation in the application process; however, the conventional resistor voltage division bias or source resistor self-bias scheme cannot adjust the variation caused by external power supply fluctuation after the process deviation and the temperature variation are ensured, and in the embodiment of the utility model, an active bias circuit and a chip scheme are provided, so that the performance deterioration of an amplifier caused by the process deviation, the temperature variation and the external power supply voltage fluctuation can be improved within a certain range.
In the prior art, bias current is generally provided for the amplifier die through a large resistor, and performance degradation caused by process deviation and temperature variation in a certain range is improved through optimizing components such as the resistor, so that the performance degradation caused by external power supply voltage fluctuation cannot be improved.
On the basis, the embodiment of the utility model provides an active bias circuit, an amplifier and a radio frequency front-end module which are constructed by a small number of components, so that the amplifier can improve the performance change caused by external power supply fluctuation in a certain range in the application process, and the performance deterioration caused by process deviation and/or temperature change is improved on the basis.
Examples
Referring to fig. 1, in a first aspect, the present utility model provides an active bias circuit 100, including a first transistor Q1, a first adjusting unit, and a second adjusting unit;
the drain electrode of the first transistor Q1 is connected with a power supply, and the source electrode of the first transistor Q1 is connected with the first end of the first regulating unit; the second end of the first regulating unit is respectively connected with the grid electrode of the first transistor Q1 and the first end of the second regulating unit, the second end of the second regulating unit is grounded, and a connection point between the first regulating unit and the second regulating unit is used as a voltage output end of the active bias circuit 100;
the first regulating unit and the second regulating unit are at least used for providing basic partial pressure, and the first transistor Q1 works in a constant current area.
In the active bias circuit 100 provided by the utility model, the active bias circuit 100 can provide stable bias current to the connected load at least under the condition of voltage fluctuation through the adjustment of the first adjusting unit and the second adjusting unit, and can provide stable bias current to the connected load under the condition of process deviation and temperature variation.
In one possible embodiment, the first transistor Q1 is a depletion transistor, i.e., a D-MOSFET transistor.
Since the first transistor Q1 is an LDF transistor, the channel resistance thereof is large, and the magnitude of the channel resistance is determined by the voltage difference between the a-potential point and the B-potential point in fig. 1, since the first transistor Q1 operates in the constant current region, when the supply voltage VDD fluctuates, the voltage VDS variation between the drain and the source of the first transistor Q1 follows the supply voltage VDD fluctuation, and thus, by adjusting the channel resistance of the first transistor Q1, the active bias circuit 100 can provide a stable bias current to the connected load when the supply voltage VDD fluctuates.
Referring to fig. 1, the active bias circuit 100 in the embodiment of the utility model further includes a first resistor R1, wherein a first end of the first resistor R1 is connected to the drain of the first transistor Q1, and a second end of the first resistor R1 is connected to a power supply.
In one embodiment, the first end of the first resistor R1 is connected to the drain of the first transistor Q1, and the second end is connected to the power supply, and since the first transistor Q1 operates in the constant current region, the current flowing through the first resistor R1 is also unchanged, and for the first resistor R1, only the voltage division is performed in the active bias circuit 100, and for the first resistor R1, the voltage division potential does not fluctuate with the power supply voltage VDD, which is mainly used to enhance the clutter isolation capability introduced by the power supply, and for the resistance value of the first resistor R1, a hundred ohm level is generally selected.
Referring to fig. 1, the first regulation unit is used for providing a basic voltage division except in case of voltage fluctuation; the first adjusting unit comprises a second transistor Q2 and a second resistor R2; the drain electrode of the second transistor Q2 is respectively connected with the source electrode of the first transistor Q1 and the gate electrode of the second transistor Q2; the source electrode of the second transistor Q2 is connected with the first end of the second resistor R2; the second end of the second resistor R2 is the second end of the first adjusting unit.
Further, under the condition of voltage fluctuation, since the first transistor Q1 is an LDF transistor, the channel resistance is very large, the magnitude of the channel resistance is determined by the voltage difference between the a potential point and the B potential point in fig. 1, and the second transistor Q2 and the second resistor R2 can adjust the turn-on degree of the first transistor Q1, that is, adjust the channel resistance of the first transistor Q1, so that the active bias circuit 100 can provide a stable bias current to the connected load under the condition of voltage fluctuation through the adjustment of the first adjusting unit.
Based on the above, as the equivalent resistance of the second transistor Q2 and the second resistor R2 is larger, the channel resistance of the first transistor Q1 is larger, the drain-source current passing through the first transistor Q1 is smaller, and under the condition of constant voltage, the slope coefficient of the voltage at the voltage output terminal along with the temperature change can be adjusted by adjusting the ratio between the equivalent resistance of the second transistor Q2 and the resistance of the second resistor R2 on the basis of providing stable bias current.
In one possible embodiment, the second transistor Q2 is an enhancement transistor, i.e., an E-MOSFET transistor;
referring to fig. 2, the second transistor Q2 is connected in a drain-gate short circuit manner, which is a diode connection manner, and under this connection manner, the current and the voltage passing through the second transistor Q2 have a one-to-one correspondence, and further the equivalent resistance value also has a one-to-one correspondence, and the relationship between the drain-source current i and the drain-source voltage VDS of the second transistor Q2: drain-source current i=is (e (-VDS/VT) -1), vds=vtlog (i/is+1) through the transistor die; wherein Is and UT are respectively temperature-voltage equivalent of reverse saturation current and thermodynamic temperature T, and belong to material characteristic constants. Under the condition that the drain-source current i of the transistor tube core is constant, the slope coefficient of the voltage at the voltage output end along with the temperature change can be adjusted in a drain-gate short circuit mode.
Referring to fig. 3, the second adjusting unit is further configured to adjust a voltage of the voltage output terminal to vary according to a process deviation, and the second adjusting unit includes a third transistor Q3 and a third resistor R3;
the drain electrode of the third transistor Q3 is respectively connected with the second end of the first adjusting unit and the grid electrode of the third transistor Q3; the source of the third transistor Q3 is grounded through a third resistor R3.
Referring to fig. 1, when the third resistor R3 is increased, the first adjusting unit and the second adjusting unit are used for providing basic voltage division, and the equivalent dc resistance from the corresponding point B to the VDD terminal of the power supply should be increased when the point B is maintained with the same potential, so that the equivalent dc resistance of the power supply VDD looking into the bias circuit is also greatly increased, and the bias dissipation current can be reduced.
In one possible embodiment, the third transistor Q3 is an enhancement transistor.
Referring to fig. 3, in an embodiment, the third transistor Q3 is an enhancement transistor, and when the amplifier transistor connected to the third transistor Q3 is an enhancement transistor, the gate of the third transistor Q3 is connected to the gate of the amplifier transistor, so that the third transistor Q3 and the amplifier can be consistent with the process fluctuation phenomenon, and has a process fluctuation tracking effect, and under the condition of stable voltage, the process fluctuation tracking characteristic between the third transistor Q3 and the amplifier can be realized by adjusting the resistance ratio between the second adjusting unit, i.e., the third transistor Q3 and the third resistor R3.
Further, since the third transistor Q3 is connected in a drain-gate short circuit manner and is connected in a diode manner, under the connection manner, the current and the voltage passing through the third transistor Q3 have a one-to-one correspondence, and the equivalent resistance value thereof also has a one-to-one correspondence, so that the first adjusting unit in fig. 2 can be adopted to further improve the performance variation of the amplifying transistor caused by the third transistor Q3 when the temperature varies.
Next, the working principle of an active bias circuit provided by the embodiment of the present utility model will be further described, referring to fig. 1, in an active bias circuit 100 provided by the present utility model, a supply voltage VDD satisfies: vdd=i (r1+2+3) +gs Q1 +GS Q2 +GS Q3
The relationship between the drain-source current i and the drain-source voltage VDS of the transistors in the diode-connected method can be known as follows:
VDD＝i*(1+R2+R3)+VT Q2 ( 1 / Q2 +1)+T Q3 log(i 3 / Q3 +1)
+DS Q1
wherein, for the first transistor Q1, the gate-source voltage VGS thereof Q1 Satisfying the following requirements; and when the first transistor Q1 operates in the constant current region, that is, satisfies: wherein I is DOQ1 As VGS Q1 ＝2VGS Q1(h) Drain-source current i of first transistor Q1 of (a) 1 A value; according to this formula, the drain-source current i in the first transistor Q1 can be determined 1 Only the unique solution, i.e. fixed, is unchanged.
When the power supply VDD fluctuates, the first transistor Q1 works in the constant current region, and the drain-source in the first transistor Q1Current i 1 Unchanged, let VDS only Q1 That is, the drain-source voltage of the first transistor Q1 changes with the power supply VDD, and then the variation of the power supply VDD is transferred to the drain-source voltage VDS of the first transistor Q1 Q1 Therefore, when the power supply VDD fluctuates, the first transistor Q1 only needs to operate in the constant current region, so that the active bias circuit 100 can improve the performance variation caused by the external power supply fluctuation within a certain range when the power supply VDD fluctuates, and in the embodiment of the utility model, the influence of the power supply fluctuation on the bias current can be greatly reduced through the first transistor Q1.
On the basis, in order to maintain the state of the first transistor Q1 unchanged, even if the drain-source resistance of the first transistor Q1 remains unchanged, that is, the sum of the resistance values of the equivalent resistance of the second transistor Q2 and the second resistance R2 in the first adjusting unit remains unchanged, the slope coefficient of the B-point voltage VB along with the temperature change can be adjusted by adjusting the ratio of the resistance values of the equivalent resistance of the second transistor Q2 and the second resistance R2.
The first transistor Q1, the second transistor Q2 in the first adjusting unit, and the third transistor Q3 in the second adjusting unit respectively adopt a depletion transistor and an enhancement transistor, so that the active bias circuit 100 provided by the embodiment of the utility model can be applied to a process in which the depletion transistor and the enhancement transistor exist at the same time, that is, can be applied to an ED process.
The embodiment of the utility model provides an active bias circuit 100, which comprises a first transistor Q1, a first adjusting unit and a second adjusting unit; the drain electrode of the first transistor Q1 is connected with a power supply, and the source electrode of the first transistor Q1 is connected with the first end of the first regulating unit; the second end of the first regulating unit is respectively connected with the grid electrode of the first transistor Q1 and the first end of the second regulating unit, the second end of the second regulating unit is grounded, and a connection point between the first regulating unit and the second regulating unit is used as a voltage output end of the active bias circuit 100; the first regulating unit and the second regulating unit are at least used for providing basic voltage division, the first transistor Q1 works in a constant current area, a bias circuit can be constructed through a small number of transistors, resistors and other components, and under the condition of optimizing the performance deterioration of the amplifier chip caused by external power supply fluctuation, the performance deterioration caused by process deviation and temperature change in the application process is further optimized.
In a second aspect, embodiments of the present utility model provide an amplifier comprising an amplifying transistor and an active bias circuit as described in any of the first aspects above.
The amplifying transistor and the third transistor in the active bias circuit are prepared by the same process.
In one embodiment, the gate of the third transistor Q3 is connected to the gate of the amplifier transistor, and the third transistor Q3 and the amplifier transistor are in the same process, so that the process fluctuation phenomenon of the third transistor Q3 and the amplifier transistor is consistent, and further, under the condition that the output current of the active bias circuit 100 is constant, as long as the equivalent resistance of the third transistor Q3 and the third resistor R3 on the second adjusting unit in the active bias circuit 100 is kept unchanged, the point B voltage VB is unchanged, and on the basis, the process fluctuation tracking characteristic between the third transistor Q3 and the amplifier transistor can be improved by adjusting the resistance ratio of the third transistor Q3 and the third resistor R3.
The amplifier provided in the embodiment of the utility model includes all technical features and technical effects of the active bias circuit provided in the first aspect.
In a third aspect, an embodiment of the present utility model provides a radio frequency front end module, including an amplifier as in any one of the second aspects above.
The radio frequency front end module provided in the embodiment of the present utility model includes all the technical features and technical effects of the amplifier provided in the second aspect.
In summary, as shown in fig. 4, in an active bias circuit, an amplifier and a radio frequency front end module provided in the embodiments of the present utility model:
when the voltage output terminal of the active bias circuit 100 is connected to an amplifier transistor in the same process as the third transistor Q3 under the condition of constant power supply from an external power supply, when Vth and other parameters are changed due to the transistors in the process and temperature fluctuation, for example, vth is reduced, current transients of all the transistors have a tendency to become larger, that is, quiescent current flowing through the first transistor Q1, the second transistor Q2 and the third transistor Q3 is increased, so that the potential at point B in fig. 1 is lowered, and meanwhile, quiescent current of the amplifier transistor raised due to the reduction of the threshold voltage Vth is lowered, so that the balance state of the voltage output terminal of the active bias circuit can be maintained, and the quiescent current of the voltage output terminal of the active bias circuit is ensured not to be greatly influenced due to the change of the threshold voltage Vth.
When the voltage output end of the active bias circuit is maintained in a balanced state under the condition of fluctuation of the external power supply, namely, the voltage at the point B is stable and unchanged, the voltage of the fluctuation of the external power supply can only be added between the drain and the source of the first transistor Q1 under the condition that the current of the second regulating unit is not changed, namely, the first transistor Q1 can work in a constant current area under the condition of maintaining the balanced state of the voltage output end of the active bias circuit.
The above description is only of the preferred embodiments of the present utility model and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.
Claims (10)
1. An active bias circuit is characterized by comprising a first transistor, a first regulating unit and a second regulating unit;
the drain electrode of the first transistor is connected with a power supply, and the source electrode of the first transistor is connected with the first end of the first regulating unit; the second end of the first regulating unit is respectively connected with the grid electrode of the first transistor and the first end of the second regulating unit, the second end of the second regulating unit is grounded, and a connection point between the first regulating unit and the second regulating unit is used as a voltage output end of the active bias circuit;
the first regulating unit and the second regulating unit are at least used for providing partial voltage, and the first transistor works in a constant current area.
2. The active bias circuit of claim 1, wherein the first transistor is a depletion transistor.
3. The active bias circuit of claim 1, further comprising a first resistor, a first terminal of the first resistor being connected to the drain of the first transistor, a second terminal of the first resistor being connected to a power supply.
4. The active bias circuit of claim 1, wherein the first adjusting unit is further configured to adjust a slope coefficient of a voltage of the voltage output terminal with a change in temperature, and the first adjusting unit includes a second transistor and a second resistor;
the drain electrode of the second transistor is respectively connected with the source electrode of the first transistor and the grid electrode of the second transistor; the source electrode of the second transistor is connected with the first end of the second resistor; the second end of the second resistor is the second end of the first adjusting unit.
5. The active bias circuit of claim 4, wherein the second transistor is an enhancement transistor.
6. The active bias circuit of claim 1, wherein the second adjusting unit is further configured to adjust a voltage of the voltage output terminal to vary with a process bias, the second adjusting unit including a third transistor and a third resistor;
the drain electrode of the third transistor is respectively connected with the second end of the first adjusting unit and the grid electrode of the third transistor; the source of the third transistor is grounded through the third resistor.
7. The active bias circuit of claim 6, wherein the third transistor is an enhancement transistor.
8. An amplifier comprising an amplifying transistor and an active bias circuit according to any one of claims 1 to 7.
9. The amplifier of claim 8, wherein the amplifying transistor is fabricated using the same process as the third transistor in the active bias circuit.
10. A radio frequency front end module, characterized in that it comprises an amplifier according to any of claims 8 to 9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321428213.5U CN220139527U (en) | 2023-06-06 | 2023-06-06 | Active bias circuit, amplifier and radio frequency front-end module |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321428213.5U CN220139527U (en) | 2023-06-06 | 2023-06-06 | Active bias circuit, amplifier and radio frequency front-end module |
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| CN220139527U true CN220139527U (en) | 2023-12-05 |
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| CN202321428213.5U Active CN220139527U (en) | 2023-06-06 | 2023-06-06 | Active bias circuit, amplifier and radio frequency front-end module |
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