CN220137564U - Signal acquisition circuit, chip and equipment - Google Patents

Abstract

The utility model provides a signal acquisition circuit, a chip and equipment, comprising: the device comprises a reference signal generation module, a signal acquisition module and a controller; the reference signal generation module is provided with an input end connected with the first end of the controller, and an output end of the reference signal generation module is connected with the first input end of the signal acquisition module; the second input end of the signal acquisition module is connected with the output end of the sensor, and the output end of the signal acquisition module is connected with the second end of the controller; the reference signal generation module is used for generating a reference signal according to a configuration signal input by the input end of the reference signal generation module, and the configuration signal is configured by the controller according to the type of the sensor; the signal acquisition module is used for generating an output signal according to the signal acquired by the sensor and the reference signal and outputting the output signal to the controller. The circuit can be compatible with output signals of an NPN type sensor and a PNP type sensor, reduces manual participation, improves user experience, and reduces maintenance and debugging difficulty.

Description

Signal acquisition circuit, chip and equipment

Technical Field

The present utility model relates to power electronics, and more particularly, to a signal acquisition circuit, chip, and apparatus.

Background

The digital sensor is a common electronic component, and can be divided into an NPN type sensor and a PNP type sensor, wherein the output signal of the NPN type sensor is high level, and the output signal of the PNP type sensor is low level. The acquisition circuitry of the sensor signal is generally compatible with only one of the signal types. In order to solve the problem of compatibility of the acquisition circuit of the sensor signal, the prior art is generally provided with a jumper in the circuit, and a user manually switches the jumper to change the connection mode of the circuit, so that the acquisition circuit of the sensor signal can be compatible with the output signal of the NPN type sensor and the output signal of the PNP type sensor.

However, the manual jumper wire switching mode needs to be manually participated, has low efficiency, is easy to make mistakes, and brings inconvenience to subsequent production and debugging.

Disclosure of Invention

The utility model provides a signal acquisition circuit, a chip and equipment, which can be compatible with an output signal of an NPN type sensor and an output signal of a PNP type sensor, reduce manual participation, improve user experience and reduce maintenance and debugging difficulty.

In one aspect, the utility model provides a signal acquisition circuit, which comprises a reference signal generation module, a signal acquisition module and a controller.

The reference signal generation module is provided with an input end connected with the first end of the controller, and an output end of the reference signal generation module is connected with the first input end of the signal acquisition module.

The second input end of the signal acquisition module is connected with the output end of the sensor, and the output end of the signal acquisition module is connected with the second end of the controller.

The reference signal generation module is used for generating a reference signal according to a configuration signal input by the input end of the reference signal generation module, and the configuration signal is configured by the controller according to the type of the sensor.

The signal acquisition module is used for generating an output signal according to the signal acquired by the sensor and the reference signal and outputting the output signal to the controller.

Optionally, the reference signal generating module includes a first control circuit, a second control circuit, and a main circuit.

The input end of the first control circuit is the input end of the reference signal generation module, and the output end of the first control circuit is connected with the first input end of the main circuit.

The input end of the second control circuit is the input end of the reference signal generation module, and the output end of the second control circuit is connected with the second input end of the main circuit.

The output end of the main circuit is the output end of the reference signal generating module.

Optionally, the first control circuit includes a first transistor and a first sub-control circuit.

The base electrode of the first transistor is the input end of the first control circuit, the collector electrode of the first transistor is connected with the input end of the first sub-control circuit, and the emitter electrode of the first transistor is grounded GND.

The output end of the first sub-control circuit is the output end of the first control circuit.

Optionally, the second control circuit includes a second transistor and a second sub-control circuit.

The base electrode of the second transistor is the input end of the second control circuit, the collector electrode of the second transistor is connected with the input end of the second sub-control circuit, and the emitter electrode of the second transistor is grounded GND.

The output end of the second sub-control circuit is the output end of the second control circuit.

Optionally, the main circuit comprises a first switching circuit and a second switching circuit.

The input end of the first switch circuit is a first input end of the main circuit, and the output end of the first switch circuit is connected with the output end of the second switch circuit.

The input end of the second switch circuit is the second input end of the main circuit.

Optionally, the first sub-control circuit includes a first resistor, a second resistor, and a first capacitor.

The first resistor is connected in parallel with the first capacitor.

The first end of the first resistor is connected with the power VCC, and the second end of the first resistor is respectively connected with the input end of the first switch circuit and the first end of the second resistor.

The second end of the second resistor is connected with the collector electrode of the first transistor.

Optionally, the second sub-control circuit includes a third resistor, a fourth resistor, and a second capacitor.

The third resistor is connected in parallel with the second capacitor.

The first end of the third resistor is grounded GND, and the second end of the third resistor is respectively connected with the input end of the second switch circuit, the collector electrode of the second transistor and the first end of the fourth resistor.

The second end of the fourth resistor is connected to the power supply VCC.

Optionally, the first switching circuit includes a first Metal-Oxide-Semiconductor Field-Effect Transistor (MOS).

The source electrode of the first MOS tube is connected with a power supply VCC, the grid electrode of the first MOS tube is an input end of the first switch circuit, and the drain electrode of the first MOS tube is an output end of the first switch circuit.

Optionally, the second switching circuit includes a second MOS transistor.

The source electrode of the second MOS tube is grounded GND, the grid electrode of the second MOS tube is the input end of the second switch circuit, and the drain electrode of the second MOS tube is the output end of the second switch circuit.

Optionally, the first switching circuit further comprises a diode.

The positive pole of the diode is connected with the drain electrode of the first MOS tube, and the negative pole of the diode is the output end of the first switch circuit.

Optionally, the signal acquisition module comprises a photo-electric coupling module.

The first end of the photoelectric coupling module is connected with the output end of the reference signal generating module, the second end of the photoelectric coupling module is connected with the output end of the sensor, the third end of the photoelectric coupling module is grounded GND, and the fourth end of the photoelectric coupling module is connected with the controller.

In a second aspect, the present utility model provides a signal acquisition chip comprising any one of the signal acquisition circuits as provided in the first aspect and optionally thereof.

In a third aspect, the present utility model provides a signal acquisition device comprising the signal acquisition chip provided in the second aspect.

The utility model provides a signal acquisition circuit, a chip and a device, which comprise a reference signal generation module, a signal acquisition module and a controller, wherein the reference signal generation module is provided with an input end connected with a first end of the controller, and an output end of the reference signal generation module is connected with a first input end of the signal acquisition module; the second input end of the signal acquisition module is connected with the output end of the sensor, and the output end of the signal acquisition module is connected with the second end of the controller; the reference signal generation module is used for generating a reference signal according to a configuration signal input by the input end of the reference signal generation module, and the configuration signal is configured by the controller according to the type of the sensor; the signal acquisition module is used for generating an output signal according to the signal acquired by the sensor and the reference signal, outputting the output signal to the controller, and only configuring program software of the controller to output different configuration signals through the circuit, so that the type of the sensor suitable for the signal acquisition circuit can be changed, the output signal of the NPN type sensor and the output signal of the PNP type sensor can be compatible, manual participation can be reduced, user experience is improved, and maintenance and debugging difficulty is reduced.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the utility model and together with the description, serve to explain the principles of the utility model.

FIG. 1 is a schematic diagram of a signal acquisition circuit according to the present utility model;

FIG. 2 is another schematic diagram of the signal acquisition circuit according to the present utility model;

FIG. 3 is a schematic diagram of a signal acquisition circuit according to the present utility model;

fig. 4 is a schematic diagram of a signal acquisition circuit according to the present utility model.

Reference numerals illustrate:

11-a reference signal generation module; 12-a signal acquisition module; 13-a controller; 111-a first control circuit; 112-a second control circuit; 113-a main circuit; 1111-a first sub-control circuit; 1121-a second sub-control circuit; 1131-a first switching circuit; 1132-a second switching circuit; 121-optocoupler module.

Detailed Description

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the utility model. Rather, they are merely examples of apparatus and methods consistent with aspects of the utility model as detailed in the accompanying claims.

The digital sensor is a common electronic component, and can be divided into an NPN type sensor and a PNP type sensor, wherein the NPN type sensor is generally in passive output, is generally in an open circuit or high level state, and the output signal of the NPN type sensor is in a low level when triggered; the PNP type sensor is typically an active output, typically in an off or low state, and the output signal of the PNP type sensor is high when triggered. The acquisition circuitry of the sensor signal is generally compatible with only one of the signal types. In order to solve the problem of compatibility of the acquisition circuit of the sensor signal, the prior art is generally provided with a jumper in the circuit, and a user manually switches the jumper to change the connection mode of the circuit, so that the acquisition circuit of the sensor signal can be compatible with the output signal of the NPN type sensor and the output signal of the PNP type sensor. One common mode is to adopt a jumper cap and a rectifier bridge, the rectifier bridge is used at the front stage of an input signal, one end of the input end of the rectifier bridge is connected with the input signal, the other end of the input end of the rectifier bridge is used as a public end, the public end can jump to the positive electrode or the negative electrode through the jumper cap, and the output end of the rectifier bridge is connected to a signal level conversion circuit at the rear stage, so that the compatibility of NPN and PNP signal input is realized. The other common mode is that a jumper cap and a bidirectional optocoupler are adopted, compared with the first mode, the circuit structure is simplified, a rectifier bridge is omitted, signal acquisition is carried out by adopting the bidirectional optocoupler in signal conversion of the later stage, one end of the optocoupler is connected with an input signal, the other end of the optocoupler is a public end, and the public end jumps to the positive electrode or the negative electrode through the jumper cap, so that the compatibility of NPN and PNP signal input is realized. However, the manual jumper switching mode needs to be manually participated, has low efficiency, is inconvenient to maintain and debug, and when a circuit package and equipment are in use, a user needs to open the equipment when switching the jumper, the operation is complex and easy to make mistakes, and the inconvenience is brought to subsequent production debugging.

The disadvantages of the prior art are all overcome if the signal inputs of NPN and PNP can be configured by software. Based on the above, the utility model provides a signal acquisition circuit, which comprises a reference signal generation module, a signal acquisition module and a controller; the reference signal generation module is provided with an input end, and the output end of the reference signal generation module is connected with the first input end of the signal acquisition module; the second input end of the signal acquisition module is connected with the output end of the sensor, and the output end of the signal acquisition module is connected with the controller; the reference signal generation module is used for generating a reference signal according to a configuration signal input by the input end of the reference signal generation module, wherein the configuration signal is configured according to the type of the sensor; the signal acquisition module is used for generating an output signal according to the signal acquired by the sensor and the reference signal and outputting the output signal to the controller. The circuit can be configured into different types of signal acquisition circuits through software, can be compatible with the output signals of the NPN type sensor and the PNP type sensor, reduces manual participation, improves user experience, and reduces maintenance and debugging difficulty.

Fig. 1 is a schematic diagram of a signal acquisition circuit provided by the present utility model, and as shown in fig. 1, the circuit includes a reference signal generating module 11, a signal acquisition module 12, and a controller 13.

An input end of the reference signal generating module 11 is connected with a first end of the controller 13, and an output end of the reference signal generating module 11 is connected with a first input end of the signal collecting module 12.

A second input of the signal acquisition module 12 is connected to an output of the sensor 14, and an output of the signal acquisition module 12 is connected to a second end of the controller 13.

The reference signal generating module 11 is configured to generate a reference signal according to the configuration signal input by the input terminal of the reference signal generating module 11.

Wherein the configuration signal is configured by the controller 13 according to the type of sensor 14.

The signal acquisition module 12 is configured to generate an output signal according to the signal acquired by the sensor 14 and the reference signal, and output the output signal to the controller 13.

The utility model provides a signal acquisition circuit which comprises a reference signal generation module, a signal acquisition module and a controller, wherein the reference signal generation module is used for generating reference signals; the reference signal generation module is provided with an input end connected with the first end of the controller, and an output end of the reference signal generation module is connected with the first input end of the signal acquisition module; the second input end of the signal acquisition module is connected with the output end of the sensor, and the output end of the signal acquisition module is connected with the second end of the controller; the reference signal generation module is used for generating a reference signal according to a configuration signal input by the input end of the reference signal generation module, and the configuration signal is configured by the controller according to the type of the sensor; the signal acquisition module is used for generating output signals according to signals acquired by the sensor and reference signals, outputting the output signals to the controller, and configuring program software of the controller to enable the controller to output different configuration signals, so that the sensor type applicable to the signal acquisition circuit can be changed, the output signals of the NPN type sensor and the output signals of the PNP type sensor can be compatible, manual participation can be reduced, user experience is improved, and maintenance and debugging difficulty is reduced.

Fig. 2 is another schematic diagram of the signal acquisition circuit provided in the present utility model, as shown in fig. 2, optionally, the reference signal generating module 11 includes a first control circuit 111, a second control circuit 112, and a main circuit 113.

The input terminal of the first control circuit 111 is the input terminal of the reference signal generating module 11, and the output terminal of the first control circuit 111 is connected to the first input terminal of the main circuit 113.

The input end of the second control circuit 112 is the input end of the reference signal generating module 11, and the output end of the second control circuit 112 is connected with the second input end of the main circuit 113.

The output of the main circuit 113 is the output of the reference signal generating module 11.

The first control circuit 111 and the main circuit 113 are combined to generate a first reference signal; the second control circuit 112 is combined with the main circuit 113 to generate a second reference signal. The signal acquisition module 12 is configured to acquire different types of sensor signals based on different reference signals.

Fig. 3 is a schematic diagram of a signal acquisition circuit according to the present utility model, and as shown in fig. 3, optionally, the first control circuit 111 includes a first transistor Q2 and a first sub-control circuit 1111.

The base of the first transistor Q2 is an input end of the first control circuit 111, the collector of the first transistor Q2 is connected to an input end of the first sub-control circuit 1111, and the emitter of the first transistor Q2 is grounded GND.

The output terminal of the first sub-control circuit 1111 is the output terminal of the first control circuit 111.

The first transistor Q2 is an NPN transistor, for example.

Optionally, the second control circuit 112 includes a second transistor Q4, a second sub-control circuit 1121.

The base of the second transistor Q4 is an input end of the second control circuit 112, the collector of the second transistor Q4 is connected to the input end of the second sub-control circuit 1121, and the emitter of the second transistor Q4 is grounded GND.

The output terminal of the second sub-control circuit 1121 is the output terminal of the second control circuit 112.

The second transistor Q4 is illustratively an NPN transistor.

The first transistor Q2 and the second transistor Q4 are set to be the same type of transistor, and synchronous on-off of the first transistor Q2 and the second transistor Q4 can be realized, so that different types of sensor signals can be acquired based on the circuit provided by the utility model.

Optionally, the main circuit 113 includes a first switching circuit 1131 and a second switching circuit 1132.

The input end of the first switch circuit 1131 is a first input end of the main circuit 113, and the output end of the first switch circuit 1131 is connected with the output end of the second switch circuit 1132.

The input of the second switching circuit 1132 is a second input of the main circuit 113.

By arranging the two switch circuits, the two switch circuits can be switched on or off in a time-sharing way, so that the reference signal generation module can output different signal levels.

Optionally, the first sub-control circuit 1111 includes a first resistor R1, a second resistor R3, and a first capacitor C1.

The first resistor R1 is connected in parallel with the first capacitor C1.

The first end of the first resistor R1 is connected with a power supply VCC, and the second end of the first resistor R1 is respectively connected with the input end of the first switch circuit 1131 and the first end of the second resistor R3;

the second terminal of the second resistor R3 is connected to the collector of the first transistor Q2.

When the first transistor Q2 is turned on, the power supply VCC can charge the first capacitor C1 through the second resistor R3, and when the first transistor Q2 is turned on, the first capacitor C1 is put at a point, so that the charge and discharge of the first capacitor C1 are controlled by controlling the on-off state of the first transistor Q2.

Optionally, the second sub-control circuit 1112 includes a third resistor R8, a fourth resistor R5, and a second capacitor C2.

The third resistor R8 is connected in parallel with the second capacitor.

The first end of the third resistor R8 is grounded GND, and the second end of the third resistor R8 is connected to the input end of the second switch circuit 1132, the collector of the second transistor Q4, and the first end of the fourth resistor R5 respectively.

The second terminal of the fourth resistor R5 is connected to the power supply VCC.

When the second transistor Q4 is turned off, the power supply VCC can charge the second capacitor C2 through the fourth resistor R5, and when the second transistor Q4 is turned on, the second capacitor C2 is put at a point, so that the charge and discharge of the second capacitor C2 are controlled by controlling the on-off state of the second transistor Q4.

Optionally, the first switch circuit 1131 includes a first MOS transistor Q1.

The source electrode of the first MOS tube Q1 is connected with the power supply VCC, the grid electrode of the first MOS tube Q1 is an input end of the first switch circuit 1131, and the drain electrode of the first MOS tube Q1 is an output end of the first switch circuit 1131.

The first MOS transistor Q1 is a PMOS transistor, for example.

Optionally, the second switching circuit 1132 includes a second MOS transistor.

The source electrode of the second MOS tube Q3 is grounded GND, the grid electrode of the second MOS tube Q3 is an input end of the second switch circuit 1132, and the drain electrode of the second MOS tube Q3 is an output end of the second switch circuit 1132.

The second MOS transistor Q3 is an NMOS transistor, for example.

Optionally, the first switching circuit 1131 further includes a diode D1.

The positive pole of the diode D1 is connected with the drain electrode of the first MOS transistor Q1, and the negative pole of the diode D1 is the output end of the first switch circuit 1131.

Optionally, the first switching circuit 1131 further includes a fifth resistor R2.

The first end of the fifth resistor R2 is connected with the power supply VCC, and the second end of the fifth resistor R2 is connected with the source electrode of the first MOS tube Q1.

The fifth resistor R2 is a current limiting resistor, and the fifth resistor R2 is arranged to provide current limiting protection for the circuit.

The working principle of the signal acquisition circuit provided by the utility model is described in detail below with reference to fig. 3.

After power-on, in the starting process of the controller, the first end output of the controller defaults to be in a high-resistance state, at this time, the first transistor Q2 and the second transistor Q4 are both in an off state, and the first MOS transistor Q1 and the second MOS transistor Q3 are also in the off state.The power supply VCC charges the second capacitor C2 through the fourth resistor R5, and when the voltage at the two ends of the second capacitor C2 is charged to V of the second MOS transistor Q3 _th When (MOS tube threshold voltage), the second MOS tube Q3 is conducted, the reference signal generating module 11 outputs low level, and the signal collecting circuit is in PNP mode at this time, namely, can collect PNP type sensor signals, which is the default state when the controller does not work yet.

When the acquisition mode of the signal acquisition circuit is required to be switched from the PNP mode to the NPN mode, so that the signal acquisition circuit can acquire an NPN sensor signal, the first end is controlled to output a high level, the first transistor Q2 and the second transistor Q4 are simultaneously conducted, the power supply VCC charges the first capacitor C1, the second capacitor C2 discharges, and the second MOS transistor Q3 is turned off until the voltage at two ends of the second capacitor C2 is smaller than the threshold voltage of the second MOS transistor Q3. Meanwhile, the power supply VCC charges the first capacitor C1 through the second resistor R3, when the voltage at both ends of the first capacitor C1 is higher than the threshold voltage of the first MOS transistor Q1, the first MOS transistor Q1 is turned on, and the reference signal generating module 11 outputs Gao Dianping, and at this time, the signal collecting circuit is in NPN mode, i.e. can collect NPN sensor signals.

Therefore, the dead zone control of the MOS transistor from the PNP mode to the NPN mode can be realized only by discharging the second capacitor C2 to the threshold voltage of the second MOS transistor Q3 and then charging the first capacitor C1 to the threshold voltage of the first MOS transistor Q1.

In order to improve the reliability of the circuit, a certain margin time can be reserved, so that after the second MOS tube Q3 is turned off, the first MOS tube Q1 is turned on after the dead time T. The time required for the power supply VCC to charge the first capacitor C1 to the threshold voltage of the first MOS transistor Q1 through the second resistor R3 can be calculated by equation (1).

Wherein, the value of R is the resistance value of the second resistor R3, the value of C is the capacitance value of the first capacitor C1, V _th The value of (1) is the threshold voltage of the first MOS transistor Q1.

Discharging process of the second capacitor C2The evaluation can be performed by constant current discharge through the second transistor Q4 according to the second capacitance C2. Its discharge time t _cc Can be calculated by the formula (2).

Wherein, the value of C is the capacitance value of the second capacitor C2, the value of Vc is the voltage of the second capacitor C2, V _th The value of beta is the amplification factor of the second transistor Q4, and the value of Ib is the base current of the second transistor Q4.

By configuring parameters of the components, t is as follows _cc +T<t _uc1 After the second MOS tube Q3 is turned off, the first MOS tube Q1 is turned on after the dead time T.

When the first MOS transistor Q1 or the second MOS transistor Q3 fails or is shorted externally, the fifth resistor R2 may provide current limiting protection.

Optionally, the fifth resistor R2 may be a resistor with a smaller resistance, for example, a resistor with a resistance smaller than 50 ohms, so that the output capability of the first MOS transistor Q1 is not greatly affected while the current limiting protection is provided, and the voltage across the first capacitor C1 can be regarded as the voltage V between the gate and the source of the first MOS transistor Q1 due to the smaller output current _gs 。

When the acquisition mode of the signal acquisition circuit is required to be switched from an NPN mode to a PNP mode, the signal acquisition circuit can acquire a PNP sensor signal, the first transistor Q2 and the second transistor Q4 are simultaneously turned off by controlling the first end to output a low level, the power supply VCC charges the second capacitor C2 through the fourth resistor R5, and the second MOS transistor Q3 is turned on when the voltage at two ends of the second capacitor C2 is charged to the threshold voltage of the second MOS transistor Q3. Meanwhile, because the first transistor Q2 is turned off, the first capacitor C1 discharges through the first resistor R1, when the voltage at two ends of the first capacitor C1 is lower than the threshold voltage of the first MOS transistor Q1, the first MOS transistor Q1 is turned off, and the reference signal generating module 11 outputs a low level, and at this time, the signal collecting circuit is in the PNP mode, that is, can collect the PNP sensor signal.

Therefore, the dead zone control of the MOS transistor from the NPN mode to the PNP mode can be realized only by discharging the first capacitor C1 to the threshold voltage of the first MOS transistor Q1 and then charging the second capacitor C2 to the threshold voltage of the second MOS transistor Q3.

In order to improve the reliability of the circuit, a certain margin time can be reserved, so that after the first MOS tube Q1 is turned off, the second MOS tube Q3 is turned on after the dead time T. Time t from Vc discharge of first capacitor C1 to threshold voltage of first MOS transistor Q1 _dc Can be calculated by the formula (3).

Wherein, the value of R is the resistance value of the first resistor R1, the value of C is the capacitance value of the first capacitor C1, V _th The value of (1) is the threshold voltage of the first MOS transistor Q1.

The power supply VCC charges the second capacitor C2 to the threshold voltage t of the second MOS transistor Q3 through the resistor R5 _uc2 Can be calculated by the formula (1), wherein the value of R is the resistance value of the fourth resistor R5, the value of C is the capacitance value of the second capacitor C2, V _th The value of the threshold voltage of the second MOS transistor Q3.

By configuring parameters of the components, t is as follows _dc +T<t _uc2 After the first MOS tube Q1 is turned off, the second MOS tube Q3 is turned on after the dead time T.

The safety and the reliability of the circuit can be improved by arranging the diode D1, the diode D1 is used for preventing external signals from flowing backwards, when the high level of the external signals is higher than the power supply VCC to a certain extent, the current can flow backwards to the power supply VCC through the first MOS tube Q1 and the fifth resistor R2, the signal misjudgment is caused, and the correctness of the signal logic can be ensured by arranging the diode D1 even if the level of the external signals is higher than the power supply VCC.

Fig. 4 is a schematic diagram of a signal acquisition circuit according to another embodiment of the present utility model, and as shown in fig. 4, the signal acquisition module 12 includes a photo-coupling module 121.

The first end of the photoelectric coupling module 121 is connected with the output end of the reference signal generating module 11, the second end of the photoelectric coupling module 121 is connected with the output end of the sensor 14, the third end of the photoelectric coupling module 121 is grounded GND, the fourth end of the photoelectric coupling module 121 is connected with the controller 13, and the fourth end of the photoelectric coupling module 121 is the output end of the signal acquisition module.

Optionally, the optocoupler module 121 includes an optocoupler OC1 and a sixth resistor R4. The optocoupler OC1 adopts a bidirectional optocoupler, that is, the photodiode side of the optocoupler OC1, that is, the first end of the optocoupler module 121 and the second end of the optocoupler module 121, and both forward and reverse currents can trigger the optocoupler OC1 to be conducted. The triode side of the photoelectric coupler OC1 comprises a third end of the photoelectric coupling module 121 and a fourth end of the photoelectric coupling module 121, wherein the third end of the photoelectric coupling module 121 is an emitter of a triode in the photoelectric coupler OC1, the third end is grounded GND, and the fourth end of the photoelectric coupling module 121 is a collector of the triode in the photoelectric coupler OC1, is connected with the second end of the controller, and is pulled up to the power supply VDD through the sixth resistor R4. The sixth resistor R4 provides a default level state of the fourth end of the optocoupler module 121, and meanwhile, when the photodiode in the optocoupler OC1 is turned on, the transistor in the optocoupler OC1 can be ensured to enter a saturated state, so that the level change on the second end of the optocoupler module 121 in different modes can be accurately collected.

The second end of the photoelectric coupling module 121 is connected with the output end of the sensor 14, when the second end of the photoelectric coupling module 121 is connected with the NPN-type sensor, the first end of the controller outputs a high level, the reference signal generating module 11 is switched to the NPN mode, the second MOS transistor Q3 is turned off, the first MOS transistor Q1 is turned on, the first end of the photoelectric coupling module 121 is connected to the power VCC, since the NPN-type sensor outputs a low level signal, the photoelectric coupler OC1 is turned on, the signal collecting module 12 outputs a low level, the NPN-type sensor outputs a high level or a high resistance state when the signal is turned off, the photoelectric coupler OC1 is turned off, and the signal collecting module 12 outputs a high level. When the second end of the photoelectric coupling module 121 is connected to the PNP type sensor, the first end of the controller outputs a low level, so that the reference signal generating module 11 is switched to the PNP mode, the first MOS transistor Q1 is turned off, the second MOS transistor Q3 is turned on, the first end of the photoelectric coupling module 121 is connected to the ground GND, since the PNP type sensor outputs a high level signal, the photoelectric coupler OC1 is turned on, the signal collecting module 12 outputs a low level, and when the PNP type sensor signal is turned off, the photoelectric coupler OC1 is turned off, and the signal collecting module 12 outputs a high level.

Therefore, when an effective sensor signal is acquired, the output signal of the signal acquisition module is low level no matter the sensor is an NPN type sensor or a PNP type sensor, and when the effective sensor signal is not acquired, the output signal of the signal acquisition module is high level no matter the sensor is an NPN type sensor or a PNP type sensor, based on the fact, the controller can process the acquired signal by adopting the same processing logic, and the processing procedure of the controller is simplified.

Optionally, the signal acquisition module 12 further includes a seventh resistor R7. The seventh resistor R7 is a current limiting resistor at the second end of the optocoupler OC1, and plays a role in limiting current, and the forward current of the optocoupler can be adjusted by changing the value of the seventh resistor R7.

In IO logic application, a triode inside a photoelectric coupler works in a saturated state, and forward current of a photodiode in the photoelectric coupler is I _f Positive pressure drop V _f The current transmission ratio (current transfer ratio, CTR) of the photoelectric coupler is K, and the current of the triode in the photoelectric coupler is I _c The following relationship is required to be satisfied when the photocoupler works in a saturated state: i _f *K>I _c ，I _c ＝V _DD /R ₄ ，I _f ＝(V _CC -V _f )/R ₇ So R is ₄ >V _DD *R ₇ /[(V _CC -V _f )*K]. Based on this, the sixth resistor R4 needs to match the magnitude of the current flowing through the photocoupler diode at the time of the input signal touch and the transmission ratio of the photocoupler in a wide temperature range, and to match a suitable resistance value.

The signal acquisition circuit provided by the utility model not only can be compatible with NPN type sensor signals and PNP type sensor signals, but also keeps the trigger logic of the two signals at the controller side consistent, and can switch modes through software, thereby reducing the manual participation degree, simplifying the processing process, reducing the debugging and maintenance difficulty and improving the user experience.

The utility model also provides a chip comprising the signal acquisition circuit provided by any one of the embodiments.

The chip provided by the utility model comprises any signal acquisition circuit provided in the above embodiment, and the content and effect of the signal acquisition circuit can refer to the above circuit embodiment part, and will not be repeated.

The utility model also provides signal acquisition equipment comprising the signal acquisition circuit provided by any embodiment.

The signal acquisition device provided by the utility model comprises any signal acquisition circuit provided in the above embodiment, and the content and effects of the signal acquisition circuit can refer to the above circuit embodiment part, and are not repeated.

It will be apparent to those skilled in the art that various modifications and variations can be made to the embodiments of the present utility model without departing from the spirit and scope of the utility model. Thus, if such modifications and variations of the embodiments of the present utility model fall within the scope of the claims and the equivalents thereof, the present utility model is also intended to include such modifications and variations.

In the present disclosure, the term "include" and variations thereof may refer to non-limiting inclusion; the term "or" and variations thereof may refer to "and/or". The terms "first," "second," and the like in this specification are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. In the present utility model, "a plurality of" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.

Other embodiments of the utility model will be apparent to those skilled in the art from consideration of the specification and practice of the utility model disclosed herein. This utility model is intended to cover any variations, uses, or adaptations of the utility model following, in general, the principles of the utility model and including such departures from the present disclosure as come within known or customary practice within the art to which the utility model pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the utility model being indicated by the following claims.

It is to be understood that the utility model is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the utility model is limited only by the appended claims.

Claims (9)

1. The signal acquisition circuit is characterized by comprising a reference signal generation module, a signal acquisition module and a controller;

the reference signal generation module is provided with an input end connected with the first end of the controller, and an output end of the reference signal generation module is connected with the first input end of the signal acquisition module;

the second input end of the signal acquisition module is connected with the output end of the sensor, and the output end of the signal acquisition module is connected with the second end of the controller;

the reference signal generation module is used for generating a reference signal according to a configuration signal input by the input end of the reference signal generation module, wherein the configuration signal is configured by the controller according to the type of the sensor;

the signal acquisition module is used for generating an output signal according to the signal acquired by the sensor and the reference signal and outputting the output signal to the controller;

the reference signal generation module comprises a first control circuit, a second control circuit and a main circuit;

the input end of the first control circuit is the input end of the reference signal generation module, and the output end of the first control circuit is connected with the first input end of the main circuit;

the input end of the second control circuit is the input end of the reference signal generation module, and the output end of the second control circuit is connected with the second input end of the main circuit;

the output end of the main circuit is the output end of the reference signal generation module;

if the sensor is an NPN type sensor, the first end of the controller outputs a high level, and if the sensor is a PNP type sensor, the first end of the controller outputs a low level;

the first control circuit comprises a first transistor and a first sub-control circuit;

the base electrode of the first transistor is an input end of the first control circuit, the collector electrode of the first transistor is connected with the input end of the first sub-control circuit, and the emitter electrode of the first transistor is grounded GND;

the output end of the first sub-control circuit is the output end of the first control circuit;

the second control circuit comprises a second transistor and a second sub-control circuit;

the base of the second transistor is an input end of the second control circuit, the collector of the second transistor is connected with the input end of the second sub-control circuit, the emitter of the second transistor is grounded GND, and the types of the first transistor and the second transistor are the same;

the output end of the second sub-control circuit is the output end of the second control circuit;

the main circuit comprises a first switch circuit and a second switch circuit;

the input end of the first switch circuit is a first input end of the main circuit, and the output end of the first switch circuit is connected with the output end of the second switch circuit;

the input end of the second switch circuit is a second input end of the main circuit.

2. The circuit of claim 1, wherein the first sub-control circuit comprises a first resistor, a second resistor, and a first capacitor;

the first resistor is connected with the first capacitor in parallel;

the first end of the first resistor is connected with a power supply VCC, and the second end of the first resistor is respectively connected with the input end of the first switch circuit and the first end of the second resistor;

and the second end of the second resistor is connected with the collector electrode of the first transistor.

3. The circuit of claim 2, wherein the second sub-control circuit comprises a third resistor, a fourth resistor, and a second capacitor;

the third resistor is connected with the second capacitor in parallel;

the first end of the third resistor is grounded GND, and the second end of the third resistor is respectively connected with the input end of the second switching circuit, the collector electrode of the second transistor and the first end of the fourth resistor;

the second end of the fourth resistor is connected with a power supply VCC.

4. The circuit of claim 3, wherein the first switching circuit comprises a first MOS transistor;

the source electrode of the first MOS tube is connected with a power supply VCC, the gate electrode of the first MOS tube is the input end of the first switch circuit, and the drain electrode of the first MOS tube is the output end of the first switch circuit.

5. The circuit of claim 3 or 4, wherein the second switching circuit comprises a second MOS transistor;

the source electrode of the second MOS tube is grounded GND, the gate electrode of the second MOS tube is the input end of the second switch circuit, and the drain electrode of the second MOS tube is the output end of the second switch circuit.

6. The circuit of claim 4, wherein the first switching circuit further comprises a diode;

the positive electrode of the diode is connected with the drain electrode of the first MOS tube, and the negative electrode of the diode is the output end of the first switch circuit.

7. The circuit of claim 1, wherein the signal acquisition module comprises a photo-electric coupling module;

the first end of the photoelectric coupling module is connected with the output end of the reference signal generating module, the second end of the photoelectric coupling module is connected with the output end of the sensor, the third end of the photoelectric coupling module is grounded GND, and the fourth end of the photoelectric coupling module is connected with the controller.

8. A signal acquisition chip comprising a signal acquisition circuit as claimed in any one of claims 1 to 7.

9. A signal acquisition device comprising the signal acquisition chip of claim 8.