CN220137323U - Button detection device based on two-wire communication - Google Patents

Abstract

The utility model provides a button detection device based on two-wire communication, which relates to the field of public transportation equipment and solves the problem that a button in the related art easily affects signal communication and is not suitable for development of buses.

Description

Button detection device based on two-wire communication

Technical Field

The utility model relates to the field of public transportation equipment, in particular to a button detection device based on two-wire communication.

Background

In order to improve the bus operation efficiency, the citizens travel faster, more and more bus operators implement responsive stop service, namely when the buses are about to get in, if no passengers in the buses press a get-off button on the buses, no passengers wait at the stops and no other buses stop at the stops, drivers can drive the buses to decelerate and pass through the stops so as to reduce unnecessary time consumption in the process.

Conventional wired buttons have only two wires, typically a ground wire and a signal wire, which are turned on when the wired button is pressed to inform the master.

Conventional wired buttons have become increasingly unable to accommodate the development of buses. When the functions of wired buttons in the automobile are increased, if an off-car indicator lamp or a night background lamp is added, more power lines or signal lines are needed, so that the wiring of the automobile body is more complicated, and the later maintenance and modification are not facilitated. In addition, after installing a plurality of buttons of getting off additional, when single button damage of getting off, the signal communication of on-vehicle bus can receive the influence, and then makes the button of getting off of whole car unable use.

Disclosure of Invention

The utility model provides a button detection device based on two-wire communication, which solves the problem that a button in the related art easily affects signal communication and is not suitable for development of buses, can better adapt to development of buses while realizing two-wire communication, does not need to additionally reserve a hardware interface, and reduces equipment cost.

The utility model provides a button detection device based on two-wire communication, which comprises: the system comprises a main controller, a signal output module, a bus detection module and at least two get-off button modules;

each get-off button module comprises a key unit, a signal receiving and transmitting unit and a processor unit, the processor unit of each get-off button module pre-stores address information corresponding to the get-off button module, a signal detection pin of the processor unit is connected with one end of the key unit, and the processor unit is used for determining whether the key unit is pressed according to signal change of the signal detection pin;

the main controller comprises a first signal output end and a second signal output end, the first signal output end and the second signal output end are both provided with signal output modules, the main controller is connected with the communication bus through the signal output modules, the main controller is used for sending address data carrying address information of the get-off button module at intervals through the signal output modules at the first signal output end, and the main controller is also used for controlling the output of the second signal output end and controlling the communication bus through the signal output modules so as to trigger the main controller to enter a data receiving state;

the first input end of the signal receiving and transmitting unit of each get-off button module is connected with the communication bus, the second input end of the signal receiving and transmitting unit is connected with the signal output pin of the processor unit, the signal output end of the signal receiving and transmitting unit is connected with the signal receiving pin of the processor unit, and the processor unit is also used for receiving address data sent by the main controller through the signal receiving and transmitting unit and controlling the level of the communication bus through the signal receiving and transmitting unit so as to feed back the data to the main controller;

the main controller also comprises a signal receiving end, the signal receiving end is provided with a bus detection module, the detection input end of the bus detection module is connected with the communication bus, the detection output end of the bus detection module is connected with the signal receiving end, and the bus detection module is used for carrying out level detection on the communication bus and feeding back detection results to the main controller so as to receive data fed back by the processor unit.

In some embodiments, the signal output module includes a first voltage dividing resistor, a second voltage dividing resistor, a third voltage dividing resistor, a first NMOS tube, a PMOS tube, and a current limiting resistor; the first divider resistor is arranged at the gate end of the first NMOS tube, the source end of the first NMOS tube is grounded, the drain end of the first NMOS tube is connected with the first end of the second divider resistor, the second end of the second divider resistor is connected with the first end of the third divider resistor, the second end of the second divider resistor is also connected with the gate end of the PMOS tube, the second end of the third divider resistor is connected with the source end of the PMOS tube, the source end of the PMOS tube is also connected with a power supply voltage, and the drain end of the PMOS tube is connected with a communication bus through the current limiting resistor.

In some embodiments, the first current limiting resistance is less than the second current limiting resistance; the first current limiting resistor is a current limiting resistor of a signal output module of the first signal output end and is used for controlling the communication bus to be in a strong pull-up state when the first signal output end outputs a high level; the second current limiting resistor is a current limiting resistor of a signal output end of the second signal output end, and the second current limiting resistor is used for controlling the communication bus to be in a weak pull-up state when the second signal output end outputs a high level.

In some embodiments, the bus detection module includes a fourth voltage dividing resistor, a fifth voltage dividing resistor, and a pull-down resistor; the first end of the fourth voltage dividing resistor is connected with the communication bus, the second end of the fourth voltage dividing resistor is connected with the first end of the fifth voltage dividing resistor, the first end of the fifth voltage dividing resistor is used as a detection output end of the bus detection module to be connected with a signal receiving end of the main controller, the first end of the pull-down resistor is connected with the first end of the fourth voltage dividing resistor, the second end of the pull-down resistor is connected with the second end of the fifth voltage dividing resistor, and the second end of the pull-down resistor is grounded.

In some embodiments, the signal transceiving unit comprises a level adjustment subunit, a signal detection subunit and a voltage regulation subunit; the input end of the level adjusting subunit is connected with the communication bus, and the adjusting end of the level adjusting subunit is used as a second input end of the signal receiving and transmitting unit and is connected with the signal output pin of the processor unit; the signal detection subunit is connected with the level adjustment subunit in parallel, and a first output end of the signal detection subunit is used as a signal output end of the signal receiving and transmitting unit and is connected with a signal receiving pin of the processor unit; the voltage stabilizing subunit is connected with the level adjusting subunit in parallel and is used for stabilizing the voltage on the communication bus.

In some embodiments, the level adjustment subunit includes a thermistor and a second NMOS transistor; one end of the thermistor is connected with the communication bus, the other end of the thermistor is connected with the drain end of the second NMOS tube, the source end of the second NMOS tube is grounded, and the gate end of the second NMOS tube is used as an adjusting end of the level adjusting subunit and is connected with a signal output pin of the processor unit.

In some embodiments, the signal detection subunit includes a sixth voltage dividing resistor and a seventh voltage dividing resistor; the first end of the sixth voltage dividing resistor is connected with the communication bus, the second end of the sixth voltage dividing resistor is connected with the first end of the seventh voltage dividing resistor, and the first end of the seventh voltage dividing resistor is connected with the signal receiving pin of the processor unit.

In some embodiments, the voltage regulator subunit includes a diode, an electrolytic capacitor, a voltage regulator chip, a first filter capacitor, a second filter capacitor, and a third filter capacitor; the anode end of the diode is connected with the communication bus, the cathode end of the diode is connected with the input end of the voltage stabilizing chip, the anode end of the electrolytic capacitor is connected with the input end of the voltage stabilizing chip, one end of the first filter capacitor is connected with the input end of the voltage stabilizing chip, one end of the second filter capacitor is connected with the output end of the voltage stabilizing chip, one end of the third filter capacitor is connected with the output end of the voltage stabilizing chip, and the cathode end of the electrolytic capacitor, the other end of the first filter capacitor, the other end of the second filter capacitor and the other end of the third filter capacitor are all grounded.

In some embodiments, the get-off button module further includes a feedback prompt unit, where the feedback prompt unit is connected to the processor unit of the get-off button module, and the processor unit is configured to output a control signal to control the feedback prompt unit to emit light or vibrate.

In some embodiments, the feedback prompting unit includes an eighth voltage dividing resistor, a third NMOS transistor, a pull-up resistor, and a feedback prompting device; one end of the eighth voltage dividing resistor is connected with the gate end of the third NMOS tube, the source end of the third NMOS tube is grounded, the drain end of the third NMOS tube is connected with one end of the pull-up resistor, the other end of the pull-up resistor is connected with a feedback prompt device, and the feedback prompt device is a light emitting diode or a vibration motor; when the feedback prompting device is a light-emitting diode, the other end of the pull-up resistor is connected with the cathode end of the light-emitting diode, and the anode end of the light-emitting diode is connected with the power supply voltage; and under the condition that the feedback prompt device is a vibration motor, the other end of the pull-up resistor is connected with the vibration motor, and the vibration motor is also connected with a power supply voltage.

In the scheme of the utility model, the main controller sends corresponding address data to the processor unit of the get-off button module through the communication bus, and after the corresponding key unit is pressed and the corresponding address data is received by the get-off button module, the processor unit can feed back to the main controller through the communication bus, so that the main controller can learn the pressed key unit and further inform a driver. In the scheme, the main controller and the get-off button module realize two-wire communication through the communication bus and the ground wire, the get-off button modules are connected in parallel, the main controller does not need to additionally provide a hardware interface, and the signal communication in the communication bus cannot be influenced by the faults of the single get-off button module, so that a more reliable button detection scheme is provided.

Drawings

FIG. 1 is a schematic diagram of a button detecting device based on two-wire communication according to an embodiment of the present utility model;

fig. 2 is a schematic circuit diagram of a signal output module according to an embodiment of the utility model;

FIG. 3 is a schematic circuit diagram of a bus detection module according to an embodiment of the utility model;

fig. 4 is a schematic circuit diagram of a signal transceiver unit according to an embodiment of the utility model;

fig. 5 is a schematic circuit diagram of a feedback prompt unit according to an embodiment of the utility model;

fig. 6 is a schematic circuit diagram of a button detecting device based on two-wire communication according to an embodiment of the present utility model.

Detailed Description

Embodiments of the present utility model will be described in further detail below with reference to the drawings and examples. It should be understood that the particular embodiments described herein are illustrative only and are not limiting of embodiments of the utility model. It should be further noted that, for convenience of description, only some, but not all structures related to the embodiments of the present utility model are shown in the drawings, and those skilled in the art will appreciate that any combination of technical features may constitute alternative embodiments as long as the technical features are not contradictory to each other after reading the present specification.

The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present utility model may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type, and are not limited to the number of objects, such as the first object may be one or more. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship. In the description of the present utility model, "a plurality" means two or more, and "a number" means one or more.

In the process of providing responsive stop service by a bus operator, aiming at different groups such as the old, weak, sick, disabled, pregnant women, children and the like which need assistance and common passenger groups, a plurality of buttons such as a first button aiming at the old, weak, sick, disabled, pregnant passengers groups and a second button of the common passenger groups can be arranged on the bus, and then after the different buttons are pressed, a driver can control the bus to execute different stop strategies according to the pressed buttons, such as the inclination of a carriage when the bus is stopped so as to facilitate the old, disabled and the like to get on or off the bus.

However, in the related art, after a plurality of get-off buttons are set, after a single get-off button is damaged, signal communication on a signal line can be affected, so that a master controller cannot effectively identify the pressed get-off button, and further the get-off button of the whole vehicle fails.

Therefore, the utility model provides a button detection device based on two-wire communication, which can be applied to buses, and comprises a main controller, a signal output module, a bus detection module and at least two get-off button modules, wherein as shown in fig. 1, fig. 1 is a schematic structural diagram of the button detection device based on two-wire communication provided by an embodiment of the utility model.

As shown in the drawing, the BUS is represented as a communication BUS, the GND is represented as a ground, the master controller 100 is connected to the communication BUS through the signal output module 200 and the BUS detection module 300, and the get-off button module 400 is also connected to the communication BUS, and it is conceivable that both the master controller 100 and the get-off button module 400 are also connected to the ground. In addition, a plurality of get-off button modules are not shown in the figure, and other get-off button modules are also shown by "… …" in the figure.

The main controller 100 includes a first signal output end, a second signal output end, and a signal receiving end, where the first signal output end and the second signal output end are both provided with a signal output module 200. The signal receiving end is provided with a bus detection module 300, a detection input end of the bus detection module 300 is connected with the communication bus, and a detection output end of the bus detection module 300 is connected with the signal receiving end of the main controller 100.

Each of the get-off button modules 400 includes a signal transceiver unit 410, a processor unit 420, and a key unit 430, and address information corresponding to the module is pre-stored in the processor unit 420 corresponding to each of the get-off button modules. The processor unit 420 is connected to the key unit 430 through a signal detection pin thereon, and in addition, a first input terminal of the signal transceiver unit 410 is connected to the communication bus, and the processor unit 420 is connected to a second input terminal of the signal transceiver unit 410 through a signal output pin thereon, and a signal output terminal of the signal transceiver unit 410 is connected to a signal receiving pin of the processor unit 420.

When the key unit 430 is pressed, the processor unit 420 may detect that the key unit 430 is pressed according to the signal detection pin, i.e., the processor unit 420 may determine whether the key unit 430 is pressed according to a signal change of the signal detection pin. The master controller 100 may send address data carrying address information at intervals through the signal output module 200 at the first signal output end, for example, when two get-off button modules 400 exist, correspondingly, the master controller 100 outputs address data corresponding to one get-off button module after outputting address data corresponding to another get-off button module at intervals. In this interval, the master 100 may control the output of the second signal output end, and further control the communication bus through the signal output module 200 connected to the second signal output end, so that the master 100 enters the data receiving state, that is, the master 100 performs address data transmission through the first signal output end and enters the data receiving state through the second signal output end.

It should be appreciated that the master 100 is further configured to receive data fed back by the processor unit 420 during an interval of sending address data, that is, the master 100 detects the communication bus through the signal receiving end and the bus detection module 300 to receive the data.

The processor unit 420 of each get-off button module 400 can receive the address data transmitted from the main controller 100 through the communication bus through the signal transceiver unit 410 thereon, and it is conceivable that the processor unit 420 receives the address data transmitted from the main controller 100 through the communication bus through the signal transceiver unit 410 at the signal receiving pin, and the processor unit 420 also compares the pre-stored address information with the received address data to determine whether the two are identical. When the two corresponding key units 430 are the same and pressed, the processor unit 420 controls the signal transceiver unit 410 through the signal output pin, and further controls the communication bus, so as to implement data feedback to the master controller 100, that is, the processor unit 420 can control the level of the communication bus through the signal transceiver unit 410 to feed back data to the master controller 100.

In addition, the data sent by the processor unit 420 through the signal transceiver unit 410 and transmitted on the communication bus can be accessed into the master 100 by the bus detection module 300 through the signal receiving end, that is, the master 100 can perform level detection on the communication bus according to the signal received by the bus detection module 300, and receive the detection result at the signal receiving end.

Therefore, the main controller can adjust the communication bus through the signal output end on the main controller, a hardware interface is not required to be additionally provided for different get-off buttons, and when the main controller can communicate with the processor units of all the get-off button modules, the fault of a single get-off button module can not influence the signal communication in the communication bus, so that the two-wire communication mode provided by the scheme is more reliable.

Fig. 2 is a schematic circuit diagram of a signal output module according to an embodiment of the utility model, as shown in fig. 2, in an embodiment, the signal output module includes a first voltage dividing resistor R1, a second voltage dividing resistor R2, a third voltage dividing resistor R3, a first NMOS transistor Q1, a PMOS transistor Q2, and a current limiting resistor RL.

Specifically, one end of the first voltage dividing resistor R1 is connected to the first signal output end or the second signal output end of the master controller, and the other end of the first voltage dividing resistor R1 is connected to the gate end of the first NMOS transistor Q1.

In addition, the source end of the first NMOS transistor Q1 is grounded, and the drain end of the first NMOS transistor Q1 is sequentially connected with the second voltage dividing resistor R2 and the third voltage dividing resistor R3, that is, the second voltage dividing resistor R2 and the third voltage dividing resistor R3 are connected in series and connected to the drain end of the first NMOS transistor Q1; the first end of the second voltage-dividing resistor R2 is connected to the drain end of the first NMOS transistor Q1, and the second end of the second voltage-dividing resistor R2 is connected to the gate end of the PMOS transistor.

The source end of the PMOS tube Q2 is connected with the power supply voltage, the source end of the PMOS tube Q2 is also connected with the second end of the third voltage dividing resistor R3, and the drain end of the PMOS tube Q2 is connected with the communication bus through the current limiting resistor RL.

It can be understood that when the master controller outputs a high level through the first signal output end or the second signal output end, the voltage of the gate end of the first NMOS transistor Q1 is increased, so that the first NMOS transistor Q1 is turned on, and then the voltage of the gate end of the PMOS transistor Q2 is reduced, so that the conduction condition is met, the PMOS transistor Q2 is turned on, and the level of the communication bus is increased to supply power to the communication bus.

When the master controller outputs a low level through the first signal output end or the second signal output end, the gate end of the first NMOS tube Q1 is at a low level, the first NMOS tube Q1 is not conducted, the gate end of the PMOS tube Q2 is at a high level, the conducting condition is not met, and the PMOS tube Q2 is not conducted, so that the level of the communication bus is in a low level state.

Therefore, the master controller can control the level change of the communication bus by controlling the output level of the first signal output end or the second signal output end, and the address data is sent by the level change of the communication bus.

In some embodiments, the current limiting resistance (hereinafter referred to as a first current limiting resistance) in the signal output module corresponding to the first signal output terminal is smaller than the current limiting resistance (hereinafter referred to as a second current limiting resistance) in the signal output module corresponding to the second signal output terminal. The first current limiting resistor can enable the communication bus to be in a strong pull-up state when the first signal output end outputs high level, namely, the communication bus is in the strong pull-up state when the level of the communication bus is increased, so that the voltage of the communication bus is higher, and the level change is more obvious.

And the second current limiting resistor can control the communication bus to be in a weak pull-up state when the second signal output end outputs a high level, so that the main controller is in a data receiving state, and the data sent by the processor unit of the get-off button module is better received.

It can be understood that when the master needs to send address data, the first signal output end of the master outputs a high level or a low level and the second signal output end outputs a low level; when the master controller needs to receive data, the first signal output end of the master controller outputs a low level and the second signal output end outputs a high level.

Therefore, by setting the current limiting resistors with different resistance values, the button detection device can adjust the strong and weak pull-up state of the communication bus, so that data can be transmitted and received better.

Fig. 3 is a schematic circuit diagram of a bus detection module according to an embodiment of the utility model, and as shown in fig. 3, the bus detection module includes a fourth voltage dividing resistor R4, a fifth voltage dividing resistor R5, and a pull-down resistor Rd.

The fourth voltage dividing resistor R4 and the fifth voltage dividing resistor R5 are connected in series, the first end of the fourth voltage dividing resistor R4 is used as a detection input end of the bus detection module, that is, the first end of the fourth voltage dividing resistor R4 is connected with the communication bus, and the second end of the fourth voltage dividing resistor R4 is connected with the first end of the fifth voltage dividing resistor R5. The first end of the fifth voltage dividing resistor R5 is used as a detection output end of the bus detection module, is connected with a signal receiving end of the master controller, and the second end of the fifth voltage dividing resistor R5 is grounded. The pull-down resistor Rd is connected in parallel with the fourth voltage dividing resistor R4 and the fifth voltage dividing resistor R5, i.e. the first end of the pull-down resistor Rd is connected to the first end of the fourth voltage dividing resistor R4, and the second end of the pull-down resistor Rd is connected to the second end of the fifth voltage dividing resistor R5.

Therefore, the level change of the communication bus can be detected by the bus detection module, and the level change of the communication bus is fed back to the master controller by the detection output end so as to receive the data fed back by the get-off button module through the communication bus.

In some embodiments, the signal transceiver unit includes a level adjustment subunit, a signal detection subunit, and a voltage stabilizing subunit, where the level adjustment subunit, the signal detection subunit, and the voltage stabilizing subunit are in a parallel connection relationship, it is contemplated that the level adjustment subunit, the signal detection subunit, and the voltage stabilizing subunit are all connected to the communication bus, and the level adjustment subunit, the signal detection subunit, and the voltage stabilizing subunit are further connected to a ground line.

Specifically, the level adjustment subunit comprises an input end and an adjustment end, and the input end of the level adjustment subunit is connected with the communication bus; and the adjusting end of the level adjusting subunit is used as a second input end of the signal receiving and transmitting unit and is connected with the signal output pin of the processor unit.

The first output end of the signal detection subunit is used as a signal output end of the signal receiving and transmitting unit and is connected with a signal receiving pin of the processor unit; it is conceivable that the second output of the signal detection subunit is connected to ground and that the input of the signal detection subunit is connected to the communication bus.

The voltage stabilizing subunit is connected with the level adjusting subunit in parallel, namely, the input end of the voltage stabilizing subunit is connected with the communication bus and is used for stabilizing the voltage on the communication bus.

Therefore, the processor unit detects the level change on the communication bus through the signal receiving and transmitting unit so as to receive the address data sent by the main controller, and the processor unit can adjust the level of the communication bus through the signal receiving and transmitting unit so as to feed back the level to the main controller, so that two-wire communication between the processor unit and the main controller is realized, and the main controller can conveniently identify the pressed key unit.

Fig. 4 is a schematic circuit diagram of a signal transceiver unit according to an embodiment of the present utility model, and as shown in fig. 4, a signal transceiver unit 410 includes a level adjustment subunit 411, a signal detection subunit 412, and a voltage stabilizing subunit 413.

The level adjusting subunit 411 includes a thermistor Rt and a second NMOS Q3, where one end of the thermistor Rt is connected to the communication bus, and the other end of the thermistor Rt is connected to the drain end of the second NMOS Q3. The source terminal of the second NMOS transistor Q3 is grounded, and the gate terminal of the second NMOS transistor Q3 is connected to the signal output pin of the processor unit, and the gate terminal of the second NMOS transistor Q3 is used as the adjusting terminal of the level adjusting subunit 411.

The signal detecting subunit 412 includes a sixth voltage dividing resistor R6 and a seventh voltage dividing resistor R7 connected in series, where the sixth voltage dividing resistor R6 is further connected to the communication bus, and a first end of the seventh voltage dividing resistor R7 is connected to the signal receiving pin of the processor unit as a first output end of the signal detecting subunit 412.

In addition, the voltage regulator subunit 430 includes a diode D1, an electrolytic capacitor Cf, a voltage regulator chip U1, a first filter capacitor C1, a second filter capacitor C2, and a third filter capacitor C3. The input end of the voltage stabilizing chip U1 is connected with the communication bus through a diode D1, the input end of the voltage stabilizing chip U1 is connected with the cathode end of the diode D1, the positive end of the electrolytic capacitor Cf and one end of the first filter capacitor C1 are both connected with the input end of the voltage stabilizing chip U1, and one end of the second filter capacitor C2 and one end of the third filter capacitor C3 are both connected with the output end of the voltage stabilizing chip U1.

It will be appreciated that the processor unit receives the address data sent by the master controller via the communication bus through the signal detecting subunit 412, i.e. the processor unit may determine the level change on the communication bus by detecting the voltage across the seventh voltage dividing resistor R7. In addition, the processor unit may further control the voltage at the gate end of the second NMOS transistor Q3 to feed back data to the main controller, for example, the signal output pin of the processor unit outputs a high level, so that the second NMOS transistor Q3 is turned on, thereby pulling down the voltage of the communication bus, and the main controller can detect the level change through the bus detection module, so that the main controller can determine that the processor unit feeds back the address data currently sent.

It should be noted that, in some embodiments, the level adjustment subunit includes a thermistor and a PMOS transistor, a source terminal of the PMOS transistor is connected to the communication bus, a drain terminal of the PMOS transistor is connected to the thermistor, and a gate terminal of the PMOS transistor is connected to the processor unit as an adjustment terminal.

Fig. 5 is a schematic circuit diagram of a feedback prompting unit according to an embodiment of the present utility model, as shown in fig. 5, in some embodiments, the get-off button module further includes a feedback prompting unit, where the feedback prompting unit may control the feedback prompting unit to emit light according to a control signal output by the processor unit. The feedback prompting unit comprises an eighth voltage dividing resistor R8, a third NMOS tube Q4, a pull-up resistor Ru and a light emitting diode D2.

Specifically, one end of the eighth voltage dividing resistor R8 is connected to the gate end of the third NMOS transistor Q4, the other end of the eighth voltage dividing resistor R8 is connected to the processor unit, the source end of the third NMOS transistor Q4 is grounded, the drain end of the third NMOS transistor Q4 is connected to one end of the pull-up resistor Ru, the other end of the pull-up resistor Ru is connected to the cathode end of the light emitting diode D2, and the anode end of the light emitting diode D2 is connected to the power supply voltage.

It can be understood that the light emitting diode D2 is used as a feedback prompting device, and the processor unit controls the on of the third NMOS transistor Q4, so as to control the light emitting diode D2 to be turned on and emit light. Of course, it is contemplated that in some embodiments, the light emitting diode D2 may also be provided with a plurality.

It should be noted that, in an embodiment, the light emitting diode of the feedback prompt unit may be replaced by a vibration motor, and the vibration motor is connected to the power voltage and is further connected to the pull-up resistor, so that the processor unit may control the third NMOS to be turned on, so as to drive the vibration motor, thereby implementing vibration prompt.

Fig. 6 is a schematic circuit diagram of a button detecting device based on two-wire communication according to an embodiment of the present utility model, in which a main controller is not shown, but the IO1 pin, the IO2 pin, and the IO3 pin indicated in the drawing correspond to a first signal output end, a second signal output end, and a signal receiving end of the main controller, respectively.

In the figure, a signal output module (hereinafter referred to as a first signal output module 201) connected to a first signal output terminal is denoted by 201, a signal output module (hereinafter referred to as a second signal output module 202) connected to a second signal output terminal is denoted by 202, and a BUS is denoted as a communication BUS (hereinafter also referred to as a BUS).

As shown in the figure, the master controller regulates the output of the first signal output module 201 by controlling the output of the IO1 pin, specifically, when the IO1 pin is at a high level, the first NMOS transistor Q1 is turned on, and the PMOS transistor Q2 is also turned on, so that the BUS is at a high level; when the IO1 pin is at a low level, the first NMOS transistor Q1 is not conducted, and the PMOS transistor Q2 is also not conducted, so that the BUS BUS is at a low level.

The first signal output module 201 and the second signal output module 202 have the same device and connection relationship, so, similarly, the master can also adjust the output of the second signal output module 202 by controlling the output of the IO2 pin.

When the master controller needs to send address data, the master controller controls the IO2 pin to output low level, and adjusts the level change of the BUS BUS by controlling the level change of the IO1 pin so as to send the address data to the processing chip U2 in the processor unit 420. The processing chip U2 includes a signal detection pin PA0, a signal output pin PA2, and a signal reception pin PA3. The PA3 pin of the processing chip U2 can receive the level change on the BUS, i.e., the address data transmitted by the master, through the signal receiving unit 410.

When the key S1 in the key unit 430 is pressed, the level of the PA0 pin changes, that is, the processing chip U2 can detect that the key S1 is pressed through the PA0 pin. Therefore, when the key S1 is detected to be pressed, the processing chip U2 compares the received address data with the pre-stored address information, and when the two address data are the same, the processing chip U2 can control the second NMOS transistor Q3 to be turned on through the PA2 pin, so that the BUS level is lowered, and the master controller can detect the level change of the BUS through the IO3 pin and the BUS detection module 300, determine that the transmitted address data is fed back, and further determine the pressed button.

It should be appreciated that the master may continuously send address data corresponding to each get-off button module, and that there is a time interval between each set of address data, so that the master receives feedback from the processing chip U2 through the communication bus, and helps the master determine the pressed button according to the feedback from the processing chip U2.

Of course, the processing chip U2 may also control the feedback prompting unit 440 to perform feedback prompting, for example, by controlling the PA6 pin to make the third NMOS Q4 turned on, so that the light emitting diode D2 emits light, which plays a role in prompting the passenger that the button has been pressed.

In addition, it is conceivable that the control of the feedback prompt unit 440 by the processing chip U2 may also be initiated by a master, for example, the master controls the level change of the BUS through the IO1 pin and the first signal output module 201 to transmit data to the processing chip U2, and the processing chip U2 controls the feedback prompt unit 440 after receiving the data.

Note that the above is only a preferred embodiment of the present utility model and the technical principle applied. It will be understood by those skilled in the art that the present utility model is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the utility model. Therefore, while the utility model has been described in connection with the above embodiments, the utility model is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the utility model, which is set forth in the following claims.

Claims (10)

1. The button detection device based on two-wire communication is characterized by comprising a main controller, a signal output module, a bus detection module and at least two get-off button modules;

each get-off button module comprises a key unit, a signal receiving and transmitting unit and a processor unit, address information corresponding to the get-off button module is prestored in the processor unit of each get-off button module, a signal detection pin of the processor unit is connected with one end of the key unit, and the processor unit is used for determining whether the key unit is pressed or not according to signal change of the signal detection pin;

the master controller comprises a first signal output end and a second signal output end, the first signal output end and the second signal output end are both provided with the signal output module, the master controller is connected with a communication bus through the signal output module, the master controller is used for sending address data carrying address information of the get-off button module at intervals through the signal output module at the first signal output end, and the master controller is also used for controlling the output of the second signal output end and controlling the communication bus through the signal output module so as to trigger the master controller to enter a data receiving state;

the first input end of the signal receiving and transmitting unit of each get-off button module is connected with the communication bus, the second input end of the signal receiving and transmitting unit is connected with the signal output pin of the processor unit, the signal output end of the signal receiving and transmitting unit is connected with the signal receiving pin of the processor unit, and the processor unit is further used for receiving address data sent by the master controller through the signal receiving and transmitting unit and controlling the level of the communication bus through the signal receiving and transmitting unit so as to feed back the data to the master controller;

the main controller further comprises a signal receiving end, the signal receiving end is provided with the bus detection module, the detection input end of the bus detection module is connected with the communication bus, the detection output end of the bus detection module is connected with the signal receiving end, and the bus detection module is used for carrying out level detection on the communication bus and feeding back detection results to the main controller so as to receive data fed back by the processor unit.

2. The button detection apparatus based on two-wire communication according to claim 1, wherein the signal output module comprises a first voltage dividing resistor, a second voltage dividing resistor, a third voltage dividing resistor, a first NMOS tube, a PMOS tube and a current limiting resistor;

the first voltage dividing resistor is arranged at the gate end of the first NMOS tube, the source end of the first NMOS tube is grounded, the drain end of the first NMOS tube is connected with the first end of the second voltage dividing resistor, the second end of the second voltage dividing resistor is connected with the first end of the third voltage dividing resistor, the second end of the second voltage dividing resistor is also connected with the gate end of the PMOS tube, the second end of the third voltage dividing resistor is connected with the source end of the PMOS tube, the source end of the PMOS tube is also connected with a power supply voltage, and the drain end of the PMOS tube is connected with the communication bus through the current limiting resistor.

3. The two-wire communication based button detection apparatus of claim 2, wherein the first current limiting resistor is smaller than the second current limiting resistor;

the first current limiting resistor is a current limiting resistor of a signal output module of the first signal output end and is used for controlling the communication bus to be in a strong pull-up state when the first signal output end outputs a high level;

the second current limiting resistor is a current limiting resistor of the signal output end of the second signal output end, and the second current limiting resistor is used for controlling the communication bus to be in a weak pull-up state when the second signal output end outputs a high level.

4. The two-wire communication based button detection apparatus of claim 1, wherein the bus detection module comprises a fourth voltage dividing resistor, a fifth voltage dividing resistor and a pull-down resistor;

the first end of the fourth voltage dividing resistor is connected with the communication bus, the second end of the fourth voltage dividing resistor is connected with the first end of the fifth voltage dividing resistor, the first end of the fifth voltage dividing resistor is used as a detection output end of the bus detection module to be connected with a signal receiving end of the main controller, the first end of the pull-down resistor is connected with the first end of the fourth voltage dividing resistor, the second end of the pull-down resistor is connected with the second end of the fifth voltage dividing resistor, and the second end of the pull-down resistor is grounded.

5. The button detecting device based on two-wire communication according to claim 1, wherein the signal transceiving unit comprises a level adjustment subunit, a signal detection subunit and a voltage stabilizing subunit;

the input end of the level adjustment subunit is connected with the communication bus, and the adjustment end of the level adjustment subunit is used as a second input end of the signal receiving and transmitting unit and is connected with the signal output pin of the processor unit;

the signal detection subunit is connected with the level adjustment subunit in parallel, and a first output end of the signal detection subunit is used as a signal output end of the signal receiving and transmitting unit and is connected with a signal receiving pin of the processor unit;

the voltage stabilizing subunit is connected with the level adjusting subunit in parallel, and is used for stabilizing the voltage on the communication bus.

6. The two-wire communication based button detection apparatus of claim 5, wherein the level adjustment subunit comprises a thermistor and a second NMOS tube;

one end of the thermistor is connected with the communication bus, the other end of the thermistor is connected with the drain end of the second NMOS tube, the source end of the second NMOS tube is grounded, and the gate end of the second NMOS tube is used as an adjusting end of the level adjusting subunit to be connected with a signal output pin of the processor unit.

7. The two-wire communication based button detection apparatus of claim 5, wherein the signal detection subunit comprises a sixth voltage dividing resistor and a seventh voltage dividing resistor;

the first end of the sixth voltage dividing resistor is connected with the communication bus, the second end of the sixth voltage dividing resistor is connected with the first end of the seventh voltage dividing resistor, and the first end of the seventh voltage dividing resistor is connected with the signal receiving pin of the processor unit.

8. The two-wire communication based button detection apparatus according to claim 5, wherein the voltage stabilizing subunit comprises a diode, an electrolytic capacitor, a voltage stabilizing chip, a first filter capacitor, a second filter capacitor, and a third filter capacitor;

the anode end of the diode is connected with the communication bus, the cathode end of the diode is connected with the input end of the voltage stabilizing chip, the anode end of the electrolytic capacitor is connected with the input end of the voltage stabilizing chip, one end of the first filter capacitor is connected with the input end of the voltage stabilizing chip, one end of the second filter capacitor is connected with the output end of the voltage stabilizing chip, one end of the third filter capacitor is connected with the output end of the voltage stabilizing chip, and the cathode end of the electrolytic capacitor, the other end of the first filter capacitor, the other end of the second filter capacitor and the other end of the third filter capacitor are grounded.

9. The two-wire communication-based button detection apparatus according to any one of claims 1 to 8, wherein the get-off button module further comprises a feedback prompt unit, the feedback prompt unit is connected to a processor unit of the get-off button module, and the processor unit is configured to output a control signal to control the feedback prompt unit to emit light or vibrate.

10. The button detecting device based on two-wire communication according to claim 9, wherein the feedback prompting unit comprises an eighth voltage dividing resistor, a third NMOS transistor, a pull-up resistor and a feedback prompting device;

one end of the eighth voltage dividing resistor is connected with the gate end of the third NMOS tube, the source end of the third NMOS tube is grounded, the drain end of the third NMOS tube is connected with one end of the pull-up resistor, the other end of the pull-up resistor is connected with the feedback prompt device, and the feedback prompt device is a light emitting diode or a vibration motor;

when the feedback prompt device is a light-emitting diode, the other end of the pull-up resistor is connected with the cathode end of the light-emitting diode, and the anode end of the light-emitting diode is connected with a power supply voltage;

and under the condition that the feedback prompt device is a vibration motor, the other end of the pull-up resistor is connected with the vibration motor, and the vibration motor is also connected with a power supply voltage.