CN220043764U - Multilayer circuit board, circuit board and electronic equipment - Google Patents

Abstract

The utility model provides a multilayer circuit board, a circuit board and electronic equipment, and relates to the technical field of electronic circuits. A multilayer circuit board comprising: n layers of metal layers are overlapped and connected, and N is a positive integer greater than or equal to 3; a first metal layer of the N metal layers is provided with a connecting area, and the connecting area is configured to be connected with the antenna end radio frequency seat; the front K metal layers in the N metal layers are provided with first clearance areas, and the first clearance areas are hollowed areas in the metal layers; k is a positive integer less than or equal to N-1; the connection region of the first metal layer surrounds the first headroom region of the first metal layer. Because the front K metal layers in the N metal layers are provided with the first clearance area, the antenna end radio frequency seat can be isolated through the clearance area after being connected with the multi-layer circuit board, and therefore impedance discontinuity and mismatch caused by welding of the high-frequency range radio frequency seat and the PCB end can be reduced.

Description

Multilayer circuit board, circuit board and electronic equipment

Technical Field

The present utility model relates to the technical field of electronic circuits, and in particular, to a multilayer circuit board, a circuit board, and an electronic device.

Background

Insertion loss refers to signal loss generated by the wiring or components of an inserted PCB (Printed circuit board ) between two ports of a circuit, and generally refers to attenuation, and is abbreviated as insertion loss. In the circuit design process, the magnitude of insertion loss can influence the radio frequency index of the product, such as the receiving sensitivity, which is the lowest signal strength that the product can receive and still work normally, and the excessive insertion loss can lead to the receiving performance of the product to be less than the standard.

The insertion loss of the PCB wiring is related to indexes such as working frequency, dielectric material, dielectric thickness, wiring impedance width, reference ground and the like. At present, with the rise of 5G technology, the working frequency and bandwidth are also improved, and the medium between the PCB layers is thinned, so that the insertion loss of the PCB wiring is increased under the conditions of high frequency and high bandwidth, and impedance discontinuity and mismatch can occur when the radio frequency base in the high frequency range is welded with the PCB end.

Disclosure of Invention

The utility model provides a multilayer circuit board, a circuit board and electronic equipment, which are used for solving the problems that in the prior art, impedance discontinuity and mismatch occur when a radio frequency seat in a high frequency range is welded with a PCB end.

In a first aspect, the present utility model provides a multilayer circuit board comprising: n layers of metal layers are overlapped and connected, wherein N is a positive integer greater than or equal to 3; a first metal layer of the N metal layers is provided with a connection area, and the connection area is configured to be connected with an antenna end radio frequency seat; the front K metal layers in the N metal layers are provided with first clearance areas, and the first clearance areas are hollowed areas in the metal layers; k is a positive integer less than or equal to N-1; the connection region of the first metal layer surrounds the first headroom region of the first metal layer.

In the embodiment of the utility model, the front K metal layers in the N metal layers have the first clearance area, so that the antenna end radio frequency seat can be isolated through the clearance area after being connected with the multi-layer circuit board, and parasitic capacitance generated by the antenna end radio frequency seat and the multi-layer circuit board directly can be reduced, thereby reducing impedance discontinuity and mismatch caused by welding the high-frequency range radio frequency seat and the circuit board (namely the PCB) end.

With reference to the foregoing technical solutions of the first aspect, in some possible implementation manners, the antenna-side radio-frequency seat includes a ground terminal and an impedance PIN terminal, and the connection area of the first metal layer includes: a ground connection region, a PIN connection impedance line, the ground connection region configured to connect to a ground terminal of the antenna terminal radio frequency block, and the ground connection region being grounded, the ground connection region surrounding the first headroom region; the PIN connection impedance line is configured to connect an impedance PIN end of the antenna end radio frequency block, and the PIN connection impedance line is not grounded.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, a plurality of first vias are provided in the ground connection area, the plurality of first vias are disposed around the first headroom area at intervals, and an interval between two adjacent first vias is smaller than a preset threshold, and each first via is grounded.

In the embodiment of the utility model, the plurality of first through holes are arranged at intervals around the first clearance area, and the interval between two adjacent first through holes is smaller than the preset threshold value, so that the effect of isolating the antenna end radio frequency base can be further improved, and meanwhile, the plurality of through holes can be increased to a reflux path of the ground. Because of the discontinuous point of the impedance, the reflow path of the signal is disconnected from the discontinuous point of the impedance, so that the area surrounded by the reflow path of the signal can be reduced, the first via hole can provide the shortest reflow path of the signal, and further, the radiation of the signal can be reduced, the loss is reduced, and the higher the frequency of the signal, the better the effect of reducing the loss is.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, a second via hole is disposed in the ground connection area; the second via surrounds the first headroom region.

In the embodiment of the utility model, the second through hole surrounds the first clearance area, so that the effect of isolating the antenna end radio frequency seat is improved.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, the second via hole is filled with a first metal material, and the first metal material is grounded.

In the embodiment of the utility model, the first metal material is filled in the second through hole, so that the thickness of the metal layer surrounding the first clearance area is thicker, thereby improving the effect of the second through hole on isolating the antenna end radio frequency base, simultaneously, the width of a reflux path to the ground is increased by the first metal material, and further improving the reflux effect of the reflux path to the ground.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, all side walls of the first headroom area are covered with a second metal material, and the second metal material is grounded.

In the embodiment of the utility model, the second metal materials are covered on the side walls of all the first clearance areas, so that the first clearance areas are surrounded by the metal materials, and the effect of isolating the antenna-end radio frequency seat is improved. Meanwhile, since all the second metal materials are grounded, a return path to ground is increased.

With reference to the foregoing technical solution provided in the first aspect, in some possible implementation manners, a front J-layer metal layer of the N-layer metal layers has a second headroom region, and the second headroom regions of the metal layers overlap; the PIN connection impedance line of the first metal layer is arranged in a second clearance area of the first metal layer; wherein J is a positive integer less than or equal to N-1.

In the embodiment of the utility model, the second clearance area is arranged on the front J-layer metal layer in the metal layers, so that parasitic capacitance formed by the PIN connection impedance line and other metal layers can be reduced, and the accuracy of the PIN connection impedance line is improved.

With reference to the foregoing technical solution provided in the first aspect, in some possible implementation manners, each of the X metal layers in the metal layers of the front J layers is provided with a PIN connection impedance line, the PIN connection impedance line of each metal layer is disposed in the second clearance area of the metal layer, and each PIN connection impedance line is connected in parallel; wherein X is a positive integer less than or equal to J.

In the embodiment of the utility model, the performance of the PIN connecting impedance lines can be improved by connecting the PIN connecting impedance lines in parallel, so that the stability and the reliability of the PIN connecting impedance lines are improved.

In a second aspect, the present utility model provides a circuit board comprising: the antenna-end radio-frequency base is connected with the multilayer circuit board according to the first aspect and/or any implementation manner of the first aspect.

In a third aspect, the present utility model provides an electronic device comprising: the circuit board according to the second aspect.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural view of a first multi-layer circuit board according to an embodiment of the present utility model;

fig. 2 is a schematic structural view of a second multi-layer circuit board according to an embodiment of the present utility model;

fig. 3 is a schematic structural view of a third multi-layer circuit board according to an embodiment of the present utility model;

FIG. 4 is a schematic view of a first metal layer according to an embodiment of the present utility model;

fig. 5 is a schematic structural view of a fourth multi-layer circuit board according to an embodiment of the present utility model;

fig. 6 is a block diagram of a circuit board according to an embodiment of the present utility model;

fig. 7 is a block diagram of an electronic device according to an embodiment of the present utility model.

Reference numerals:

10-a circuit board; 20-an electronic device; 100-a multilayer circuit board; 200-an antenna end radio frequency base; 110-a first headroom region; 120-a junction region; 121-a ground connection region; a 122-PIN connection impedance line; 1211-a first via; 1212-second vias; 1213-a second metal material; 130-second headroom region.

Detailed Description

The terms "first," "second," and the like are used merely for distinguishing between descriptions and not necessarily for indicating a sequential order, nor are they to be construed as indicating or implying relative importance.

In the description of the present utility model, it should be noted that, the azimuth or positional relationship indicated by the terms "upper", "lower", etc. are based on the azimuth or positional relationship shown in the drawings, or the azimuth or positional relationship that is commonly put in use of the product of the application, are merely for convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the device or element to be referred to must have a specific azimuth, be configured and operated in a specific azimuth, and therefore should not be construed as limiting the present utility model.

The technical scheme of the present utility model will be described in detail with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a multi-layer circuit board according to an embodiment of the utility model.

The multilayer circuit board comprises N layers of metal layers, wherein different metal layers are connected in an overlapping mode, and N is a positive integer greater than or equal to 3.

Wherein, overlap the connection through insulating layer between the different metal layers, can electrically connect through modes such as via hole between the different metal layers. The vias will connect the different metal layers through the insulating layer.

The first metal layer of the N metal layers has a connection region 120, and the connection region 120 is configured to connect to an antenna-side rf socket. The first K metal layers of the N metal layers have a first clearance area 110, where the first clearance area 110 is a hollowed-out area of the metal layers. K is a positive integer less than or equal to N-1. The connection region 120 of the first metal layer surrounds the first headroom region 110 of the first metal layer.

The first metal layer is a surface metal layer of the multi-layer circuit board, and the front K metal layers in the N metal layers are continuous K metal layers taking the first metal layer of the multi-layer circuit board as a starting point.

The shape of the first headroom region 110 may be set according to practical needs, and may be, for example, rectangular, circular, diamond, pentagonal, etc., and the shape of the first headroom region 110 includes, but is not limited to, the above-described exemplary embodiment.

Since the antenna-side rf pad includes a ground terminal and an impedance PIN terminal, in one embodiment, the connection region 120 of the first metal layer includes a ground connection region 121 and a PIN connection impedance line 122. For ease of understanding, please refer to fig. 2.

The PIN connection impedance line 122 is a microstrip line.

The ground connection region 121 is configured to be connected to a ground terminal of the antenna-side rf seat, and the ground connection region 121 is grounded, and the ground connection region 121 surrounds the first headroom region 110.

The PIN connection impedance line 122 is configured to connect to an impedance PIN terminal of the antenna terminal radio frequency block, and the PIN connection impedance line 122 is not grounded.

In order to improve the isolation effect of the rf seat at the antenna end and increase the return path to ground, the ground connection area 121 may have the following embodiments.

In the first embodiment, a plurality of first vias 1211 are disposed in the ground connection area 121, the plurality of first vias 1211 are disposed around the first headroom area 110 at intervals, and the interval between two adjacent first vias 1211 is smaller than a preset threshold, as shown in fig. 2.

The specific implementation and principles of vias (i.e., metallized holes) are well known to those skilled in the art and will not be described in detail herein for brevity.

The preset threshold may be set according to actual needs, for example, may be 1mm, 2mm, 3mm, 4mm, etc., and specific values of the preset threshold include, but are not limited to, the above-exemplified parts.

Each first via 1211 is connected to all metal layers, and each first via 1211 is grounded.

The plurality of first vias 1211 may be disposed around the first headroom region 110 at equal intervals, or may be disposed around the first headroom region 110 at unequal intervals, as long as the interval between two adjacent first vias 1211 is less than a preset threshold.

Optionally, a distance between each first via 1211 and the first headroom region 110 is less than a preset separation distance. The preset interval distance may be set according to actual needs, for example, may be 1mm, 2mm, 3mm, 4mm, etc., and specific values of the preset interval distance include, but are not limited to, the above-exemplified parts.

The distances between the different first vias 1211 and the first headroom region 110 may be the same or different, as long as the distance between the first via 1211 and the first headroom region 110 is less than the preset spacing distance.

In the second embodiment, a second via 1212 is disposed in the ground connection region 121, and the second via 1212 surrounds the first headroom region 110, as shown in fig. 3.

The second via 1212 is connected to all metal layers, and the second via 1212 is grounded.

The second via 1212 surrounds the first headroom region 110, thereby improving the isolation of the rf seat at the antenna end. Meanwhile, since the second via 1212 is grounded, a reflow path to ground may be added.

Alternatively, the second via 1212 may be a hollow hole, or the second via 1212 may be filled with the first metal material, and the first metal material may be grounded.

The first metal material may be any type of metal material, such as, for example, gold, silver, aluminum, copper, iron, nickel, etc., and includes, but is not limited to, the materials exemplified above.

By filling the first metal material in the second via 1212, the conductivity of the second via 1212 is enhanced, so that the effect of the reflow path to ground can be further improved. And, fill first metal material in second via 1212, can make the effect that second via 1212 kept apart antenna end radio frequency seat better.

In the third embodiment, all the sidewalls of the first headroom region 110 are covered with the second metal material 1213, and the second metal material 1213 is grounded, as shown in fig. 4.

The second metal material 1213 may be any type of metal material, such as, for example, a conductive material of gold, silver, aluminum, copper, iron, nickel, etc., and the second metal material 1213 includes, but is not limited to, the materials exemplified above.

The second metal material 1213 is covered on the side walls of all the first clearance areas 110, so that the first clearance areas 110 are surrounded by the metal material, and the effect of isolating the antenna-end radio frequency seat is improved. Meanwhile, since all the second metal materials 1213 are grounded, a return path to ground is increased.

In the embodiment of the present utility model, the first embodiment and the third embodiment may be used simultaneously, or the second embodiment and the third embodiment may be used simultaneously, which is not limited to this embodiment of the present utility model.

Alternatively, in some embodiments, the front J of the N metal layers may be provided with a second headroom region, and the second headroom regions of the metal layers overlap, such as the second headroom region 130 shown in fig. 5. Wherein J is a positive integer less than or equal to N-1.

In this embodiment, the PIN connection resistance line 122 of the first metal layer may be disposed in the second headroom region 130 of the first metal layer. In this way, by providing the second headroom region 130 in the front J metal layers of the metal layers, parasitic capacitance formed by the PIN connection resistance line 122 and other metal layers can be reduced, and the accuracy of the PIN connection resistance line 122 can be improved.

The wider the second headroom region 130, the smaller the parasitic capacitance formed by the PIN connection impedance line 122 and other metal layers, but the weaker the isolation effect of the first headroom region 110.

Optionally, a second clearance area may be provided for a front J metal layer of the N metal layers, PIN connection resistance lines 122 are provided for all X metal layers of the front J metal layers, PIN connection resistance lines 122 of each metal layer are disposed in the second clearance area 130 of the metal layer, and PIN connection resistance lines 122 are connected in parallel, where X is a positive integer less than or equal to J.

The front J-layer metal layer in the N-layer metal layer can be provided with a second clearance area, so that the line width of the PIN connection impedance line 122 of the X-layer metal layer in the front J-layer metal layer can be increased, and the line width of the PIN connection impedance line 122 is ensured to meet the preset requirement. Since the line width and the copper layer thickness of the circuit board affect the impedance, the line width of the PIN connection impedance line 122 meets the preset requirement, and the impedance deviation generated by the impedance parasitic can be reduced.

For example, X may be 1 and j may be 2, where the first 2 metal layers of the metal layers are provided with a second headroom region 130, and the second headroom region 130 of the first metal layer is provided with a PIN connection impedance line 122. The examples herein are for ease of understanding only and should not be construed as limiting the utility model.

In order to facilitate understanding of the above-mentioned multi-layer circuit board, please refer to fig. 5, it should be noted that fig. 5 is only one implementation of the multi-layer circuit board according to an embodiment of the present utility model, and should not be taken as a limitation of the present utility model.

As shown in fig. 5, N metal layers are overlapped and connected with each other. The first N-1 metal layer has a first headroom region 110.

The first metal layer has a connection region 120, and the connection region 120 of the first metal layer includes a ground connection region 121 and a PIN connection resistance line 122. The ground connection region 121 is provided with a plurality of first vias 1211, and the plurality of first vias 1211 are spaced around the first headroom region 110.

The first 2 metal layers of the metal layers are provided with a second headroom region 130, and the second headroom region 130 of the first metal layer is provided with a PIN connection impedance line 122.

The specific implementation and principle of the first headroom region 110, the second headroom region 130, the PIN connection impedance line 122, and the ground connection region 121 are described above, and are not described here again for brevity.

Based on the same inventive concept, the present utility model provides a circuit board, as shown in fig. 6, the circuit board 10 includes an antenna-side rf socket 200 and a multi-layered circuit board 100.

The antenna-side rf socket 200 is connected to the multi-layer circuit board 100.

The specific model of the antenna-side rf seat 200 may be selected according to actual requirements, and the specific type of the antenna-side rf seat is not limited herein.

The circuit board 10 may be a radio frequency circuit board, a microwave circuit board, or the like, and the circuit board 10 includes, but is not limited to, the types exemplified above.

The specific structure and principle of the multi-layer circuit board 100 are already described above, and are not repeated here for brevity.

Based on the same inventive concept, the present utility model provides an electronic device 20, as shown in fig. 7, where the electronic device 20 includes the above-mentioned circuit board 10, and the specific structure and principle of the circuit board 10 are already described and are not described herein again for brevity.

The electronic device 20 may be a mobile phone, a computer, a tablet computer, or the like.

The above description is only of the preferred embodiments of the present utility model and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.

Claims (10)

1. A multilayer circuit board, comprising:

n layers of metal layers are overlapped and connected, wherein N is a positive integer greater than or equal to 3;

a first metal layer of the N metal layers is provided with a connection area, and the connection area is configured to be connected with an antenna end radio frequency seat;

the front K metal layers in the N metal layers are provided with first clearance areas, and the first clearance areas are hollowed areas in the metal layers; k is a positive integer less than or equal to N-1;

the connection region of the first metal layer surrounds the first headroom region of the first metal layer.

2. The multi-layer circuit board of claim 1, wherein the antenna-side radio-frequency block includes a ground terminal and an impedance PIN terminal, and the connection region of the first metal layer includes:

a ground connection region configured to connect to a ground terminal of the antenna-terminal rf seat, the ground connection region being grounded, the ground connection region surrounding the first headroom region;

and the PIN connecting impedance line is configured to be connected with an impedance PIN end of the antenna end radio frequency seat, and is not grounded.

3. The multi-layer circuit board of claim 2, wherein a plurality of first vias are disposed in the ground connection region, the plurality of first vias are disposed in spaced relation around the first headroom region, and a spacing between two adjacent first vias is less than a predetermined threshold, each of the first vias being grounded.

4. The multilayer circuit board of claim 2, wherein one second via is provided in the ground connection region; the second via surrounds the first headroom region.

5. The multi-layer circuit board of claim 4, wherein the second via is filled with a first metal material, and the first metal material is grounded.

6. The multi-layer circuit board of claim 2, wherein all sidewalls of the first headroom region are covered with a second metal material, and the second metal material is grounded.

7. The multilayer circuit board of claim 2, wherein,

the front J-layer metal layer of the N-layer metal layers is provided with a second clearance area, and the second clearance areas of the metal layers are overlapped;

the PIN connection impedance line of the first metal layer is arranged in a second clearance area of the first metal layer;

wherein J is a positive integer less than or equal to N-1.

8. The multilayer circuit board of claim 7, wherein X metal layers of the front J metal layers are each provided with a PIN connection resistance wire, the PIN connection resistance wire of each metal layer is disposed in a second clear space region of the metal layer, and each PIN connection resistance wire is connected in parallel;

wherein X is a positive integer less than or equal to J.

9. A circuit board, comprising:

an antenna-end radio-frequency holder and the multilayer circuit board according to any one of claims 2-8, wherein the antenna-end radio-frequency holder is connected with the multilayer circuit board.

10. An electronic device, comprising:

the circuit board of claim 9.