CN220022834U

CN220022834U - Multi-protocol intelligent acquisition gateway equipment based on distribution type

Info

Publication number: CN220022834U
Application number: CN202321458798.5U
Authority: CN
Inventors: 周坤鹏; 王晨灵; 陈松; 杜杰
Original assignee: Shanghai Jiamian Information Technology Co ltd
Current assignee: Shanghai Jiamian Information Technology Co ltd
Priority date: 2023-06-08
Filing date: 2023-06-08
Publication date: 2023-11-14
Anticipated expiration: 2033-06-08

Abstract

The utility model relates to distributed multi-protocol intelligent acquisition gateway equipment, which relates to the technical field of gateways and comprises an upper shell, a lower shell and a gateway module arranged between the upper shell and the lower shell, wherein the upper shell and the lower shell form a sealed space, the gateway module comprises a core processing submodule, an acquisition submodule and a communication submodule, the core processing submodule is respectively IN signal connection with the acquisition submodule and the communication submodule, the acquisition submodule comprises a COM interface, a VGA interface, a LAN interface, a Digital IO interface, a MIC interface, a LINE IN interface and a LINE OUT interface, and the COM interface, the VGA interface, the LAN interface, the Digital IO interface, the MIC interface, the LINE IN interface and the LINE OUT interface are all preset on the side wall of the lower shell. The utility model provides a multi-protocol intelligent gateway device integrating multiple communication protocols.

Description

Multi-protocol intelligent acquisition gateway equipment based on distribution type

Technical Field

The utility model relates to the technical field of gateways, in particular to distributed multi-protocol intelligent acquisition gateway equipment.

Background

Gateway (Gateway) devices, also called Gateway connectors, protocol converters, are 7 computer systems or devices that provide data conversion services between multiple networks, and can be said to be connectors between different networks, i.e., devices that "negotiate" data from one network to another. When using different communication protocols, data formats or languages, even between two systems with completely different architectures, the gateway is a translator, and the gateway repacks the received information to adapt to the requirements of the target system, and plays roles of filtering and safety.

RTU cabinets typically employ field instruments, PLC devices, or power devices as the acquisition devices, but the transmission protocols typically employed by field instruments, PLC devices, or power devices include RS485, VGA, ethernet, and the like. The gateway equipment in the market at home and abroad generally has the defects of single communication protocol, low reliability, high price and the like, and restricts the application of the gateway equipment in the field of multi-protocol communication. Therefore, there is a need for a multi-protocol intelligent gateway device that incorporates multiple communication protocols.

Disclosure of Invention

In order to provide a multi-protocol intelligent gateway device integrating multiple communication protocols, the utility model provides a distributed multi-protocol intelligent acquisition gateway device.

The distributed multi-protocol intelligent acquisition gateway equipment provided by the utility model adopts the following technical scheme:

the utility model provides a gateway module based on multi-protocol intelligence of distributing type gathers gateway equipment, includes last casing, inferior valve and install IN go up the casing with gateway module between the casing down, go up the casing with the casing forms sealed space down, gateway module includes core processing submodule, gathers submodule and communication submodule, core processing submodule respectively with gather submodule the communication submodule signal connection, gather submodule including COM interface, VGA interface, LAN interface, digital IO interface, MIC interface, LINE IN interface and LINE OUT interface, the COM interface VGA interface LAN interface Digital IO interface the MIC interface LINE IN interface and LINE OUT interface all preset with the lateral wall of casing down.

Through adopting above-mentioned technical scheme, through a plurality of different interfaces that gather submodule set up, can insert the acquisition equipment that adopts multiple different agreements such as field instrument, PLC equipment and power equipment to can realize uploading a plurality of collection data to the purpose of host computer in same time quantum, provide the multi-protocol intelligent gateway equipment that fuses multiple communication protocol.

Preferably, the COM interface adopts RS232, RS422 or RS485 protocols.

By adopting the technical scheme, part of field instruments, PLC equipment and power equipment are required to realize data transmission through RS232, RS422 or RS485 protocols, so that the core processing sub-module is convenient to collect data collected by the collecting equipment.

Preferably, the COM interface includes a COM1 interface, a COM2 interface and a COM3 interface, the COM1 interface adopts RS232, the COM2 interface and the COM3 interface adopt RS485 protocol, and the COM2 interface and the COM3 interface are connected to the collecting device by adopting RS485 special chip signals.

By adopting the technical scheme, the RS232 communication is performed through the COM1 interface, the RS485 communication is performed through the COM2 interface and the COM3 interface, the communication of different protocols is realized, and the access to equipment of different output protocols is facilitated.

Preferably, the communication sub-module adopts a wireless transmission mode or a wired transmission mode.

Through adopting above-mentioned technical scheme, through the distance between current multi-protocol intelligence collection gateway based on distributing type and the host computer, select suitable transmission mode, can more quick effectual transmission data to practice thrift the cost.

Preferably, the communication submodule comprises an analog multiplexer, an input end MBUS_TX signal of the field instrument is connected to a pin X1 of the analog multiplexer, and an output end MBUS_RX signal of the field instrument is connected to a pin Y1 of the analog multiplexer; the input end RS485_TX signal of the COM2 interface or the COM3 interface is connected to the pin X0 of the analog multiplexer, and the output end signal of the COM2 interface or the COM3 interface is connected to the pin Y0 of the analog multiplexer; the input end USART2_TX and the output end USART2_RX of the analog multiplexer U2 are both in signal connection with the core processor.

By adopting the technical scheme, one of the remote transmission modes can be selected as the transmission mode between the current distributed-based multi-protocol intelligent acquisition gateway and the upper computer through the analog multiplexer.

Preferably, the gateway module includes a storage sub-module, the storage sub-module includes a memory and an expansion interface, the memory signal is connected to the core processing sub-module, the core processing sub-module forwards the output signal of the acquisition sub-module to the storage sub-module, and the expansion interface signal is connected to the core processing sub-module.

Through adopting above-mentioned technical scheme, when communication submodule piece breaks down and can not form the communication with the host computer between, the signal that the submodule piece output will be gathered to the storage submodule piece is temporarily stored to the core processing submodule piece, resumes the communication back between communication submodule piece and the host computer, and the signal of temporarily storing in the core processing submodule piece will be stored the submodule piece and is forwarded to the host computer through communication module, prevents data loss.

Preferably, the gateway module further comprises a preprocessing sub-module, and the preprocessing sub-module comprises a logic processing unit, a computing unit and a burr processing unit which are respectively connected with the core processing sub-module in a signal mode.

By adopting the technical scheme, the logic processing unit is used for performing simple logic processing, the computing unit is used for performing basic four-rule operation and the like, and the burr processing unit is used for primarily processing burr signals, so that different preprocessing requirements are met.

Preferably, the gateway module further comprises a man-machine interface, the man-machine interface comprises a USB interface HDMI interface, and the USB interface and the HDMI interface are both in signal connection with the core processing sub-module.

By adopting the technical scheme, the connection between the core processing sub-module and the working personnel is convenient when the working personnel maintain or configure in the later period.

Preferably, the gateway module further comprises two clock sub-modules for providing time stamps, the clock sub-modules comprise an RTC chip, and the RTC chip is in signal connection with the core processing sub-module.

By adopting the technical scheme, the RTC chip provides the time stamp, so that the uploading of data and the acquisition time of the data to the upper computer are facilitated; by arranging the two clock sub-modules, the data uploading acquisition time can be more accurate and stable.

Preferably, the outer side wall of the upper shell is provided with a plurality of radiating fins.

By adopting the technical scheme, the heat generated during the operation of the gateway module is conveniently dissipated, and the service life of the gateway module is prolonged.

In summary, the present utility model includes at least one of the following beneficial technical effects:

1. the acquisition equipment such as a field instrument, a PLC (programmable logic controller) equipment and power equipment which adopt a plurality of different protocols can be accessed through a plurality of different interfaces arranged on the acquisition sub-module, so that the purpose of uploading a plurality of acquired data to an upper computer in the same time period can be realized, and a multi-protocol intelligent gateway device integrating a plurality of communication protocols is provided;

2. distributed multi-protocol intelligent acquisition gateway equipment is arranged in RTU integrated cabinets at different positions to form a distributed transmission network, and each position can adopt a proper remote transmission mode according to the distance between the RTU integrated cabinet and an upper computer to achieve the aim of uploading data to the upper computer;

3. and Linux and Android operating systems are supported, secondary development is supported, and later maintenance and configuration are facilitated.

Drawings

Fig. 1 is a schematic structural diagram of an embodiment of the present utility model, which shows a preset interface on a front side board;

FIG. 2 is a block diagram of a gateway module according to an embodiment of the present utility model;

FIG. 3 is a schematic diagram of a second embodiment of the present utility model, showing a preset interface on the rear panel;

FIG. 4 is a circuit diagram of an RS485 dedicated chip U1 in an embodiment of the utility model;

FIG. 5 is a circuit diagram of an analog multiplexer U2 in an embodiment of the utility model;

fig. 6 is a block diagram of the structure of the preprocessing sub-module.

Reference numerals: 1. an upper housing; 11. a top plate; 111. a heat radiation fin; 12. a mounting plate; 2. a lower housing; 21. a bottom plate; 22. a side plate; 221. a front side plate; 222. a rear side plate; 3. a gateway module; 31. a core processing sub-module; 32. an acquisition sub-module; 33. a communication sub-module; 34. a power supply sub-module; 35. a storage sub-module; 36. a preprocessing sub-module; 361. a logic processing unit; 362. a calculation unit; 363. a burr treatment unit; 37. a human-machine interface; 38. and a clock sub-module.

Detailed Description

The present utility model will be described in further detail with reference to fig. 1 to 6.

The embodiment of the utility model discloses distributed multi-protocol intelligent acquisition gateway equipment, wherein a plurality of distributed multi-protocol intelligent acquisition gateway equipment can be arranged at the same position, and when one of the gateway equipment breaks down and other faults occur, acquired data can be transmitted through other distributed multi-protocol intelligent acquisition gateway equipment.

Referring to fig. 1 and 2, the distributed multi-protocol intelligent acquisition gateway device comprises an upper shell 1, a lower shell 2 and a gateway module 3, wherein the upper shell 1 and the lower shell 2 are arranged in a sealing way and form a sealing space, the gateway module 3 is arranged in the sealing space, and a plurality of interfaces are preset on the side walls of the upper shell 1 and the lower shell 2; when in use, the interfaces are respectively connected with different signals and remotely transmitted to the upper computer.

The upper casing 1 comprises a top plate 11 and two mounting plates 12, the top plate 11 is in n-shaped arrangement, the two mounting plates 12 are respectively fixed on the outer side of the opening end of the top plate 11, the mounting plates 12 and the top plate 11 can be integrally formed, and can also be fixedly connected by adopting welding or cementing and the like, and in the embodiment, an integrally formed mode is adopted. The outer side wall of the top plate 11 is provided with a plurality of radiating fins 111, so that the gateway module 3 can radiate heat conveniently, and the service life of the gateway module 3 is prolonged. Bolt holes are reserved in the mounting plate 12 to facilitate the installation of personnel within an RTU integrated cabinet (a remote terminal integrated cabinet, such as a turbidity residual chlorine RTU equipment integrated cabinet).

The lower housing 2 includes a bottom plate 21 and two side plates 22, the bottom plate 21 is installed at the opening of the top plate 11, the side plates 22 are respectively fixed at two opposite sides of the bottom plate 21, and simultaneously, the lower housing 2 and the upper housing 1 are mutually connected in an inserting manner so as to form a sealed space. In this embodiment, the side plates 22 may be fixedly connected with the top plate 11 and the bottom plate 21 by screws, so that the installation is convenient, and the maintenance and other operations are convenient.

Referring to fig. 1 and 3, for convenience of description, the two side plates 22 are respectively defined as a front side plate 221 and a rear side plate 222, and a plurality of interface slots are reserved on the front side plate 221 and the rear side plate 222, and the interfaces of the gateway module 3 are respectively clamped in the corresponding interface slots, which is described in detail below with respect to the gateway module 3.

Referring to fig. 2, the gateway module 3 includes a core processing sub-module 31, an acquisition sub-module 32, a communication sub-module 33, a power sub-module 34, a storage sub-module 35, a preprocessing sub-module 36, a man-machine interface 37, and a time Zhong Zi module 38. The core processing sub-module 31 is used for maintaining operation, and the acquisition sub-module 32 is in signal connection with the core processing sub-module 31 and is used for connecting acquisition equipment such as a field instrument, PLC equipment or power equipment; the communication sub-module 33 is in signal connection with the core processing sub-module 31 and is used for remotely transmitting the acquired data; the power supply sub-module 34 is used for providing power supply signals for each sub-module, and the storage sub-module 35 is connected with the core processing sub-module 31 in a signal manner and used for locally caching collected data; the preprocessing sub-module 36 is in signal connection with the core processing sub-module 31 and is used for performing simple logic processing, calculation or burr processing; the man-machine interface 37 is in signal connection with the core processing sub-module 31 and is used for performing operations such as post maintenance configuration; the clock sub-module 38 is in signal connection with the core processing sub-module 31 for providing an accurate time stamp.

In detail, the core processing sub-module 31 may adopt an ARM processor, and the ARM processor in this embodiment can support Linux and Android operating systems, and support secondary development, so as to facilitate maintenance and configuration in a later stage.

Referring to fig. 1 and 3, the collecting submodule 32 includes a plurality of interfaces, such as a COM interface, a VGA interface, a LAN interface, a Digital IO interface (Digital signal interface), a MIC interface (microphone interface), a LINE IN interface (external audio input interface), and a LINE OUT interface (audio output interface), etc., which are respectively used to form signal transmission with corresponding collecting devices, and the existing collecting devices mainly include a sensor, a PLC device, a field instrument, etc.

The COM interfaces mainly adopt RS232, RS422 or RS485 protocols, and in this embodiment, 3 COM interfaces are configured and respectively defined as COM1, COM2 and COM3, wherein COM1 is disposed on the rear side plate 222, and the RS232 protocol is adopted for communication; COM2 and COM3 may be RS232, RS422 or RS485, and in this embodiment, the RS485 protocol is mainly used.

The COM2 and COM3 interfaces need to receive signals through a transceiver, in this embodiment, the transceiver may be implemented by using an RS485 dedicated chip U1 (such as an integrated chip with a model number of MAX3471 EUA), and access to the collecting device through a plug.

Referring to fig. 4, pin 1 of the rs485 dedicated chip U1 is connected to the rs485_rx terminal. The pin 2 and the pin 3 of the RS485 special chip U1 are connected in parallel, and are connected with 485_CTR and 485_CTR for being connected with an RS485_TX end, specifically, the signal of the RS485_TX end is connected with the base electrode of an NPN triode, the collector electrode of the NPN triode is connected with a power supply signal VCC485 through a resistor, the point between the resistor and the collector electrode of the NP triode is the 485_CTR, and the emitter electrode of the NPN triode is grounded. Pin 4 of the RS485 special chip U1 is also connected to RS485_TX. Pin 5 of the RS485 dedicated chip U1 is grounded. The pin 6 and the pin 7 of the RS485 special chip U1 are connected into three paths of parallel circuits, wherein a first path of circuit of the pin 7 of the RS485 special chip U1 is a resistor and a capacitor which are connected in series, one end of the resistor far away from the capacitor is connected with the pin 7 of the RS485 special chip U1 in a signal manner, one end of the capacitor far away from the resistor is connected into a power supply signal VCC485, and the capacitor is grounded indirectly with the resistor. The second circuit of the pin 7 of the RS485 special chip U1 is a transient suppression diode, and in this embodiment, a transient suppression diode with a model number of SMAJ6.5CA may be selected. The third circuit of the pin 7 of the RS485 special chip U1 is a thermistor, and the other end of the thermistor is one end of a plug. Similarly, the first circuit of the pin of the RS485 special chip U1 is a resistor, and the other end of the resistor is connected to the power signal VCC485. The second circuit of the pin 6 of the RS485 special chip U1 is a transient suppression diode, and in this embodiment, a transient suppression diode with the model number SMAJ6.5CA may be selected. The third circuit of the pin 6 of the RS485 special chip U1 is a thermistor, the other end of the thermistor is the other end of the plug, and the third circuit of the pin 7 of the RS485 special chip U1 and one end of the plug are combined into the plug. The pin 8 of the RS485 special chip U1 is connected with a power supply signal VCC485.

Referring to fig. 1, the vga interface is a video graphic array interface, and is mainly used for transmitting video. The LAN interface is a network interface for accessing the acquisition device transmitted over the ethernet. Referring to fig. 3, the digital IO interface is used to access digital signals, but is currently used less frequently. MIC interface (microphone interface), LINE IN interface (external audio input interface), and LINE OUT interface (audio output interface) are inputs or outputs for audio signals, which are currently used with a small frequency. IN this embodiment, the Digital IO interface, MIC interface (microphone interface), LINE IN interface (external audio input interface), and LINE OUT interface (audio output interface) are all standby interfaces.

Referring to fig. 2, the communication sub-module 33 may perform long-distance transmission by using a wireless communication method or a single-mode optical fiber, or may perform short-distance transmission by using a dual-mode optical fiber. Meanwhile, since the acquisition sub-module 32 adopts different protocols for transmission, the communication sub-module 33 needs to select a proper transmission mode according to the corresponding protocol. Among them, the optical fiber is usually an optical fiber which is already laid for transmitting data, and the optical fiber transmits data by transmitting an optical signal, so that it is necessary to configure an appropriate fitting such as a photoelectric sensor or an optical fiber transceiver.

Referring to fig. 5, in particular, the communication sub-module 33 is provided with an analog multiplexer U2 (e.g., an integrated chip of model 74HC 4052D). The input MBUS_TX signal of the field instrument is connected to the pin X1 of the analog multiplexer U2, and the output MBUS_RX signal of the field instrument is connected to the pin Y1 of the analog multiplexer U2. The input terminal RS485 TX signal of the COM2 interface or the COM3 interface is connected to the pin X0 of the analog multiplexer U2, and the output terminal signal of the COM2 interface or the COM3 interface is connected to the pin Y0 of the analog multiplexer U2. The input usart2_tx and the output usart2_rx of the analog multiplexer U2 are both signally connected to the core processor. In the embodiment of the present utility model, the user may select according to the distance between the detection device and the core processing sub-module 31.

The power sub-modules 34 are respectively used for accessing the commercial power and converting the commercial power into 24V, 5V or 3.3V power signals for the different sub-modules to maintain the operation state. Specifically, a voltage-reducing circuit, a voltage regulator, a capacitor, and the like which are commonly used can be used. In other embodiments, referring to fig. 3, the DC INPUT interface may also be directly configured to access a DC power supply that meets the power supply requirements.

The storage sub-module 35 may employ a readable and writable memory, such as RAM, magnetic disk, optical disk, U-disk, etc., for caching collected data. When the communication sub-module 33 is interrupted, specifically, when the network is interrupted or the optical fiber interface is separated, the data of the collecting sub-module 32 is temporarily stored in the storage sub-module 35, and when the network is recovered or the optical fiber interface is re-accessed, the core processing sub-module 31 remotely transmits the temporarily stored data in the storage sub-module 35 to the upper computer.

Meanwhile, referring to fig. 1, the storage sub-module 35 includes reserved expansion interfaces, such as SD interfaces or TF interfaces, which can access the expansion storage capacity, so as to facilitate the subsequent expansion of the memory; or when the storage sub-module 35 is damaged, a new memory can be directly accessed to prevent the situation that the network is interrupted or the optical fiber interface is separated from the like, and the acquired data cannot be stored in time.

Referring to fig. 2 and 6, the preprocessing sub-module 36 mainly includes a logic processing unit 361, a calculating unit 362, and a burr processing unit 363. The logic processing unit 361 is mainly formed by adopting a combination of logic gates, so as to meet the requirement of a specific situation, and the core processing sub-module 31 only executes the operation of a certain instruction. The logic gate comprises an AND gate, an OR gate, a NOT gate, a NAND gate, a NOR gate, an exclusive OR gate and other basic logic gates; latches, flip-flops, etc. can be formed and configured by the staff as desired.

The computing unit 362 may be configured as simple basic operations such as an adder, a subtractor, a multiplier, and a divider, and may specifically be implemented by using logic gates, where the foregoing technical solutions are known to those skilled in the art, and are not described herein.

The burr processing unit 363 may use a combination of a schmitt trigger, an inverter, a capacitor, and the like, and is mainly used for eliminating a burr signal carried in the acquired signal; it should be noted that any jump between glitch samples that crosses a logic threshold more than once is primarily meant to refer to a circuit output waveform that contains very short regular or irregular pulses without having any use or other effect on the design.

The man-machine interface 37 may be mainly a USB interface or an HDMI interface, etc. The USB interface is mainly used for accessing instruction input devices, such as a mouse and a keyboard, for maintenance and reconfiguration of the core processing sub-module. The HDMI interface is mainly used for accessing a display and displaying information and the like.

The clock sub-module 38 may employ an RTC unit, mainly for providing a time stamp, and simultaneously obtain a signal of the RTC unit when the acquisition signal is remotely transmitted to the host computer, so as to form the time stamp. In the embodiment, an RX8010 real-time clock chip of EPSON can be adopted, and during production, the purpose of providing reliable time for data acquisition can be realized by embedding a drive of the chip in Linux. In addition, in order to provide the time stamp more stably, 2 clock sub-modules 38 are configured in the present embodiment, and when one of them fails or breaks down, another one can be used to provide the accurate time stamp.

To sum up, referring to fig. 1, a COM2 interface, a COM3 interface, 4 USB interfaces, an HDMI interface, a VGA interface, an SD interface, a LAN interface, and a DC INPUT interface are reserved on the front side board 221; furthermore, an ON/OFF switch is provided for safe operation of the gateway module 3; to facilitate identification of whether the power is on, power sub-module 34 has a PWR LED identification light in series; in order to facilitate the identification of whether the SD interface is plugged into the SSD card, the storage sub-module 35 is connected in series with an SD LED identification light.

Referring to fig. 2, the rear side plate 222 reserves a Digital IO interface, a COM1 interface, a MIC interface, a LINE IN interface, and a LINE OUT interface.

The implementation principle of the embodiment of the utility model is as follows: multiple distributed multi-protocol intelligent acquisition gateway devices can be configured at the same position, and when one of the gateway devices is damaged or the like, acquired data can be transmitted through the other distributed multi-protocol intelligent acquisition gateway devices; the distributed multi-protocol intelligent acquisition gateway equipment is arranged in the RTU integrated cabinets at different positions to form a distributed transmission network, and each position can adopt a proper remote transmission mode according to the distance between the RTU integrated cabinet and the upper computer to achieve the purpose of uploading data to the upper computer.

The above embodiments are not intended to limit the scope of the present utility model, so: all equivalent changes in structure, shape and principle of the utility model should be covered in the scope of protection of the utility model.

Claims

1. The utility model provides a gateway equipment is gathered to multiprotocol intelligence based on distributing type, its characterized IN that includes last casing (1), lower casing (2) and install IN go up casing (1) with gateway module (3) between casing (2) down, go up casing (1) with casing (2) down form sealed space, gateway module (3) include core processing submodule (31), gather submodule (32) and communication submodule (33), core processing submodule (31) respectively with gather submodule (32) communication submodule (33) signal connection, gather submodule (32) including COM interface, VGA interface, LAN interface, digital IO interface, MIC interface, LINE IN interface and LINE OUT interface, COM interface, VGA interface, LAN interface, digital IO interface, MIC interface, LINE IN interface and LINE OUT interface all are preset IN the lateral wall of casing (2) down.

2. A distributed multi-protocol intelligent acquisition gateway device according to claim 1, wherein the COM interface employs RS232, RS422 or RS485 protocols.

3. The distributed multi-protocol intelligent acquisition gateway device according to claim 2, wherein the COM interface comprises a COM1 interface, a COM2 interface and a COM3 interface, the COM1 interface adopts RS232, the COM2 interface and the COM3 interface adopt RS485 protocol, and the COM2 interface and the COM3 interface are connected to the acquisition device by adopting RS485 special chip signals.

4. A distributed multi-protocol based intelligent acquisition gateway device according to claim 3, wherein the communication sub-module (33) adopts a wireless transmission mode or a wired transmission mode.

5. The distributed multi-protocol based intelligent acquisition gateway device according to claim 4, wherein the communication sub-module (33) comprises an analog multiplexer, an input signal of a field meter mbus_tx is connected to a pin X1 of the analog multiplexer, and an output signal of the field meter mbus_rx is connected to a pin Y1 of the analog multiplexer; the input end RS485_TX signal of the COM2 interface or the COM3 interface is connected to the pin X0 of the analog multiplexer, and the output end signal of the COM2 interface or the COM3 interface is connected to the pin Y0 of the analog multiplexer; the input usart2_tx and the output usart2_rx of the analog multiplexer U2 are both signally connected to the core processing sub-module (31).

6. The distributed multi-protocol intelligent acquisition gateway device according to claim 1, wherein the gateway module (3) comprises a storage sub-module (35), the storage sub-module (35) comprising a memory and an expansion interface, the memory being signally connected to the core processing sub-module (31), the core processing sub-module (31) forwarding the output signal of the acquisition sub-module (32) to the storage sub-module (35), the expansion interface being signally connected to the core processing sub-module (31).

7. The distributed multi-protocol intelligent acquisition gateway device according to claim 1, wherein the gateway module (3) further comprises a preprocessing sub-module (36), the preprocessing sub-module (36) comprising a logic processing unit (361), a computing unit (362) and a burr processing unit (363) respectively in signal connection with the core processing sub-module (31).

8. The distributed multi-protocol intelligent acquisition gateway device according to claim 1, wherein the gateway module (3) further comprises a man-machine interface (37), the man-machine interface (37) comprising a USB interface and an HDMI interface, both in signal connection with the core processing sub-module (31).

9. The distributed multi-protocol based intelligent acquisition gateway device according to claim 1, wherein the gateway module (3) further comprises two clock sub-modules (38) for providing time stamps, the clock sub-modules (38) comprising employing RTC chips, which RTC chips are in signal connection with the core processing sub-module (31).

10. The distributed multi-protocol based intelligent acquisition gateway device according to claim 1, wherein the outer side wall of the upper housing (1) is provided with a plurality of heat dissipating fins (111).