CN219893298U - Low noise amplifier - Google Patents

Low noise amplifier Download PDF

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Publication number
CN219893298U
CN219893298U CN202321646098.9U CN202321646098U CN219893298U CN 219893298 U CN219893298 U CN 219893298U CN 202321646098 U CN202321646098 U CN 202321646098U CN 219893298 U CN219893298 U CN 219893298U
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China
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transistor
radio frequency
capacitor
low noise
noise amplifier
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CN202321646098.9U
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Inventor
郑金汪
李侃
李泰安
段连成
孟浩
钱永学
黄鑫
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Beijing Angrui Microelectronics Technology Co ltd
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Beijing Angrui Microelectronics Technology Co ltd
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Abstract

The utility model provides a low noise amplifier, comprising: the power detection circuit comprises an amplifying unit, a switching circuit and a power detection circuit, wherein the amplifying unit is configured to amplify an input radio frequency input signal to output a radio frequency output signal; the switch circuit is configured to be turned on or off according to a control signal generated by the power detection circuit to input a radio frequency input signal to the amplifying unit; and the power detection circuit is configured to generate the control signal according to a radio frequency input signal to prevent the radio frequency input signal from being transmitted to the amplifying unit when the radio frequency input signal is larger than a first power threshold.

Description

Low noise amplifier
Technical Field
The present utility model relates to Low Noise Amplifiers (LNAs), and in particular to low noise amplifiers that include power detection circuitry that are resistant to high power inputs.
Background
With the rapid development of the communication market, the radio frequency front-end receiver is also developed towards high performance, high integration and low power consumption. The low noise amplifier is the front end of the radio frequency receive chain and its performance directly affects the overall receiver performance. In 5G radio frequency applications, the LNA needs to support multiple-input multiple-output (MIMO) scenarios, when the isolation of the rf switch is not high or the rf switch timing is problematic, the output high-power signal of the PA is input to the input of the LNA, and the high-power signal can easily burn out the LNA.
For low noise amplifiers in 5G radio frequency applications, such as those employing Cascode (Cascode) structures, it is desirable to provide a low noise amplifier that is resistant to high power inputs.
Disclosure of Invention
An aspect of the present utility model provides a low noise amplifier, which includes a power detection circuit, and generates a logic signal for turning off an input terminal of the low noise amplifier when a large input power is detected at the input terminal of the low noise amplifier, so as to protect an internal circuit of the low noise amplifier from being burned; and when the power is restored to normal, the LNA is also restored to normal operation.
Another aspect of the present utility model proposes a low noise amplifier comprising: the power detection circuit comprises an amplifying unit, a switching circuit and a power detection circuit, wherein the amplifying unit is configured to amplify an input radio frequency input signal to output a radio frequency output signal; the switch circuit is configured to be turned on or off according to a control signal generated by the power detection circuit to input a radio frequency input signal to the amplifying unit; and the power detection circuit is configured to generate the control signal according to a radio frequency input signal to prevent the radio frequency input signal from being transmitted to the amplifying unit when the radio frequency input signal is larger than a first power threshold.
Another aspect of the utility model proposes a low noise amplifier wherein the amplifying unit comprises a cascode amplifier.
Another aspect of the present utility model proposes a low noise amplifier, wherein the cascode amplifier includes: a first transistor M1, a second transistor M2, a first inductor L1, a second inductor L2, a first capacitor C1, a second capacitor C2, and a first resistor R1, wherein the first capacitor C1 is connected between the radio frequency input port and the gate of the first transistor M1; one end of the first resistor R1 is connected to the gate of the first transistor M1, and the other end thereof is connected to the first bias voltage vb1; the source of the first transistor M1 is connected to one end of the first inductor L1, and the drain thereof is connected to the source of the second transistor M2; one end of the first inductor L1 is connected to the source of the first transistor M1, and the other end thereof is connected to a ground node; the gate of the second transistor M2 is connected to a second bias voltage vb2, the source of the second transistor M2 is connected to the drain of the first transistor M1, and the drain of the second transistor M2 is connected between the second capacitor C2 and the second inductor L2; one end of the second capacitor C2 is connected to the drain of the second transistor M2, and the other end thereof is connected to the radio frequency output signal port; and one end of the second inductor L2 is connected to the drain of the second transistor M2, and the other end thereof is connected to the power supply voltage VDD.
Another aspect of the present utility model proposes a low noise amplifier, wherein the switching circuit includes a third transistor M3 having a gate connected to the control signal and having a source connected to one of the radio frequency input signal and the first capacitor C1 and having a drain connected to the other of the radio frequency input signal and the first capacitor C1.
Another aspect of the present utility model proposes a low noise amplifier, wherein the power detection circuit includes: the power supply circuit comprises a jump power detection circuit, a Smith trigger I1 and a driving inverter I2, wherein the input end of the jump power detection circuit is connected to a radio frequency input signal, the output end of the jump power detection circuit is connected to the input end of the Smith trigger I1, the output end of the Smith trigger I1 is connected to the input end of the driving inverter I2, and the control signal Vct of the low noise amplifier is output through the driving inverter I2.
Another aspect of the present utility model proposes a low noise amplifier, wherein the jump power detection circuit comprises a first diode D0, a second diode D1, a third capacitor C3, a fourth capacitor C4, and a second resistor R2, wherein one end of the third capacitor C3 is connected to the radio frequency input signal, and the other end thereof is connected to an intermediate node between the first diode D0 and the second diode D1; the anode of the first diode D0 is connected to the first power supply voltage Vss, and the cathode thereof is connected to the anode of the second diode D1 and one end of the third capacitor C3; the cathode of the second diode D1 is connected to the intermediate output first intermediate output node; one end of the fourth capacitor C4 is connected to the first intermediate output node and the other end thereof is connected to the first power supply voltage Vss; one end of the second resistor R2 is connected to the first intermediate output node and the other end thereof is connected to the first power supply voltage Vss.
Another aspect of the present utility model proposes a low noise amplifier in which the capacitance value of the third capacitor C3 is set to 200fF.
Another aspect of the utility model proposes a low noise amplifier in which the jump power of the power detection circuit is adjusted by adjusting the values of the fourth capacitor C4 and the second resistor R2.
Another aspect of the present utility model proposes a low noise amplifier, wherein the low noise amplifier is formed by at least one of an HBT transistor, a CMOS transistor, a BJT transistor, a BiCMOS transistor, and a GaN transistor.
Drawings
Fig. 1 is a block diagram showing one example of an amplifying unit of a low noise amplifier LNA according to an embodiment of the present utility model;
fig. 2 is a circuit diagram showing an example of a power detection circuit of a low noise amplifier according to an embodiment of the present utility model;
FIG. 3 is a schematic diagram showing the output signal of a power detection circuit as a function of input power according to an embodiment of the utility model; and
fig. 4 is a graph showing a change in control signal output from the power detection circuit when the input power thereof suddenly increases and decreases according to an embodiment of the present utility model; and
fig. 5 is a schematic diagram showing the gate voltage swing of an amplifying transistor in a low noise amplifier LNA when high power input occurs in the presence and absence of a high power protection circuit.
Detailed Description
Before proceeding with the following detailed description, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms "coupled," "connected," and derivatives thereof, refer to any direct or indirect communication or connection between two or more elements, whether or not those elements are in physical contact with one another. The terms "transmit," "receive," and "communicate," and derivatives thereof, encompass both direct and indirect communication. The terms "include" and "comprise," as well as derivatives thereof, mean inclusion without limitation. The term "or" is inclusive, meaning and/or. The phrase "associated with … …" and its derivatives are intended to include, be included in, interconnect with, contain within … …, connect or connect with … …, couple or couple with … …, communicate with … …, mate, interleave, juxtapose, approximate, bind or bind with … …, have attributes, have relationships or have relationships with … …, etc. The term "controller" refers to any device, system, or portion thereof that controls at least one operation. Such a controller may be implemented in hardware, or a combination of hardware and software and/or firmware. The functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. The phrase "at least one," when used with a list of items, means that different combinations of one or more of the listed items may be used, and that only one item in the list may be required. For example, "at least one of A, B, C" includes any one of the following combinations: A. b, C, A and B, A and C, B and C, A and B and C.
Definitions for other specific words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior as well as future uses of such defined words and phrases.
In this patent document, the application combinations of modules and the division levels of sub-modules are for illustration only, and the application combinations of modules and the division levels of sub-modules may have different manners without departing from the scope of the disclosure.
In the present utility model, complementary metal oxide transistor CMOS is illustrated as an example, but it should be understood by those skilled in the art that the concepts of the present utility model are equally applicable to other fields, for example, may be designed and implemented by a process such as HBT, BJT, biCMOS, gaN.
Fig. 1 is a block diagram showing one example of an amplifying unit of a low noise amplifier LNA according to an embodiment of the present utility model.
Referring to fig. 1, the amplifying unit of the low noise amplifier LNA is configured as a Cascode structure. The amplifying unit of the low noise amplifier LNA includes: the first transistor M1, the second transistor M2, the first inductor L1, the second inductor L2, the first capacitor C1, the second capacitor C2, and the first resistor R1. Furthermore, the low noise amplifier LNA further comprises a switching circuit comprising a third transistor M3.
Referring to fig. 1, the first transistor M1 and the second transistor M2 form a cascode structure to be connected between a power supply voltage Vdd and a ground node GND through the first inductor L1 and the second inductor L2. One end of the first inductor L1 is connected to the ground node GND and the other end thereof is connected to the source of the first transistor M1; the second inductor L2 has one end connected to the power supply voltage Vdd and the other end connected to the drain of the second transistor M2, and is connected to the radio frequency signal output terminal rfout through the second capacitor C2. The gate of the second transistor M2 is connected to the second bias voltage vb2 to adjust the operating voltage of the second transistor M2 by the second bias voltage vb 2. The gate of the first transistor M1 is connected to the first bias voltage vb1 through the first resistor R1 to adjust the operating voltage of the first transistor M1 by the first bias voltage vb 1. The radio frequency input signal rfin is connected to the gate of the first transistor M1 through a switching circuit (third transistor M3) and a first capacitor C1 (blocking capacitor) to provide a radio frequency signal to the input of the cascode structure. Wherein the gate of the third transistor M3 is connected to the control voltage Vct to control the on and off of the third transistor M3 by the control voltage Vct. By adopting the cascode structure shown in fig. 1, the low noise amplifier has the characteristics of high gain, high isolation and high stability. And according to an embodiment of the present utility model, the low noise amplifier LNA is protected from being burned out by a high power by the third transistor M3 controlled by the control voltage Vct.
Fig. 2 is a circuit diagram showing an example of a power detection circuit of a low noise amplifier according to an embodiment of the present utility model.
Referring to fig. 2, the power detection circuit includes: a first diode D0, a second diode D1, a third capacitor C3, a fourth capacitor C4, a second resistor R2, a Smith (Smith) trigger I1 and a driving inverter I2. Wherein one end of the third capacitor C3 is connected to the radio frequency input signal rfin, and the other end thereof is connected to an intermediate node between the first diode D0 and the second diode D1; the anode of the first diode D0 is connected to the first power supply voltage Vss, and the cathode thereof is connected to the anode of the second diode D1 and one end of the third capacitor C3; the cathode of the second diode D1 is connected to node a (first intermediate output node); one end of the fourth capacitor C4 is connected to the node a and the other end thereof is connected to the first power supply voltage Vss; one end of the second resistor R2 is connected to the node a and the other end thereof is connected to the first power supply voltage Vss. Node a is connected to the input of a Smith trigger I1 and the output of Smith trigger I1 is connected to the input of a driving inverter I2. The control signal Vct of the low noise amplifier is output by driving the inverter I2.
According to an embodiment of the present utility model, in order not to have a large influence on the radio frequency main path, the third capacitor C3 is configured with a small capacitance value, for example, it is set to around 200fF. By connecting the fourth capacitor C4 and the second resistor R2 in parallel, the jump power (e.g., the first threshold power) of the power detection circuit can be adjusted by adjusting the values of the fourth capacitor C4 and the second resistor R2. When a low-power radio frequency input signal in a normal range is input to the rf in port, the detection voltage of the a node (output terminal of the Smith trigger I1) will be relatively small, for example, typically below 300mV, so that the control signal Vct output after passing through the Smith trigger I1 and driving the inverter I2 is a logic high level signal, and this high level signal is used to control the input switch of the low noise amplifier LNA to be in a conducting state, so that the low noise amplifier LNA is in a normal working state. When an excessively high-power radio frequency input signal suddenly exists and is input to the rfin port, the detection voltage of the A node becomes larger, for example, larger than 1V, at this time, the signal logic of the control signal Vct output after passing through the Smith trigger I1 and the driving inverter I2 is low-level, and the low-level signal is used for controlling the input switch of the low-noise amplifier LNA to be in an off state, so that the amplifying tube of the low-noise amplifier LNA is protected from being burnt by high power. According to the embodiment of the utility model, the phenomenon of logic back and forth jump caused by the fact that power is in a critical state can be prevented by using the smith trigger.
Fig. 3 is a schematic diagram showing the output signal of the power detection circuit according to an embodiment of the present utility model as a function of input power.
It is assumed that a port0 of 50 ohms is added to the input (rfin port) of the low noise amplifier, and the output power of port0 suddenly increases from normal power and returns to normal power over time. As shown in fig. 3, when the power input to the rf in port is normal power (or smaller power), the output control signal Vct level of the power detection circuit is high, and the high level controls the input switch of the low noise amplifier LNA to be in an on state, and the low noise amplifier LNA is in a normal working state. When the power input to the rf in port is high power (for example, greater than the first threshold power), the level of the control signal Vct output by the power detection circuit is low, and the low level controls the input switch of the low noise amplifier LNA to be in an off state, so as to protect the amplifying tube of the LNA from being burned by the high power.
Fig. 4 is a graph showing a change in control signal output from the power detection circuit when the input power thereof suddenly increases and decreases according to an embodiment of the present utility model. Referring to fig. 4, when the power increases, the switching time of the output control signal is about 10ns, and when the power returns to normal again, the switching time of the output control signal is about 31ns, so that the power detection circuit according to the embodiment of the utility model can meet the design requirement of the 5G application scene.
Fig. 5 is a schematic diagram showing the gate voltage swing of an amplifying transistor in a low noise amplifier LNA when high power input occurs in the presence and absence of a high power protection circuit. Referring to fig. 5, in the absence of the high power protection circuit, when the high power rf input signal is input to the low noise amplifier LNA, the voltage swing of the amplifying transistor (e.g., the first transistor M1) is 6.3V (refer to part B of fig. 5), which forces the LNA to burn out; in contrast, in the presence of the high power protection circuit, when a high power radio frequency input signal is input to the LNA, the voltage swing of its amplifying tube is 0.9V (refer to part a of fig. 5), so that the LNA is in a safe voltage range and is not burned out.
Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. The disclosure is intended to embrace such alterations and modifications that fall within the scope of the appended claims.
Any description of the present utility model should not be construed as implying that any particular element, step, or function is a necessary element to be included in the scope of the claims. The scope of patented subject matter is defined only by the claims.

Claims (9)

1. A low noise amplifier, comprising: an amplifying unit, a switching circuit and a power detection circuit,
the amplifying unit is configured to amplify an input radio frequency input signal to output a radio frequency output signal;
the switch circuit is configured to be turned on or off according to a control signal generated by the power detection circuit to input a radio frequency input signal to the amplifying unit; and
the power detection circuit is configured to generate the control signal from a radio frequency input signal to prevent transmission of the radio frequency input signal to the amplifying unit when the radio frequency input signal is greater than a first power threshold.
2. The low noise amplifier of claim 1, wherein the amplifying unit comprises a cascode amplifier.
3. The low noise amplifier of claim 2, wherein the cascode amplifier comprises: a first transistor M1, a second transistor M2, a first inductor L1, a second inductor L2, a first capacitor C1, a second capacitor C2, and a first resistor R1,
the first capacitor C1 is connected between the radio frequency input port and the gate of the first transistor M1;
one end of the first resistor R1 is connected to the gate of the first transistor M1, and the other end thereof is connected to the first bias voltage vb1;
the source of the first transistor M1 is connected to one end of the first inductor L1, and the drain thereof is connected to the source of the second transistor M2;
one end of the first inductor L1 is connected to the source of the first transistor M1, and the other end thereof is connected to a ground node;
the gate of the second transistor M2 is connected to a second bias voltage vb2, the source of the second transistor M2 is connected to the drain of the first transistor M1, and the drain of the second transistor M2 is connected between the second capacitor C2 and the second inductor L2;
one end of the second capacitor C2 is connected to the drain of the second transistor M2, and the other end thereof is connected to the radio frequency output signal port; and
one end of the second inductor L2 is connected to the drain of the second transistor M2, and the other end thereof is connected to the power supply voltage VDD.
4. The low noise amplifier of claim 1, wherein the switching circuit comprises a third transistor M3,
the gate of the third transistor is connected to the control signal, and its source is connected to one of the radio frequency input signal and the first capacitor C1, and its drain is connected to the other of the radio frequency input signal and the first capacitor C1.
5. The low noise amplifier of claim 1, wherein the power detection circuit comprises: a transition power detection circuit, a Smith trigger I1 and a driving inverter I2,
the input of the jump power detection circuit is connected to the radio frequency input signal, and its output is connected to the input of the smith trigger I1,
the output terminal of the smith trigger I1 is connected to the input terminal of the driving inverter I2, and the control signal Vct of the low noise amplifier is output by driving the inverter I2.
6. The low noise amplifier of claim 5, wherein the transition power detection circuit comprises a first diode D0, a second diode D1, a third capacitor C3, a fourth capacitor C4, and a second resistor R2,
one end of the third capacitor C3 is connected to the radio frequency input signal, and the other end thereof is connected to an intermediate node between the first diode D0 and the second diode D1;
the anode of the first diode D0 is connected to the first power supply voltage Vss, and the cathode thereof is connected to the anode of the second diode D1 and one end of the third capacitor C3;
the cathode of the second diode D1 is connected to the intermediate output first intermediate output node;
one end of the fourth capacitor C4 is connected to the first intermediate output node and the other end thereof is connected to the first power supply voltage Vss;
one end of the second resistor R2 is connected to the first intermediate output node and the other end thereof is connected to the first power supply voltage Vss.
7. The low noise amplifier according to claim 6, wherein a capacitance value of the third capacitor C3 is set to 200fF.
8. The low noise amplifier of claim 6, wherein the transition power of the power detection circuit is adjusted by adjusting the values of the fourth capacitor C4 and the second resistor R2.
9. The low noise amplifier of claim 1, wherein the low noise amplifier is formed by at least one of HBT transistor, CMOS transistor, BJT transistor, biCMOS transistor, and GaN transistor.
CN202321646098.9U 2023-06-27 2023-06-27 Low noise amplifier Active CN219893298U (en)

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Application Number Priority Date Filing Date Title
CN202321646098.9U CN219893298U (en) 2023-06-27 2023-06-27 Low noise amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321646098.9U CN219893298U (en) 2023-06-27 2023-06-27 Low noise amplifier

Publications (1)

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CN219893298U true CN219893298U (en) 2023-10-24

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CN202321646098.9U Active CN219893298U (en) 2023-06-27 2023-06-27 Low noise amplifier

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